KiliManjaro. CS Build(A02) INVENTEC KiliManjaro POWER DRAWER DESIGN CHECK RESPONSIBLE TITLE SIZE = VER : REV CHANGE NO.

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1 C Build(A0) RAWER EIN CHECK REPONIBLE EE ATE POWER ATE ATE CHANE NO. REV IZE = FILE NAME : XXXX-XXXXXX-XX P/N XXXXXXXXXXXX VER : IZE COE OC. NUMBER A C Model_No HEET OF REV X0

2 TABLE OF CONTENT PAE MAINBOAR.COVER PAE.INEX.BLOCK IARAM.POWER EQUENCE BLOCK -.YTEM POWER.CLOCK ENERATOR -.CPU Merom.FAN & THERMAL CONTROLLER 9-.N/B Calistoga.R IMM0.R IMM.R AMPIN 9.MXM CONN 0.CRT CONN.HMI CONN.LC CONN -./B ICH.EXPRE CAR PAE 9.CAR REAER 0.LAN CONTROLLER.RJ & TRANFORMER.MINI CAR CONN.O & H CONN.UB CONN.BT & LE & CIR & W.KBC.COEC -9.AUIO AMP&JACK 0.MC.CREW & EMI.TO OTHER BOAR CONN PAE MALL BOAR.IO BOAR(TV Turner or Robson).UB & TV BOAR.PWR JACK LE BOAR.PWR BUTTON & LI BOAR.E-KEY BOAR.TH-BUTTON BOAR 9.HOTKEY BOAR CHANE by -ec-00 IZE COE OC. NUMBER A C Model_No HEET OF REV X0

3 CPU PENRYN LCM (ufcpa) FB, /00MHz CLK EN IC9LPR THERMAL ENOR & FAN Msc EMC_0 HMI CRT MXM CAR Type II PCIE North Bridge Crestline 99 PCBA R / R / R_OIMM0 R_OIMM LOM Controller AR LE RJ CONN MIx JMB IN LOT PCI_Express Bus PWR Board Batt Charger H ATA outh Bridge ICH-M BA UB.0 UB.0 PORT x C BLUETOOTH VER.0 Express Card Mini Card Mini Card C-ROM PATA LPC.V MHZ FingerPrint TV TUNER INTEL PRO WIRELE 9AB MAIN BATT / Cell M P.0 ANT ANT ANT Media Console BIO UPER I/O & KBC ITE ITE E M P. Azalia MC MC. RJ CNTR KB / LE TOUCH PA PICK BUTTON/ Azalia H Codec REAL_ALC/9 CIR LINE IN MIC IN HP Jack \PIF\ Two Jack Jack LINE OUT peakers MAX_9 ub Woofer CHANE by -ec-00 IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

4 ENTRIP VREF +V. LP R PRTP# VCC ON LP_#_R COE IZE TP +V._P EN ON BATRV# CA PMO PMO +V VTT_IN +VA ACRV# EN +V. PMO +VA H_PRTP# RT90A PMO PI# VR_PWR +V. POO PWR_OO_ ENTRIP PM_PRLPVR +VA CHRV +VA LP_#_R PMO TP0 MT_99 ON +V. +V. LP_#_R +VLA +V. PI# +V +VAUXON RT90A PRLPVR CHANE by M_VREF ON RET EN REV +V. HEET VTT +AAPTOR OF +VBAT +VA BQ OC. NUMBER VRE LP_#_R PMO BATTERY PACK TP +VCC_CORE ACOO# VRON THER_# CHARE NMO BATRV# -Nov-00 X0 Model_No A C ON ACPRE +VCC_CORE +V0.9 RET LP_#_R CLKEN# MCH_OO EN CLK_PWR

5 Q +VA +VPACK CN0 E&T_0_P +VACPWR C9 0pF_0v L0 NFM0R0T C9 0.0uF_v C9 C9 0pF_0v 0.0uF_v -,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- BATT_IN BATT_CLK BATT_ATA - -,- -,- UZ.B R AZCV - CN0 YN_00MR000VZR_P C 000pF_0v C 0.0uF_v C9 0.uF_v +VBAT Q0 C9 0.0uF_0v FBZ R 00K_% C uf_v C 0.uF_v R 0.0_%_W C 0.uF_v C 0.uF_v C9 C9 0.0uF_v R 00K_% Q0 FBZ -,-,9-,0-,-,- C0 0.uF_v C 0.0uF_v.uF_v R K_% R9 C90.K_% CHARE_N ACPRE_R ACPRE CH_EN# BATT_CLK BATT_ATA - R0 R K_% 00K_% U0-B + MAX_AP_RT - OUT TI_LMV9IKR_OP_P - -,- -,- - -,- PM M CHARER_N C.uF_v R R CHARE_N R K_% C0 uf_0v R0 00K_%.K_%(0A0090).K_%(0A0090) CHARER_N R 00K_% R 00K_% R 0K_% -,- +VA +VA VREF R0.K_% VCC U09 ACN ACP BYPA# ACET 0 VREF AN T CHEN# CL A ALARM# C 0.uF_v NEAR IC R9 0K_% C 0.uF_v ACRV# Y PVCC PH REN BATRV# HIRV 0 9 BTT LORV PN YNP YNN 0 RP 9 RN BAT EAO EAI FBO IYNET IOUT TML TI_BQC_QFN_P 9 VREF - -,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- CHARE_N NEAR IC R0 0 M0U0 R 00K_% R R0 9.K_% CHARE_N +VA C9 0.uF_v C9 uf_.v R R K_% 00K_% -,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- R09 K_% C0 U0-A 0.uF_v + OUT - TI_LMV9IKR_OP_P PM M C 00pF_0v 9.K_%(0A0090).K_%(0A000Y) Q R._% FAIR_FM90_MLP_P C 00pF_0v R C 0K_% pf_0v C 00pF_0v R0 00K_% -,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- -,- Q 9 0 MAX_APT C 0uF_v_K_XR L0 LF0T_00MR0_TPF C 0uF_v_K_XR CHARER_N R 0.0_% C9 0uF_v_K_XR C 0.uF_v C 0.uF_v CHARER_N 9-Oct-00 +VPACK - Q0 AMP_AP C 0uF_v_K_XR C 0.uF_v CHARER_N C 0.uF_v NEAR IC R C 0.0uF_0v C &BATTERY CHARER IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

6 +V +V. 0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- 9- +V -,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- A +VBAT -,-,-,-,-,- -,-,9-,0-,-,- +VLA U0 9 POO TML-PA N EN AJ PA0 POWERPA 00 R M_% U C9 0uF_.v C 0.uF_0v VIN VOUT V NC RICHTEK_RT90APP_OP_P R9 R C 0uF_.v R.K_% R 0K_% LTH REET# N VCC HTH MT_0LT_OT_P C 0.uF_v PM_PWROK R K_% 9-,-,- R 00K_% -,- +VAUXON Q -,9- THRM_HUTWN# Open When UE ACER MXM AN M PM_THRMTRIP# R -,9-,- Q C B E CK CMK00F +VLA ALL POWER TURN OFF WHEN BATTERY MOE -,-,-,-,-,- R 00K_% -,- PWR_WIN#_ +VLA PWR_WIN# -,-,-,-,-,- R 00K_% - -,- +VAUXON ARCAE_WIN# - ACPRE_R - BATC R00 0K_% Q MK00F Q MK00F BATT_PWRKEEP - R.K_% Q MK00F CHANE by 0-Jan-00 +V. / REET IZE COE OC. NUMBER A C Model_No HEET OF REV X0

7 +VLA -,-,-,-,-,- R9 00K_% THER_# +VAUXON CHENMKO_BAT_P Q9 Q MK00FU MK00FU Q0 MK00FU +VBAT -,-,9-,0-,-,- R 0K_% R 0K_% PA POWERPA 00 VREF - R +VA PA0 POWERPA 00 MAX : A C9 pf_0v R R.K_% R 0K_% C0 uf_.v L CYNTEC_PCMC0_R C 0uF_.v R0._% C0 000pF_0v C0 C9.uF_v.uF_v _ Q F900A R._% R._% C 0.uF_v +VLA - U9 TI_TP_QFN_P R C.uF_.v TML VO VRE 9 VBT 0 RVH LL RVL R _ ENTRIP VFB TONEL VREF VFB ENTRIP EN0 KIPEL N VIN VRE VCLK VO POO VBT RVH 0 LL RVL 9 C.uF_v +VLA C90 0.uF_v C 0.uF_v -,-,-,-,-,- C.uF_.v R._% R9._% C 0uF_v_K_XR Q F90A Q F L CYNTEC_PCMC0_R C.uF_v R0._% C 0uF_.v C0 000pF_0v C uf_.v R R.K_% R 0K_% PA0 POWERPA 00 C9 pf_0v -,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- -,9-,-,-,-,-,-,-,-,9-,- MAX : A +VA CHANE by -Oct-00 YTEM POWER(+VA/+VA) IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

8 +VBAT_CPU 0-,9-,- +VA LP_#_R +V._P +VA -,-,9-,-,-,-,-,-,-,-,9-,- R0 00K_% EN 0 VOUT 9 POO FB EMTECH_CA_MLPQ_P ILIM NC NC NC R K_% NC RTN -,-,9-,-,-,-,-,-,-,-,9-,- H N LX VCC PA U BT L C 0.uF_v CHENMKO_BAT_P R._% C R._% uf_.v Q9 C90 C9.uF_v F 0uF_v_K_XR Q F90A PA POWERPA 00 L PCMB0E_RM R._% C9 000pF_0v R9 0K_% R C.K_% C 0uF_v_mR_Panasonic +V. PA0 POWERPA 00 MAX_0A C 0uF_.v +V. +V. +V 9-,-,-,-,-,-,-,-,-,- 9-,-,- -,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- PA POWERPA 00 +V._P 9-,- U 9 POO TML-PA N EN AJ MAX_A VIN VOUT C.uF_.v V NC RICHTEK_RT90APP_OP_P C 0.uF_v R _% R 00_% C0 0uF_.v CHANE by -Oct-00 YTEM POWER (+V. / +V.) IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

9 +VBAT C uf_v_ PA POWERPA 00 C pf_0v C pf_0v_ R0.K_% R 0K_% R 0K_% R 0.K_% R _N _N C.uF_v C 0uF_v_mR_Panasonic C0 0uF_v_K_XR L0 LF0T_R0NR R0._% C9 000pF_0v Q0 F R0._% Q9 F90A R0._% MCH_OO C 0.uF_v +VA R 00K_% R._% R9 9 VBT VO VFB N POO U0 POO TI_TPRER_QFN_P EN EN 0 RVH LL RVL R0.K_% TONEL N PN TRIP VFILT VIN VFB TRIP R K_% VO PN VBT RVH LL 0 RVL 9 +VA _N R 00K_% R R._% R C9 uf_.v 0.uF_v C +VA C +V._P C0.uF_.v Q0 F900A _ L0 LF0T_RNR R._% C 000pF_0v C 0uF_v_K_XR C9 C 0.uF_v 0uF_v_mR_Panasonic -,-,9-,-,-,-,-,-,-,-,9-,- -,- -,-,9-,-,-,-,-,-,-,-,9-,- LP_#_R -,-,-,-,-,-,-,-,-,- PA0 POWERPA 00 MAX A C 0.uF_v R 9-,-,-,-,- LP_#_R - -,-,-,0-,-,- -,-,-,-,-,-,-,-,-,- PA0 POWERPA 00 MAX A +V. R9 _N CHANE by -Jan-00 YTEM POWER(+V. / ) IZE COE OC. NUMBER REV A C Model_No X0 HEET 9 OF

10 -,-,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- +V +VBAT_CPU -,9-,- -,9-,- H_VI H_VI H_VI H_VI H_VI H_VI H_VI0 PI# H_PRTP# PM_PRLPVR PWR_OO_ VR_PWR IMVP_CKEN# -,- - C00 000pF_0v VCOREN R0 R0 R00 99_% +V R009 R0 C0 R00 0pF_0v.K_% C009 pf_0v ,- VCOREN C00 0pF_0v R R0 0K_% VCOREN R 9 TML PMON PRLP PMONF PRTP CLIM PI VI0 LLINE CCOMP VI VI CFEF 9 VI CUM 0 RAMP VI VI 0 VRPM 9 RPM VI RT P VCC N EN C0 PWR PELAY 00pF_v CLKEN FBRTN C0 FB COMP 0pF_0v U00 AI_AP0_LFCP_P 9 T 0 VARFREQ VRTT TTEN C0 0.0uF_v - -,-,-,9-,0-,-,- PA R0VCOREN.K_% +V R0 K_% CREF VCCENE VENE R00 K_% C0 000pF_0v VCOREN VCOREN C0 000pF_0v R0 0.K_% BT RVH W PVCC RVL PN 0 PN RVL 9 PVCC W RVH BT R0 K_% 9K_% R0 0K_% VCOREN R0 C00.uF_.v R0._% R00.K_% R0 C0.uF_.v 00 BATA C0 0.uF_v 0- R0 C0._% 0.uF_v -,-,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- +V C09 0pF_0v R0 0K_% C0.uF_.v C C 0uF_v_K_XR 0uF_v_K_XR 0uF_v_K_XR R0._% C9 C0 C 0uF_v_K_XR Q FM0 R0._% 0.0uF_v R09._% POWERPA 00 9 PA Q POWERPA 00 IP_T_E 9 Q FM0 R00._% 9 9 R9._% C 000pF_0v Q IP_T_E R0._% C 000pF_0v L0 ETQPLRWFC_PANAONIC CREF +VBAT C0 000pF_0v VCOREN R0 K_% +VBAT R09 -,-,-,9-,0-,-,- C0 K_% 000pF_0v R0 VCOREN 9K_% R0 L0 ETQPLRWFC_PANAONIC R0 0_% R0 0_% MAX : A +VCC_CORE 0- R0 -,-,9-,- - CHANE by -Oct-00 CPU POWER(VCC_CORE) IZE COE OC. NUMBER REV A C Model_No X0 HEET 0 OF

11 LP_#_R -,-,- LP_#_R +V. 9-,-,-,- -,-,9-,-,-,-,-,- R R U N EN VTT VTT_IN - -,-,9-,-,-,-,-,-,-,9-,- +VA POWERPA 00 PA +V0.9 -,-,9-,-,-,-,-,- 9-,9-,- +V. +V. MAX : A +VLA C9 0.uF_v Q AO0 C0 0.uF_v C 0uF_.v C 0.uF_v C 0uF_.v VTT VREF 9-,-,- VCC VQ TML-PA 9 MT_99FU_OP_P C 0.uF_v M_VREF C uf_.v C 0uF_.v C 0uF_.v LP R - R0 K_% Q MK00F R 0K_% Q R NOTE: R REULATOR MK00F +V -,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- -,0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- R 00K_% +VA C +V._P -,9-0.uF_v MCH_OO 9- BATA C 0.uF_v U 0-,-,9-,- PWR_OO_ PHP_LVC_OT_P CHANE by -Oct-00 +V0.9 / +V. / POWER OO IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

12 +VA -,-,9-,-,-,-,-,-,-,9-,- +VLA -,-,-,-,- R K_% 0 CHENMKO_BAT_P Q TPC0 Q +V -,-,0-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- MAX A LP_#_R 9-,-,-,- Q0 MK00F R0 0K_% TPC0 C 000pF_0v Q9 R 0 C 0uF_.v MK00F +VA -,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- CHENMKO_BAT_P Q +V MAX A LP R - R 0K_% TPC0 C 0uF_.v Q9 TPC0_ C9 Q0 R0 0 MK00F CHANE by -Oct-00 POWER(+V / +V) IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

13 CPU_BEL CPU_BEL CLK_R_ICH FA 0 +V CLKREQ_R_MCH# FB FC 0 0 -,9- -,9- - R 0K_% -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V R 0K_% R0 9-,-,-,-,-,-,-,-,-,-,- L BLMA 9- FB CLOCK FREQUENCY 00 R0 R R 0K_% % Layout note: All decoupling 0.uF disperse closed to pin C 0uF_0v 0K_% _% HOT CLOCK FREQUENCY 00 R C 0.uF_v C 0.uF_v C pf_0v C 0.uF_v -,-,-,0- -,-,-,0-0PPM C 0.uF_v 9-,-,-,-,-,-,-,-,-,-,- R -,9- CLK_REF CPU_BEL0 CLKREQ_R_ATA# 0K_%_ +V - R X.MHZ.K_% R9 _ R 0.uF_v R0 C0 pf_0v C Please place close to CLKEN within 00mils R R00 0K_% _% C 0.uF_v CLK_ICH _% R +V -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- Layout note: All decoupling 0.uF disperse closed to pin L BLMA IC_IC9LPR_TOP_P C9 0uF_0v C 0.uF_v C 0.uF_v C9 0.uF_v C 0.uF_v C 0.uF_v C 0.uF_v U9 VRC_IO NC VRC_IO VRC_IO PCI_TOP# V9_IO CPU_TOP# 9 VRC_IO CLK_R_MCHBCLK VREF CPUT_F 0 VPLL_IO CPUC_F 0 CLK_R_MCHBCLK# 9 VCPU_IO CPUT0 CLK_R_CPUBCLK CLK_R_CPUBCLK# CPUC0 9 CLK_R_PCIE_REAER V CPUT_ITP_RCT VPCI CPUC_ITP_RCC CLK_R_PCIE_REAER# VCPU V RCT_CR#_H ICH_NEWCAR_R_CLKEN# CLKREQ_MINI#_R RCC_CR#_ CLK_R_PCIE_CAR RCT0 0 UB_MHZ_FLA RCC0 CLK_R_PCIE_CAR# FLB_TET_MOE RCT9 0 CLK_R_PCIE_MINI REF0_FLC_TET_EL CLK_R_PCIE_MINI# RCC9 PCI0_CR#_A CLK_R_PCIE_MINI PCI_CR#_B RCT_CR#_F PCI_TME RCC_CR#_E CLK_R_PCIE_MINI# PCI RCT CLK_R_PCIE_ICH 0 CK_PWR_P# RCC CLK_R_PCIE_ICH# CLK MINICARPCI CLK PCI elect R TAT PCI_F_ITP_EN CLK ICHPCI R0 0 X RCT CLK_R_PE_MCH CLK_R_PE_MCH# RCC 9 X CLK_R_PCIE_LAN RCT_CR#_C NPCI RCC_CR#_ CLK_R_PCIE_LAN# N RCT_ATAT CLK_R_ATA N 9 CLK_R_ATA# N RCC_ATAC NRC 9 NRC MHz_Non_RCT_E CLK_REF CLK_REF# NRC MHz RCC_E NREF CLK_PE_REF NCPU RCC0_OTT_9 RCT0_OTC_9 CLK_PE_REF# -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- - PCITOP#_ - CPUTOP#_ - CLK_R_MCHBCLK - CLK_R_MCHBCLK# - CLK_R_CPUBCLK - CLK_R_CPUBCLK# 9- CLK_R_PCIE_REAER 9- CLK_R_PCIE_REAER# - CLKREQ_R_NEWCAR# - CLK_REQ_MINI# - CLK_R_PCIE_CAR - CLK_R_PCIE_CAR# - CLK_R_PCIE_MINI - CLK_R_PCIE_MINI# - CLK_R_PCIE_MINI - CLK_R_PCIE_MINI# - CLK_R_PCIE_ICH - CLK_R_PCIE_ICH# CLK_R_MINICARPCI CLK_R_ICHPCI CLK_R_KBPCI 9- CLK_R_PE_MCH 9- CLK_R_PE_MCH# 0- CLK_R_PCIE_LAN 0- CLK_R_PCIE_LAN# - CLK_R_ATA - CLK_R_ATA# 9- CLK_R_REF 9- CLK_R_REF# 9- CLK_R_REF 9- CLK_R_REF# 9-,-,-,-,-,-,-,-,-,-,- R9 CLK_R_ICH - 0K_%_ CLK_REF -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- CLK_PWR - ICH MCLK ICH MATA -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- _%._% 0K_%_._% _% _% +V R R R R R R 0K_% R9 _ R R0 0K_%_ R R +V R9 0K_% V R 0K_% -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- _elet =0 LC_T 00MHZ _elet = MHZ non-spread clock *CLKREQ# pin controls RC Table. Byte: bit =0(PW) Byte: bit = Byte: bit =0(PW) Byte: bit = CR#_E Byte: bit=0, disable CR#_E;,enable CR#_E RC R 0K_% CR#_A RC0 RC Byte: bit=0, disable CR#_A;,enable CR#_A CR#_B RC RC Byte: bit=0, disable CR#_B;,enable CR#_B CR#_F Byte: bit=0, disable CR#_F;,enable CR#_F RC _ R 9- _ R 9- CLK_R_PE_REF CLK_R_PE_REF# CR#_C Byte: bit =0(PW) Byte: bit = RC0 RC Byte: bit=0, disable CR#_C;,enable CR#_C CR#_ Byte: bit0 =0(PW) Byte: bit0 = RC RC Byte: bit=0, disable CR#_;,enable CR#_ CR#_ CR#_H Byte: bit=0, disable CR#_;,enable CR#_ RC9 Byte: bit=0, disable CR#_H;,enable CR#_H RC0 CHANE by -Oct-00 CLOCK_ENERATOR IZE COE OC. NUMBER A C Model_No HEET OF REV X0

14 H CLK REERVE AR ROUP 0 CONTROL AR ROUP XP/ITP INAL THERMAL ICH CLOE TO CPU MCH PM_THRMTRIP# should be T at CPU 0mils/0mils CHANE by HEET COE OF REV CPU IZE OC. NUMBER - - -Oct-00 Merom- C A Model_No X0 ICH.9_% R TCK TI AA TO AB THERMA A THERMC B THERMTRIP# C AB TM TRY# AB TRT# N RV0 T RV0 RV0 V B RV0 C RV0 RV0 RV0 RV09 A MI# TPCLK# AC K H REQ# REQ# K J REQ# REQ# L C REET# R0# F F R# R# RV0 M F RV00 E HITM# IERR# 0 C INNE# INIT# B C LINT0 LINT B LOCK# H PRY# AC AC PREQ# PROCHOT# REQ0# A BPM# A BPM# BPM# AC BPRI# F BR0# BR# C0 BY# E H EFER# RY# F FERR# A HIT# A# M A# A# N A9# J A# H M ATB0# ATB# V A BCLK0 BCLK A E BNR# BPM0# A W A9# Y J A# U A0# A# V A# W A# AA AB A# AA A# A# L A# L K R A9# A0# W A0M# A U A# Y A# U A# A# R A# T T A# W A# A# N A0# P A# A# P A# L P A# P A# A# R A# Y U A# CN0- FOX_PZK_M P -,9-,- R _% R ,-,-,-,-,-,-,-,-,-,- 9-,-,-,-,-,-,-,-,-,-,- - _% R9 9_% R R ,-,-,-,-,-,-,-,-,-, R H_ATB# CLK_R_CPUBCLK CLK_R_CPUBCLK# H_FERR# H_INNE# _% H_A0M# H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_BPM_PREQ# TI_FLEX H_TM H_TCK H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(9) H_A#(0) H_A#() H_REQ#() H_REQ#() H_REQ#() H_REQ#() H_R#(0) H_R#() H_R#() H_A#() H_A#() H_A#() H_A#(9) H_A#(0) H_A#() H_BREQ#0 XP_BREET# H_REQ#(0) H_A#(9) H_A#(0) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_MI# H_TPCLK# H_TCK TI_FLEX PM_THRMTRIP# H_THERMA H_THERMC H_TM H_TRT# H_A#() H_A#() H_A#(:) H_ATB#0 H_REQ#(:0) H_LOCK# H_INIT# H_R#(0:) H_TRY# H_CPURT# H_BPM_PREQ# H_INTR H_NMI H_A# H_BNR# H_BPRI# H_BY# H_EFER# H_RY# H_HIT# H_HITM#

15 H_#(:0) H_TBN#0 H_TBP#0 H_INV#0 -, H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() CN0- E 0# F # E # # F # # E # E # K # 9# J 0# J # H # F # K # H # J TBN0# H TBP0# H INV0# ATA RP 0 ATA RP Y # # AB # V V # V # # T # U U 9# Y 0# # W # Y W # W # # AA AA # AB # TBN# TBP# INV# Y AA U H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() -, H_#(:0) H_TBN# H_TBP# H_INV# 9-,-,-,-,-,-,-,-,-,- R9 K_% R9 K_% H_#(:0) TLREF -,- Layout note: Zo= ohm, 0." max for TLREF. H_TBN# H_TBP# H_INV# CPU_BEL0 CPU_BEL CPU_BEL ,9- -,9- -,9- H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() N # K # P # R 9# L 0# M # L # M # P # P # P # T # R # L 9# T 0# N # L TBN# M TBP# N INV# A C C AF AF A B B C TLREF TET TET TET TET TET TET BEL0 BEL BEL ATA RP MIC ATA RP # AE A 9# AA 0# # AB # AB AC # A0 # # AE # AF # AC AE # 9# A 0# AC A # # AF AC # AE TBN# AF TBP# INV# AC0 COMP0 COMP COMP COMP PRTP# PLP# PWR# PWROO LP# PI# R U AA Y E B AE -, H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() R._% R.9_% R._% R.9_% 0- H_TBN# H_TBP# H_INV# CLOE TO CPU H_PRTP# H_PLP# H_PWR# H_PWR H_CPULP# PI# 0-,9-,- H_#(:0) FOX_PZK_M P R9 R C Place C close to the TET pin. Make sure TET routing is reference to N and away from other noisy signals. CHANE by -Oct-00 Merom- IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

16 IZE HEET ROUTE VCCENE AN VENE TRACE AT. OHM WITH 0 MIL PACEIN PLACE PU AN P WITHIN I INCH OF CPU CAVITY ON L (NORTH IE PLACE THEE INIE OCKET CHANE by OC. NUMBER LAYOUT NOTE: ECONARY) PLACE C0 NEAR PIN B OF Oct-00 X0 Model_No A C Merom- LAYOUT NOTE: COE REV 0.uF_v C0 C0 0.uF_v C 0.uF_v 0-,-,- 0-,-, C 0uF_.v C 0.0uF_v C 900uF_.v uf_.v_ C C uf_.v_ uf_.v_ C C9 C uf_.v_ 9-,-,-,-,-,-,-,-,-,-,- 9-,-,-,-,-,-,-,-,-,-,- -,9-,-,-,-,-,-,-,-,- uf_.v_ C0 0.uF_v C00 0.uF_v VCCP W VCCENE AF VI0 A AF VI VI AE AF VI VI AE AF VI VI AE AE VENE VCCP0 J VCCP0 VCCP0 K VCCP0 M N VCCP09 N VCCP0 R VCCP VCCP R VCCP T VCCP T V VCCP AF AF VCC09 AF VCC09 AF VCC09 AF VCC099 B VCCA0 VCCA0 C VCCP0 VCCP0 V J VCCP0 K VCCP0 M AE9 VCC0 AE0 VCC0 VCC0 AE AE VCC0 VCC09 AE VCC090 AE AE VCC09 VCC09 AE0 AF9 VCC09 AF0 VCC09 VCC09 VCC0 AC VCC0 VCC0 AC A VCC0 VCC0 A9 A0 VCC09 A VCC00 VCC0 A A VCC0 VCC0 A VCC0 A VCC0 VCC0 AB VCC0 AB VCC0 AB AB VCC0 AB0 VCC0 VCC09 AB VCC00 AC AC9 VCC0 VCC0 AC AC VCC0 AC VCC0 AA0 AA VCC0 AA VCC0 VCC0 AA VCC0 AA AA VCC0 AA0 VCC09 VCC00 AB9 VCC0 AC0 VCC0 AB0 AB VCC0 VCC0 F9 VCC0 F0 VCC0 F F VCC0 F VCC0 VCC0 F VCC09 F F0 VCC00 AA VCC0 VCC0 AA9 VCC0 VCC0 VCC0 E E9 VCC0 E0 VCC0 VCC0 E VCC0 E E VCC0 E VCC09 VCC00 E VCC0 E0 F VCC0 C C VCC0 C VCC0 VCC0 C VCC0 C 9 VCC0 0 VCC0 VCC0 VCC09 VCC00 AF0 VCC0 B9 VCC0 B0 VCC0 B B VCC0 B VCC0 VCC0 B VCC0 B B0 VCC0 C9 VCC09 VCC00 C0 A VCC00 A9 VCC00 A0 VCC00 VCC00 A VCC00 A A VCC00 A VCC00 VCC00 A VCC009 A0 B VCC00 VCC000 FOX_PZK_M P CN uF_v C 00_% R 0uF_v_mR_Panasonic C0 0-0-,-,- R 0-00_% H_VI H_VI H_VI +VCC_CORE H_VI +VCC_CORE VCCENE +V. +VCC_CORE VENE H_VI0 H_VI H_VI

17 C Merom- REV COE HEET OC. NUMBER CHANE by IZE OF V AF AF V9 AF9 V0 V AF A V V AF -Oct-00 X0 Model_No A V AE V V9 AE V0 AE AE9 V AE V V AE V A AF V AF V V AF V V A V A A V9 A V0 V A V A9 A V A V V AE V AE AE V AB AC V AC V V9 AC V0 AC AC V AC V V AC9 V AC AC V A V AA V V AA V AB AB V9 AB V0 V AB V AB AB V AB9 V V AB V0 V0 Y V0 Y Y V0 Y V0 V09 AA V0 AA AA V AA V V AA V AA AA9 V09 U U V09 U V09 V09 V V09 V V V099 V V00 V0 W V0 W W V0 W V0 P V0 V0 R V0 R R V0 R V0 V09 T V090 T T V09 T V09 V09 U V0 M V0 V0 M V0 M M V0 N V0 V0 N V09 N N V00 V0 P V0 P P V0 J V0 J J V0 K V0 V0 K V0 K K V0 L V09 V00 L V0 L L F F V0 V0 V0 V0 V0 H V0 V0 H V09 H H V00 J V0 V00 E9 V0 V0 E V0 E F V0 F V0 V0 F V0 F F V0 F9 V09 V00 F V0 V00 V0 9 V0 V0 V0 V0 E E V0 E V0 V0 E V09 E E C C V00 C V0 V0 C9 V0 C C V0 C V0 V0 V0 V0 V09 V00 B V009 V00 B V0 B B V0 B V0 V0 B9 V0 B B V0 C V0 V0 C V09 FOX_PZK_M P A V00 V00 A V00 A A V00 A V00 V00 A9 V00 A AF CN0-

18 +V -,-,0-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- PIN FAN : R0 PIN FAN : 0 OHM Q0 FAN CN C 0uF_.v C uf_.v R0 K_% C0 AO 0.0uF_v_ R0 K_% 0 CHENMKO_BAT_P C0 Q0 - PIN FAN : TUFF C0 MK00F PIN FAN : 0.0uF_0v 0.uF_v CN0 ACE_0_000_P -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V R0 0K_% FAN_TACH FAN_PWM_ - R0 0K_% +V -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- THRM_HUTWN# R 0K_% MK00F Q Q R 0K_% -,-,9-0-,-,9-,- PWR_OO_ - THER_# -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V MK00F C 0.uF_v H_THERMA H_THERMC - - C 0.uF_v C 00pF_0v U0 V P N MCLK MATA ALERT R ,- EC MCLK0 EC MATA0 THERM# THRM_HUTWN# -,-,9- THERM N MC_EMC0 ACZL_MOP_P Thermal ensor For CPU CHANE by 0-Oct-00 THERMAL&FAN CONTROLLER IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

19 RV CF PM NC R MUXIN CLK MI ME MIC RAPHIC VI MCH_CF(9) MCH_CF() HIH=ynamic OT OPERATIN IMULTANEOULY HEET MCH_CF() MCH_CF(9) OPERATIONAL MCH_CF() 0b : MT/ COE CHANE by ENABLE OT) 0=ALL-Z MOE ENABLE (CPU trap) LOW=Reverse Lane HIH=REERVE MCH_CF(:) HIH=LANE REVERE LOW=ynamic OT OF LOW=CALITOA (PCIE BACKWAR Enable IZE 0=XOR MOE ENABLE 00=PARTIAL CLOCK ATIN IABLE Lane HIH=Normal operation XOR/ALLZ (MI LANE =NORMAL OPERATION PCIE raphics LOW=NORMAL HIH=MIx REVERAL) NOTE: CF[:0] TRP : 00b : MT/ LOW=ONLY VO OR PCIE X I LOW=MIx VIA THE PE PORT HIH=Mobile CPU MCH_CF() HIH=.V REV INTERPOERABILITY PB X CLK OC. NUMBER LOW=.0V MOE LOW=RV VCC ELECT isable MCH_CF(0) MCH_CF() (FB ynamic ,- -Oct-00 Crestline- C A 9 Model_No X0 HIH=VO AN PCIE X ARE K_% R - -,- - -,- -,- -,-.uf_.v C - _ R BE BL M_RCOMP M_RCOMP# BK BK M_RCOMP_VOH M_RCOMP_VOL BL AR9 M_VREF_0 M_VREF_ AW A TET_ TET_ R THRMTRIP# N0 BB M_CK_ BA M_CK_ M_CK_ AV B0 M_C#_0 M_C#_ BK M_C#_ B BE M_C#_ M_OT_0 BH BJ M_OT_ BJ M_OT_ M_OT_ VO_CTRL_CLK K VO_CTRL_ATA AW0 M_CK#_0 M_CK#_ BA M_CK#_ AW AW M_CK#_ M_CKE_0 BE9 AY M_CKE_ B9 M_CKE_ M_CKE_ B M_CK_0 AV9 RV0 A RV RV B RV B B RV C RV AR RV RV AR RV AM AN RV RV9 J H RV B BJ9 RV BE RV RV BH9 RV AW0 BK0 RV C RV RV RV9 B N RV C B BJ0 RV RV BK RV BF9 BH0 RV RV BK RV BJ BF RV B RV9 RV R RV0 BC J AW9 PWROK RTIN# AV0 P RV AR RV0 AM RV RV AL AM RV RV 0 RV P H0 RV0 RV BL9 NC NC BL BL NC BK NC NC9 BJ PE_CLK K K PE_CLK# PM_BM_BUY# PM_PRTP# L9 L PM_EXT_T#_0 PM_EXT_T#_ BJ E NC0 A NC NC C B0 NC NC A0 NC A9 BK NC BK NC NC BK0 BL0 NC MI_TXP_ PLLREF_CLK# C B PLL_REF_CLK PLL_REF_CLK H H PLL_REF_CLK# PRLPVR E FX_VI_0 FX_VI_ A9 FX_VI_ C B9 FX_VI_ ICH_YNC# 0 NC MI_RXP_ AJ9 MI_RXP_ AN AN MI_RXP_ MI_TXN_0 AJ AJ MI_TXN_ AM0 MI_TXN_ MI_TXN_ AM AJ MI_TXP_0 MI_TXP_ AJ MI_TXP_ AM9 AM CL_CLK CL_ATA AK0 CL_PWROK AT AN9 CL_RT# CL_VREF AM0 E FT_VR_EN MI_RXN_0 AN AJ MI_RXN_ AN MI_RXN_ MI_RXN_ AN AM MI_RXP_0 N N CF_ L CF_0 CF_ C CF_ C F CF_ N CF_ CF_ CF_ J0 C0 CF_9 CLK_REQ# 9 AM9 N CF_ R CF_0 CF_ L CF_ J E CF_ CF_ E0 CF_ K CF_ M0 M CF_ L CF_ CF_9 - ITL_CRETLINE_PM_FCBA_ACER_99P U- CF_0 P 0_% R ,-,- R -,- _ R ,9- -,-,- 9- R ,9-,-,- 9- -,-,- R0 -,- - 9-,- R - C 0.0uF_v R 0 R9 0_% R - -,- -,9-,-, ,- R _ -,- 9-,- -,9- -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-, ,9- K_% R R.K_% R R 9- -,-,9-,-,-,-,-,- -,9- -,- 9- -,-,- R -,- 9- R uF_v C9 -,9-9-,-,- R K_% K_% R -,- 9- -,- -,- -,-,9-,-,-,-,-,- -,9-9- K_% R 9- R K_% R R _ 9-9-, , C 0.uF_v 0K_% R -,- 9- -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- R - 0K_% R R K_% R9 9-,- 0-,- R 9_% R R 0K_%.uF_.v C -,9- - -,9- M_RCOMP_VOL R0 CLK_R_REF CLK_R_REF CLK_R_REF CLK_R_REF# CLK_R_REF CLK_R_REF# +V. M_RCOMP_VOH MCH_CF() MA_A() MB_A() CPU_BEL CPU_BEL0 CPU_BEL CLK_R_REF# CLK_R_REF# PM_PWROK +V PM_EXTT#0 PM_EXTT# PLT_RT# +V. MI_RXN() MI_RXN() MI_RXN(:0) MI_RXP(:0) MI_RXP(0) MI_RXP() MI_RXP() MI_RXP() CL_RT#0 CL_CLK0 CL_ATA0 M_CLK_R0# M_CLK_R# M_CLK_R# M_CLK_R# MI_TXN(:0) MI_TXP(0) MI_TXP() MI_TXP() MI_TXP() MI_TXP(:0) MI_RXN(0) MI_RXN() PM_THRMTRIP# MCH_CF(:) MCH_CF() MCH_CF() MCH_CF() MCH_CF(9) MCH_CF(0) MCH_CF() MCH_CF() MCH_CF() MCH_CF() MCH_CF() MCH_CF() MCH_CF() BM_BUY# H_PRTP# +V. M_RCOMP M_RCOMP# M_C# M_C# M_OT0 M_OT M_OT M_OT M_RCOMP M_RCOMP# M_RCOMP_VOH M_RCOMP_VOL M_VREF M_CKE0 M_CKE M_CKE M_CKE M_CLK_R0 M_CLK_R M_CLK_R M_CLK_R M_C0# M_C# MCH_CF() MCH_CF() CLKREQ_R_MCH# MI_TXN(0) MI_TXN() MI_TXN() MI_TXN() PM_PRLPVR MCH_ICH_YNC# CLK_R_PE_MCH CLK_R_PE_MCH# PM_EXTT#0 PM_EXTT# PM_PWROK MCH_CF() MCH_CF() MCH_CF(9) MCH_CF() MCH_CF() MCH_CF() +V MCH_CF() MCH_CF(9) MCH_CF() MCH_CF(0) MCH_CF() MCH_CF(9) MCH_CF(0) MCH_CF()

20 +V -,0-,-,-,-,-,9-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- _ R9 _ R R 0K_% R 0K_% +V._PE - R 0_% R 0_% R0 0_% R0 00K_% CRT_R_B CRT_R_ CRT_R_R R.K_%.K_0.% R R _ R _ CRT_CCLK CRT_CATA CRT_HYNC CRT_VYNC LV_TXL0- LV_TXL- LV_TXL- LV_TXL0+ LV_TXL+ LV_TXL+ LV_R_TXCL- LV_R_TXCL+ LV_R_TXCU- LV_R_TXCU+ LV_R_TXL0- LV_R_TXL- LV_R_TXL- LV_TXCL- LV_TXCL+ LV_TXCU- LV_TXCU+ LV_TXU0- LV_TXU- LV_TXU- LV_TXU0+ LV_TXU+ LV_TXU+ CRT_B CRT_ CRT_R 9-,0-9-,0-9-,0-9-,- 9-,- 9-,- 9-,- 9-,- 9-,- 9-,- R9 R R R R R R9 R Place Below MXM Conn Place Below MXM Conn R R R9 R R R R0 R R R R0 R R R R R0 R R _% _% _% R _% Place Below MXM Conn R CRT_R_HYNC CRT_R_VYNC LV_R_TXU0- LV_R_TXU- LV_R_TXU- LV_R_TXL0+ LV_R_TXL+ LV_R_TXL+ LV_R_TXU0+ LV_R_TXU+ LV_R_TXU+ R _% CRT_R_B CRT_R_ CRT_R_R R R _ LV TV VA PCI-EXPRE RAPHIC R ITL_CRETLINE_PM_FCBA_ACER_99P _ U- J0 L_BKLT_CTRL H9 L_BKLT_EN E9 L_CTRL_CLK E0 L_CTRL_ATA C L_C_CLK L_C_ATA K0 L_V_EN L L N N0 C E E F9 0 E0 F B B E A A E K F J L M P H K9 J9 F9 E9 K F C E LV_IB LV_VB LV_VREFH LV_VREFL LVA_CLK# LVA_CLK LVB_CLK# LVB_CLK LVA_ATA#_0 LVA_ATA#_ LVA_ATA#_ LVA_ATA_0 LVA_ATA_ LVA_ATA_ LVB_ATA#_0 LVB_ATA#_ LVB_ATA#_ LVB_ATA_0 LVB_ATA_ LVB_ATA_ TVA_AC TVB_AC TVC_AC TVA_RTN TVB_RTN TVC_RTN TV_CONEL0 TV_CONEL CRT_BLUE CRT_BLUE# CRT_REEN CRT_REEN# CRT_RE CRT_RE# CRT_C_CLK CRT_C_ATA CRT_HYNC CRT_TVO_IREF CRT_VYNC PE_COMPI PE_COMPO PE_RX#_0 PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_9 PE_RX#_0 PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX_0 PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_9 PE_RX_0 PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_TX#_0 PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_9 PE_TX#_0 PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX_0 PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_9 PE_TX_0 PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ N M J L N T T0 U0 Y Y0 AB W9 A A0 A AH9 A A J0 L0 M U T9 T W W AB0 Y AC AC AH A9 AH A N U9 U N R0 T Y W W A9 AC AC9 AC AH9 AE9 AH M T T N0 R U W Y Y9 AC A AC0 A A9 AE0 AH R.9_% PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP0 PE_C_RXP9 PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP0 PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN0 PE_C_RXN9 PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN0 PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP0 PE_TXP9 PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP0 PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN0 PE_TXN9 PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN0 PE_TXP0 PE_TXN0 PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP9 PE_TXN9 PE_TXP0 PE_TXN0 PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN PE_TXP PE_TXN ,- 9-, ,- 9-, ,0-9-, ,0-9-, ,- 9-, ,- 9-,- 9-,- _ 9-,-,- R9 INV_PWM_ 9-,- R LCM BKLTEN R 00K_% 9-,- R LCM_CPCLK 9-,- R0 LCM_CPATA 9-,- R LCM VEN C9 0.uF_v 9- C9 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C00 0.uF_v 9- C99 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C9 0.uF_v 9- C9 0.uF_v 9- C9 0.uF_v 9- C9 0.uF_v 9- C0 0.uF_v 9- C0 0.uF_v 9- C0 0.uF_v 9- C 0.uF_v 9- C9 0.uF_v 9- C9 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v 9- C 0.uF_v Place to near NB PE_C_TXP0 PE_C_TXN0 PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP9 PE_C_TXN9 PE_C_TXP0 PE_C_TXN0 PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN CLOE TO CRETLINE R9 R PM :, M : ON M :, PM : ON M : ON, PM : 0 OHM CHANE by 0-Nov-00 Crestline- IZE COE OC. NUMBER REV A C Model_No X0 HEET 0 OF

21 HOT COE HEET CHANE by OF IZE OC. NUMBER Layout notes: Trace need be 0 mils - 0-Oct-00 Crestline- C A Model_No X0 REV uF_v C.9_% R0 R.9_% - H_R#_ H_COMP W W H_COMP# B H_WIN H_TRY# B - - H_HIT# E C H_HITM# 0 H_LOCK# H_RCOMP C H_REQ#_0 M H_REQ#_ E A H_REQ#_ H H_REQ#_ H_REQ#_ B H_R#_0 E H_R#_ H K H_RY# H_TBN#_0 M H_TBN#_ K A H_TBN#_ AH H_TBN#_ L H_TBP#_0 K H_TBP#_ H_TBP#_ AC H_TBP#_ AJ0 A9 H_VREF AH AH H_#_ H_#_ F H_#_ N H H_#_9 C0 H_BY# H_EFER# K H_INV#_0 L H_INV#_ H_INV#_ A H_INV#_ AE H_PWR# AH H_#_ AJ H_#_ H_#_ AH H_#_ AJ AE H_#_ AJ H_#_ H_#_9 AJ H_#_ AE H_#_0 H_#_ AJ H_#_ Y H_#_ AC AE H_#_ AC H_#_ H_#_ A H_#_ AJ9 AH H_#_9 H H_#_ AJ H_#_0 H_#_ AE9 H_#_ AE H_#_ A9 H_#_ H_#_ AC9 H_#_ AC AC H_#_ A H_#_ H_#_9 AC H_#_ H H_#_0 AB A H_#_ AB H_#_ H_#_ H_#_ W W9 H_#_ N H_#_ H_#_ Y H_#_ Y9 P H_#_9 H_#_ M W H_#_0 H_#_ N H_#_ A AE H_#_ H_#_ K9 H_#_ M W0 H_#_ Y H_#_ H_#_9 V H_#_ H_#_0 M J H_#_ N H_#_ H_#_ N C H_BPRI# E H_BREQ# F B H_CPURT# H_CPULP# E H_#_0 E H_#_ M0 H_#_0 H_#_ N H_#_ N9 H H_#_ P H_A#_ B H_A#_ C M H_A#_ C H_A#_ H_A#_ F H_A#_9 L H_A# H_ATB#_0 H 0 H_ATB#_ H_AVREF B9 H_BNR# J9 H_A#_ B E9 H_A#_ B H_A#_9 J H_A#_ H_A#_0 B H_A#_ E C H_A#_ H_A#_ A9 B9 H_A#_ H_A#_ N9 H_A#_ B H_A#_ H_A#_ K9 H_A#_ P R H_A#_9 B H_A#_0 H_A#_ H0 H_A#_ L9 H_A#_ M H_A#_ N H_A#_ H_A#_ HPLL_CLK AM AM HPLL_CLK# H_A#_0 C H_A#_ H_A#_ K H_A#_ B H_A#_ L J 9-,-,-,-,-,-,-,-,-,-,- 9-,-,-,-,-,-,-,-,-,-,- U- ITL_CRETLINE_PM_FCBA_ACER_99P uF_v ,-,-,-,-,-,-,-,-,-,- C0 _% R ,-,-,-,-,-,-,-,-,-, K_% R0 R 00_%.9_% R K_% R H_A#() H_A#(9) H_A#(0) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(0) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(9) H_A#() H_A#() H_A#() H_A#() H_A#(9) H_A#(0) H_A#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_R#(0) H_R#() H_R#() H_TRY# H_#(:0) H_#() H_#() H_#() H_#() H_HIT# H_HITM# H_LOCK# H_REQ#(0) H_REQ#() H_REQ#() H_REQ#() H_REQ#() MCH_HCOMP MCH_HWIN H_A#(:) H_REQ#(:0) H_R#(:0) CLK_R_MCHBCLK CLK_R_MCHBCLK# H_A#() H_A#() H_#(0) H_TBP#0 H_TBP# H_TBP# H_TBP# MCH_HRCOMP MCH_HCOMP H_CPURT# H_CPULP# MCH_HCOMP# MCH_HWIN MCH_HCOMP# MCH_HRCOMP H_INV# H_INV# H_PWR# H_RY# H_TBN#0 H_TBN# H_TBN# H_TBN# H_A# H_ATB#0 H_ATB# H_BNR# H_BPRI# H_BREQ#0 H_BY# H_EFER# H_INV#0 H_INV#

22 R YTEM MEMORY A R YTEM MEMORY B HEET CHANE by IZE OF REV COE OC. NUMBER X0 Model_No A C Crestline- -Oct-00 B_RA# AY B_RCVEN# B_WE# BC BA9 B_MA_ B B_MA_ B B_MA_ AW B_MA_ B_MA_ BF B_MA_ BE BA9 B_MA_ BC B_MA_ AY B_MA_ B_MA_9 B AV B_Q_ BK B_Q_ B_Q_ BK9 B_Q_ BJ B_Q_ BL BE B_Q_ AV B_Q_ B_MA_0 BC B B_MA_ B_MA_0 B B_MA_ BE B_Q B_Q9 BB0 B_Q#_0 AU0 B_Q#_ BC0 B_Q#_ BL BK B_Q#_ BK B_Q#_ BK B_Q#_ B_Q#_ BF B_Q#_ AV AT0 B_Q_0 B0 BA B_Q B_Q BB B_Q AR AT B_Q9 B_Q AV0 B_Q0 AY AY B_Q AU B_Q B_Q AT AV9 B_Q BA0 BJ BJ B_Q BF B_Q B_Q9 BH B_Q AN0 B_Q0 B BC B_Q BK B_Q B_Q BE B_Q B BJ B_Q B_Q B_Q BE B_Q BC B B_Q9 AN B_Q BJ0 B_Q0 B_Q BL9 B_Q BK BL B_Q BK9 B_Q B_Q BK0 B_Q BJ B_Q BK B_Q B_Q9 BJ0 AW B_Q B_Q0 BL BK B_Q BK B_Q B_Q BE B_Q BK BC B_Q BC BJ B_Q BJ BL B_Q9 B_Q AW0 BK B_Q0 B_Q BK9 B_Q BK BK B_Q BJ B_Q B_Q BL B_Q BJ BF B_M_ AW AP9 B_Q0 B_Q AR B_Q0 BA9 BE0 B_Q BA B_Q B_Q AY9 B_Q BF0 BF9 B_Q BJ0 B_Q B_Q B_B_0 AY B B_B_ B B_B_ BE B_CA# B_M_0 AR0 B_M_ B9 B_M_ BK BL9 B_M_ BH B_M_ BJ B_M_ B_M_ A_RA# AY0 A_RCVEN# A_WE# BA9 ITL_CRETLINE_PM_FCBA_ACER_99P U- B0 A_MA_ BJ A_MA_ BK A_MA_ BH A_MA_ A_MA_ BL A_MA_ BK BJ A_MA_ BJ A_MA_ BL A_MA_ A_MA_9 BA BE A_Q_ BB A_Q_ A_Q_ BC A_Q_ BB A_Q_ BH BB A_Q_ AP A_Q_ A_MA_0 BJ9 B0 A_MA_ A_MA_0 BC9 A_MA_ BE A_Q A_Q9 BF A_Q#_0 AT A_Q#_ B A_Q#_ BC BA A_Q#_ BA A_Q#_ BH A_Q#_ A_Q#_ BC A_Q#_ AP AT A_Q_0 BE AR9 A_Q A_Q AN A_Q AM AN0 A_Q9 A_Q AT A_Q0 AT9 AN9 A_Q AM9 A_Q A_Q AN AW A_Q BB B BB9 A_Q BB A_Q A_Q9 AY A_Q AR A_Q0 AT AT A_Q AY A_Q A_Q BB A_Q AR AR A_Q A_Q A_Q AT A_Q BA BA A_Q9 AR A_Q BE0 A_Q0 A_Q B0 A_Q B AY9 A_Q B0 A_Q A_Q AW9 A_Q AW A_Q AW A_Q A_Q9 AY AY A_Q A_Q0 AV AT A_Q AV A_Q A_Q AT A_Q AW AV A_Q AU BE A_Q B BE0 A_Q9 A_Q BA BF A_Q0 A_Q BH A_Q B0 BF0 A_Q AR0 A_Q A_Q AW0 A_Q AT9 AY A_M_ AN AR A_Q0 A_Q AW A_Q0 B BJ A_Q BB A_Q A_Q B0 A_Q BH9 BE A_Q AW A_Q A_Q A_B_0 BB9 BK9 A_B_ BF9 A_B_ BL A_CA# A_M_0 AT A_M_ B A_M_ B AW A_M_ AW A_M_ B A_M_ A_M_ ITL_CRETLINE_PM_FCBA_ACER_99P U TP -,- TP - - -,- -,- -,- -,- -,- -,- -,- -,- -,- -,- - -,- -,- -,- - MA_A() MA_A() MA_A() MA_Q#() MA_Q#() MB_A() MB_WE# MA_A(:0) MA_M() MA_A() MA_A() MA_A() MA_A() MA_A() MA_A() MA_A() MA_A(9) MA_A(0) MA_M() MA_M() MA_M() MA_M() MA_M() MA_Q(0) MA_Q() MA_Q() MA_Q() MA_Q() MA_Q() MA_Q#() MA_Q#() MA_Q#() MA_Q#() MA_Q#() MA_Q() MA_A(0) MA_A() MA_Q() MA_M() MA_M(0) MB_ATA(:0) MA_Q#(0) MB_M(:0) MB_Q(:0) MB_Q#(:0) MB_A() MB_A() MB_A(:0) MB_CA# MB_RA# MB_A(9) MB_A(0) MB_A() MB_A() MB_A() MB_A() MB_A() MB_A() MB_A() MB_A() MA_ATA(:0) MA_B0# MA_B# MA_B# MA_Q(:0) MA_Q#(:0) MA_M(:0) MA_CA# MA_RA# MA_WE# MB_B0# MB_B# MB_B# MB_A(0)

23 POWER POWER HEET REV OF 0 mils from Cavity Capacitors Cavity Capacitors PLACE THE EE the Edge IZE Place C where LV and R taps. Cavity Capacitors X0 Model_No A C Crestline- 9-Oct-00 OC. NUMBER COE CHANE by uf_0v C0 C uf_0v 0.uF_.v C C 0.uF_.v 0.uF_.v C C 0.uF_v 0.uF_v C R POWERPA 00 PA9 VCC_M_ BA VCC_M_ VCC_M_9 BA VCC_M_LF AW BC9 VCC_M_LF BE9 VCC_M_LF VCC_M_LF B VCC_M_LF B AW VCC_M_LF VCC_M_LF AT 9-,-,-,-,-,-,-,-,-,-,- VCC_M_0 BJ BK VCC_M_ BK VCC_M_ VCC_M_ BK VCC_M_ BK BL VCC_M_ AU0 VCC_M_ AV VCC_M_ VCC_M_ AW VCC_M_ AW AY VCC_M_0 VCC_M_ BF VCC_M_ B B VCC_M_ B VCC_M_ VCC_M_ BH VCC_M_ BH BH VCC_M_ BJ VCC_M_ VCC_M_9 BJ VCC_M_ AU VCC_M_0 VCC_M_ BB VCC_M_ BC BC VCC_M_ VCC_M_ BC B VCC_M_ B VCC_M_ VCC_M_ BE VCC_M_ BE BE VCC_M_9 AU VCC_M_ BF AR VCC_AX_NCTF_ AR VCC_AX_NCTF_ VCC_AX_NCTF_9 AR U VCC_AX_NCTF_ VCC_AX_NCTF_0 V V VCC_AX_NCTF_ V9 VCC_AX_NCTF_ VCC_AX_NCTF_ Y U VCC_AX_NCTF_9 AU VCC_M_ BA VCC_AX_NCTF_ AP VCC_AX_NCTF_ AP VCC_AX_NCTF_9 T VCC_AX_NCTF_ AP9 VCC_AX_NCTF_0 AP0 VCC_AX_NCTF_ AP VCC_AX_NCTF_ AP VCC_AX_NCTF_ AP VCC_AX_NCTF_ AR0 VCC_AX_NCTF_ AR VCC_AX_NCTF_ VCC_AX_NCTF_ AL0 VCC_AX_NCTF_ AL VCC_AX_NCTF_9 T VCC_AX_NCTF_ AL VCC_AX_NCTF_0 AM VCC_AX_NCTF_ AM VCC_AX_NCTF_ AM9 VCC_AX_NCTF_ AM0 VCC_AX_NCTF_ AM VCC_AX_NCTF_ AM VCC_AX_NCTF_ AP VCC_AX_NCTF_ AH VCC_AX_NCTF_9 AH9 T VCC_AX_NCTF_ VCC_AX_NCTF_0 AJ VCC_AX_NCTF_ AJ VCC_AX_NCTF_ AJ9 AK VCC_AX_NCTF_ AK9 VCC_AX_NCTF_ AL VCC_AX_NCTF_ AL VCC_AX_NCTF_ AL9 AC VCC_AX_NCTF_9 AC T VCC_AX_NCTF_ VCC_AX_NCTF_0 AC9 VCC_AX_NCTF_ A VCC_AX_NCTF_ A VCC_AX_NCTF_ A VCC_AX_NCTF_ AF VCC_AX_NCTF_ AF9 VCC_AX_NCTF_ AH VCC_AX_NCTF_ AH Y VCC_AX_NCTF_9 Y T9 VCC_AX_NCTF_ VCC_AX_NCTF_0 Y VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y9 VCC_AX_NCTF_ AA VCC_AX_NCTF_ AA VCC_AX_NCTF_ AB VCC_AX_NCTF_ AB9 VCC_AX_NCTF_ V0 VCC_AX_NCTF_9 T VCC_AX_NCTF_ V VCC_AX_NCTF_0 V VCC_AX_NCTF_ V VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y9 VCC_AX_NCTF_ VCC_AX_NCTF_ Y0 VCC_AX_NCTF_ VCC_AX_9 T VCC_AX_NCTF_ U VCC_AX_NCTF_0 U9 VCC_AX_NCTF_ U0 VCC_AX_NCTF_ U VCC_AX_NCTF_ U VCC_AX_NCTF_ U VCC_AX_NCTF_ V VCC_AX_NCTF_ V VCC_AX_NCTF_ V9 VCC_AX_NCTF_ VCC_AX_ AH VCC_AX_0 AH VCC_AX_ A VCC_AX_ VCC_AX_ AJ0 VCC_AX_ AN VCC_AX_ W Y VCC_AX_ AA0 VCC_AX_ VCC_AX_ AA VCC_AX_ AA AA VCC_AX_0 A0 A VCC_AX_ A VCC_AX_ VCC_AX_ A VCC_AX_ AF AF VCC_AX_ AA VCC_AX_ VCC_AX_ AH0 VCC_AX_ AH AH VCC_AX_9 W AB AB VCC_AX_ AB9 VCC_AX_ VCC_AX_ AC0 AC VCC_AX_ VCC_AX_ AC VCC_AX_ AC AC VCC_AX_ AC VCC_AX_ VCC_AX_9 AC9 VCC_AX_ T VCC_ VCC_ R0 VCC_ AT AH VCC_ VCC_ AC AC VCC_ AK VCC_ VCC_ AJ VCC_ AJ AH VCC_9 VCC_AX_ R0 VCC_AX_0 ITL_CRETLINE_PM_FCBA_ACER_99P U- VCC_ AT VCC_0 AH AH9 VCC_ AF V_NCTF_ AA9 V_NCTF_ AB V_NCTF_9 AB V_CB A V_CB B V_CB C V_CB BL V_CB BL A V_CB V_NCTF_ AM V_NCTF_ AP V_NCTF_ AP V_NCTF_9 AR V_NCTF_ T V_NCTF_0 AR9 V_NCTF_ AR V_NCTF_ U V_NCTF_ U V_NCTF_ V V_NCTF_ V AC A VCC_NCTF_ A VCC_NCTF_ VCC_NCTF_9 AF V_NCTF_ T V_NCTF_0 A9 V_NCTF_ A V_NCTF_ AF V_NCTF_ AF V_NCTF_ AK V_NCTF_ AM VCC_NCTF_ U VCC_NCTF_ VCC_NCTF_ U U VCC_NCTF_ VCC_NCTF_ U VCC_NCTF_ U V VCC_NCTF_ V VCC_NCTF_ VCC_NCTF_9 V VCC_NCTF_ AC V VCC_NCTF_0 VCC_NCTF_ VCC_NCTF_ AR Y VCC_NCTF_ VCC_NCTF_ Y Y VCC_NCTF_ Y VCC_NCTF_ VCC_NCTF_ Y VCC_NCTF_ T0 T VCC_NCTF_9 AC VCC_NCTF_ VCC_NCTF_0 T U9 VCC_NCTF_ VCC_NCTF_ AM AL VCC_NCTF_ VCC_NCTF_ AL VCC_NCTF_ AA AA VCC_NCTF_ AA VCC_NCTF_ VCC_NCTF_9 AP VCC_NCTF_ AB AP VCC_NCTF_0 VCC_NCTF_ AR AH AH VCC_NCTF_ VCC_NCTF_ AH AJ VCC_NCTF_ AJ VCC_NCTF_ VCC_NCTF_ AK VCC_NCTF_ AK AK VCC_NCTF_9 AB VCC_NCTF_ VCC_NCTF_0 AK A VCC_NCTF_ AJ AL VCC_AXM_NCTF_ AM VCC_AXM_NCTF_ VCC_AXM_NCTF_ AM AM9 VCC_AXM_NCTF_ VCC_AXM_NCTF_ AM AM VCC_AXM_NCTF_ AM VCC_AXM_NCTF_9 AB VCC_NCTF_ AF VCC_NCTF_0 VCC_NCTF_ AH VCC_NCTF_ AP9 VCC_AXM_NCTF_ AP AP VCC_AXM_NCTF_ VCC_AXM_NCTF_ AP AL9 VCC_AXM_NCTF_ AL VCC_AXM_NCTF_ VCC_AXM_NCTF_ AL VCC_AXM_NCTF_ AR VCC_AXM_NCTF_ AR AR VCC_AXM_NCTF_9 VCC_AXM_NCTF_ AL AT VCC_AXM_ AT VCC_AXM_ AK9 VCC_AXM_ AK VCC_AXM_ AK VCC_AXM_ VCC_AXM_ AJ AJ VCC_AXM_ VCC_AXM_NCTF_ AL VCC_AXM_NCTF_0 -,-,9-,-,-,-,-,- 9-,-,-,-,-,-,-,-,-,-,- 9-,-,-,-,-,-,-,-,-,-,- -,-,9-,-,-,-,-,- U- ITL_CRETLINE_PM_FCBA_ACER_99P C 0.uF_v 9-,-,-,-,-,-,-,-,-,-,- C 0uF_v_R C9 uf_.v uf_.v C - 9-,-,-,-,-,-,-,-,-,-,- - R - C9 0uF_v_mR_Panasonic C uf_.v 0.uF_v C0 C 0.uF_v C uf_0v C0 uf_.v C 0.uF_.v 0.uF_.v C0 0.uF_.v C 0.uF_v C 0.uF_v C0 C0 0.uF_v C9 0uF_v_mR_Panasonic uf_.v C9 C0 0.uF_.v 0.uF_.v C0 0.uF_v C09 R +V. +VFX_CORE +VFX_CORE +V. +VFX_CORE

24 POWER PM :, M : ON REV OC. NUMBER M : ON, PM : 0 OHM M :, PM : ON HEET 00mA 0mA 0mA CHANE by IZE OF 0mA COE Place on the Edge -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- -Oct-00 X0 Model_No A C Crestline- 00mA 0.uF_v C9 000pF_0v R C uf_.v R _ C C uf_.v_ C9 uf_0v C9 0uF_v_mR_Panasonic - C 0.uF_.v C.uF_.v C 0.uF_.v _ R C 0.uF_v uf_.v C0 R BLMPNJ L0 BLMA L 0_% R 0.uF_v C VTT_ R VTT_0 VTT_ R R VTT_ VTT_ U VTT_ U9 VTT_ U U VTT_ VTT_ U U VTT_ VTT_9 U -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- VTT_0 U T VTT_ VTT_ T T0 VTT_ VTT_ T9 T VTT_ VTT_ T T VTT_ VTT_ T T VTT_9 U BK BJ VCC_M_CK_ VCC_M_CK_ BJ A VCC_TX_LV VA_AC_B B VA_LV B VA_PE_B K9 A VTTLF VTTLF F AH VTTLF VTT_ U AJ0 VCC_HV_ C0 B0 VCC_HV_ A VCC_PE_ VCC_PE_ W0 W VCC_PE_ V9 VCC_PE_ VCC_PE_ V0 VCC_RXR_MI_ AH0 AH VCC_RXR_MI_ BK VCC_M_CK_ VCC_M_CK_ AT VCC_AX_ VCC_AX_ AU VCC_AX_ AU AT9 VCC_AX_ VCC_AX_ AT AT0 VCC_AX_ VCC_AX_NCTF AR9 B VCC_AXF_ VCC_AXF_ B A VCC_AXF_ VCC_MI VCCA_TVB_AC_ B VCCA_TVC_AC_ VCCA_TVC_AC_ A VCC_CRT M AN VCC_HPLL VCC_LV_ J VCC_LV_ H VCC_PE_PLL U N VCC_QAC L9 VCC_TVAC J VCCYNC AU AT VCCA_M_ VCCA_M_ AT VCCA_M_9 AT9 BC9 VCCA_M_CK_ BB9 VCCA_M_CK_ AR VCCA_M_NCTF_ VCCA_M_NCTF_ AR C VCCA_TVA_AC_ VCCA_TVA_AC_ B VCCA_TVB_AC_ C B VCCA_LV A VCCA_MPLL AM K0 VCCA_PE_B U VCCA_PE_PLL VCCA_M_ AW AT VCCA_M_0 VCCA_M_ AT AV9 VCCA_M_ AU9 VCCA_M_ VCCA_M_ AU VCCA_M_ A VCCA_CRT_AC_ B VCCA_CRT_AC_ A0 VCCA_AC_B B9 VCCA_PLLA VCCA_PLLB H9 AL VCCA_HPLL C9 uf_.v ITL_CRETLINE_PM_FCBA_ACER_99P U- 0.uF_.v C90 C 0.uF_.v 0.uF_v C C uf_.v R _ -,9-,-,- L BLMPNJ -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- 0.uF_v C9 C 0.uF_v -,-,9-,-,-,-,-,- -,-,9-,-,-,-,-,- 0.uF_v C C -,9-,-,- -,9-,-,- 0uF_.v C 0uF_.v C 0.uF_v C9 uf_0v C0 uf_0v 0.uF_v C0 0.uF_v C C0 uf_0v -,9-,-,- -,9-,-,- R0 0 R _ 0-,- _ R9 9-,-,-,-,-,-,-,-,-,-,-.uF_.v C C0 uf_.v - 0.uF_v C C0 uf_0v - BLMA L.uF_.v C - BLMA L R _ 0.uF_v C L BLMA C 0.uF_v C 0.uF_v L9 BLMPNJ C9 0uF_v_R C 0.uF_v 0uF_v_R C C 0.uF_v -,9-,-,- C uf_.v uf_.v C9 9-,-,-,-,-,-,-,-,-,-,- -,9-,-,-,-,-,-,-,-,- C 0.uF_v R _ C L0 BLMPNJ 0.uF_v C9 uf_.v 0-,- 0.uF_v C 0uF_.v C uf_.v C uf_0v C -,9-,-,- 0.uF_v C0 000pF_0v C 0uF_.v C 0.uF_v C C 0.uF_v -,9-,-,- C 0.uF_v -,-,9-,-,-,-,-,- - L BLMA C 0.uF_v C uf_0v C0 uf_.v C0 0.uF_v C 0.uF_v -,9-,-,- - - R _ +VCCA_CRT_AC +V._PE +V._PE -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- CHENMKO_BAT_P 09 +V. +VCC_CRT +VCCA_TVAC +V. +V. +V._PEPLL +V +V._MPLL +V._LV +V._HPLL +VCCA_PLLB +VCCA_PLLA +VCCA_TVAC +V._LV +V +V. +V. +V. +V. +VCC_QAC +V._PEPLL +V._LV +V. +V. +V. +V. +V. +V. +V +V +V

25 V V Crestline- C A Model_No X0 -Oct-00 CHANE by HEET OF IZE COE OC. NUMBER REV R V_0 V_0 AA V_0 AB A V_0 V_09 AF AF9 V_0 AT V_ V_ AV V_ H0 Y V_9 Y Y V_9 V_9 Y9 Y V_9 Y0 V_99 V_00 Y P9 V_0 V_0 T9 V_0 T T V_0 V_ V_ U0 V_ V V V_ W V_ V_ W9 V_9 W W V_90 V_9 W W V_9 Y V_9 V_9 V_ P9 P V_ P V_ V_ P V_ P0 R9 V_ V_9 T9 T V_0 T V_ V_ U U M9 N V_ V_ N V_ N N9 V_ N V_ V_ N N9 V_9 V_0 N V_ N9 N V_ L L V_ V_ L L V_ L9 V_ V_ M V_ M M V_ V_9 M9 M V_0 M0 V_ V_ J V_0 J V_ V_ J J9 V_ V_ K K V_ K V_ V_ L L V_9 V_0 L0 V_ V_9 V_0 V_ H V_ V_ H H V_ H V_ V_ J V_ J J V_ V_9 J V_ V_9 F0 V_0 V_ V_ 9 V_ V_ V_ 9 V_ V_ V_ V_0 9 E0 V_09 V_0 E V_ E E V_ V_ E E V_ F9 V_ V_ F V_ F F0 ITL_CRETLINE_PM_FCBA_ACER_99P V_99 C C0 V_00 C V_0 V_0 V_0 V_0 V_0 9 V_0 V_0 AV V_9 AW V_9 V_9 AW V_99 AW U-0 AT AT9 V_ AU V_ V_9 AU V_9 AB AU9 V_90 V_9 AU V_9 AU AU9 V_9 V_9 AU AV9 V_9 V_ V_ AP0 V_ AR AR V_9 AB0 V_ V_0 AR9 AR V_ AR V_ V_ AR AT0 V_ V_ AT V_ AM V_ AM V_ V_9 AN AA9 V_ AN V_0 V_ AN9 V_ AN AN V_ V_ AN AP V_ AP AK V_ AK AK V_9 V_ AA V_0 AK AK V_ AL V_ V_ AM AM V_ V_ AM V_ AM V_ AJ V_ V_9 AJ V_ AA AJ V_0 V_ AJ9 V_ AJ AJ V_ V_ AJ AJ9 V_ AK0 V_ V_ V_ A A V_9 A V_ V_0 A A0 V_ AH V_ V_ AH0 AH V_ V_ AH V_ AH9 AJ V_ V_9 A V_ A AE0 V_0 V_ AE V_ AE AF0 V_ V_ AF AF V_ AF V_ V_ A V_9 V_9 C A V_ V_0 A A V_ A9 V_ V_ A A V_ V_ A V_ A9 A V_ A0 BL V_ V_9 BL A V_9 BL V_90 V_9 C C V_9 V_9 C9 C V_9 V_9 C9 C V_9 C V_ V_9 BK9 V_ AC BK V_0 V_ BK0 V_ BK BK V_ BK V_ V_ BL V_ BL BL9 V_ BH V_9 BH V_ AC BJ V_0 BJ V_ V_ BJ V_ BJ BJ V_ BJ V_ V_ BK V_ BK BK V_9 B AC9 V_ B9 V_0 V_ B9 B V_ B V_ V_ B V_ BH BH0 V_ BH V_ V_ V_9 AC V_ V_0 BE0 BE V_ V_ BE V_ BE BF V_ BF V_ V_ BF B9 V_ V_ B BC0 V_ AC BC V_0 V_ B B V_ B V_ V_ B V_ B B V_ V_ BE BE9 V_ BE AC0 V_ V_0 BB BB0 V_ V_ BB V_ BB9 BB V_ BC V_ V_ BC BC V_ V_ BC V_9 AB B V_0 V_ B B V_ B V_ V_ BA V_ BA BA V_ V_ BA BA V_ BB V_9 AB V_0 AY AY V_ V_ AY0 V_ B0 B0 V_ B V_ V_ B9 B0 V_ V_ B V_9 B V_ AW V_00 V_0 AW9 AW V_0 AW V_0 V_0 AW V_0 AY0 AY V_0 V_0 AY AY V_0 AY V_09 V_ U-9 ITL_CRETLINE_PM_FCBA_ACER_99P A V_ AB V_0 R R R R

26 R9 0K_% R0 0K_% MA_A(:0) MA_Q#(:0) MA_M(:0) MA_Q(:0) - MA_Q#(0) MA_Q#() MA_Q#() MA_Q#() MA_Q#() MA_Q#() MA_Q#() MA_Q#() MA_A(0) MA_A() MA_A() MA_A() MA_A() MA_A() MA_A() MA_A() MA_A() MA_A(9) MA_A(0) MA_A() MA_A() MA_A() MA_A() MA_B# MA_B0# MA_B# M_C0# M_C# M_CLK_R0 M_CLK_R0# M_CLK_R M_CLK_R# M_CKE0 M_CKE MA_CA# MA_RA# MA_WE# ICH MCLK ICH MATA MA_Q(0) MA_Q() MA_Q() MA_Q() MA_Q() MA_Q() MA_Q() MA_Q() M_OT0 M_OT MA_M(0) MA_M() MA_M() MA_M() MA_M() MA_M() MA_M() MA_M() -,- -,- 9-,- 9-,- -,- 9-,-,- 9-9-,- 9-,- -,- -,- -, ,- 9-,- - -,-,-,0- -,-,-,0- CN- 0 A0 0 A 00 A 99 A 9 A 9 A 9 A 9 A 9 A 9 A9 0 A0_AP 90 A 9 A A A A A_BA 0 BA0 0 BA 0 0# # 0 CK0 CK0# CK CK# 9 CKE0 0 CKE CA# 0 RA# 09 WE# 9 A0 00 A 9 CL 9 A OT0 9 OT 0 M0 M M M 0 M M 0 M M Q0 Q Q 0 Q Q Q 9 Q Q Q#0 9 Q# 9 Q# Q# 9 Q# Q# Q# Q# Q0 Q Q 9 Q Q Q Q Q Q Q9 Q0 Q 0 Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q 0 Q Q Q Q Q Q9 9 Q0 Q Q 0 Q Q Q Q 9 Q 9 Q Q9 9 0 Q0 Q Q 9 9 Q MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA(9) MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA(9) MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA(9) MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA(9) MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA(9) MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA() MA_ATA(9) MA_ATA(0) MA_ATA() MA_ATA() MA_ATA() - MA_ATA(:0) +V. -,-,9-,-,-,-,-,- Layout notes: Place these Caps closed o-imm0 C 0.uF_v C 0.uF_v C0 0.uF_v C0 0.uF_v C C9 C09 C C -.uf_.v.uf_.v.uf_.v.uf_.v.uf_.v +V -,0-,-,-,-,-,9-,0-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- C0 C0 9-0.uF_v M_VREF PM_EXTT#0.uF_v -,9-,- PLACE BETWEEN IMM0 AN IMM C C 0.uF_v.uF_v PLACE BETWEEN IMM0 AN IMM CN- V V V 9 V 9 V V V V V9 0 V0 V 0 V 99 VP NC 0 NC 0 NC 9 NC NCTET VREF N N V V V V V V V V V9 V0 V V 9 V 9 V V V V V V9 V0 V 9 V V V 0 V V V 9 V V9 V0 V V V V V 90 V 9 V V V9 V0 V V V V V V V V V9 V0 9 9 V V V 0 V V V 0 V FOX_A0ANNF_IMM_00P FOX_A0ANNF_IMM_00P R OIMM0 +V. -,-,9-,-,-,-,-,- C 0.uF_v C 0.uF_v C0 0.uF_v C9 0.uF_v C 0.uF_v C 0.uF_v C 0.uF_v C 0.uF_v CHANE by -ec-00 R-IMM-0 IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

27 - MB_B# MB_B0# MB_B# M_C# M_C# M_CLK_R M_CLK_R# M_CLK_R M_CLK_R# M_CKE M_CKE MB_CA# MB_RA# MB_WE# ICH MCLK ICH MATA M_OT M_OT -,- -,- -,- 9-,- 9-, ,- 9-,- -,- -,- -,- -,-,-,0- -,-,-,0-9-,- 9-,- CN- 0 A0 0 A 00 A 99 A 9 A 9 A 9 A 9 A 9 A 9 A9 0 A0_AP 90 A 9 A A A A A_BA 0 BA0 0 BA 0 0# # 0 CK0 CK0# CK CK# 9 CKE0 0 CKE CA# 0 RA# 09 WE# 9 A0 00 A 9 CL 9 A OT0 9 OT 0 M0 M M M 0 M M 0 M M Q0 Q Q 0 Q Q Q 9 Q Q Q#0 9 Q# 9 Q# Q# 9 Q# Q# Q# Q# Q0 Q Q Q 9 Q Q Q Q Q Q9 Q0 Q Q 0 Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q 0 Q Q Q Q 9 Q9 Q0 Q Q Q 0 Q Q 9 Q Q Q 9 9 Q9 Q0 0 Q 9 Q Q 9 FOX_A0A_MAT_F_00P +V. - -,-,9-,-,-,-,-,- -,-,9-,-,-,-,-,- MB_ATA(:0) Layout note: Place these Caps closed o-imm C9 0.uF_v C9 0.uF_v C0 0.uF_v C 0.uF_v C C0 C C C +V C 0.uF_v.uF_.v.uF_.v.uF_.v.uF_.v.uF_.v.uF_v C MB_A(:0) 9-,-,- +V R 0K_% R 0K_% MB_M(:0) MB_Q(:0) - MB_Q#(:0) - M_VREF -,9-,- C 0.uF_v.uF_v C +V. PM_EXTT# -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- 9- CN- V V V 9 V 9 V V V V V9 0 V0 V 0 V 99 VP NC 0 NC 0 NC 9 NC NCTET VREF N0 N V V V V V V V V V9 V0 V V 9 V 9 V V V V V V9 V0 V V 9 V 0 V V V 9 V V V9 V0 V V V V V 90 V V 9 V V9 V0 V V V V V V V V V9 9 V0 V 9 V V V 0 V 0 V V FOX_A0A_MAT_F_00P +V. -,-,9-,-,-,-,-,- R OIMM C 0.uF_v C 0.uF_v C 0.uF_v C 0.uF_v C0 C9 C C C C C C C9 C Layout note: Place these Hi_Feq & Resistors closed MCH 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v For EMI 0.uF_v 0.uF_v 0.uF_v CHANE by -Nov-00 R-IMM- IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

28 +V0.9 -,- C C9 C0 C C C0 C C00 C C0 C9 C9 C 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v C 0.uF_v C9 0.uF_v C99 0.uF_v C9 0.uF_v C9 0.uF_v C 0.uF_v C9 0.uF_v C 0.uF_v C90 0.uF_v C 0.uF_v C 0.uF_v C 0.uF_v C 0.uF_v +V0.9 LAYOUT NOTE : PLACE ONE CAP CLOE TO EVERY PULL UP REITOR TERMINATE TO +V0.9 9-,- 9-,- -,- R _% R9 _% R0 _% R0 _% 9-,- 9-,- M_CKE0 M_CKE M_CKE M_CKE R _% R _% R9 _% R0 _% R _% R _% R09 _% R _% R _% R _% 9-,- 9-,- 9-,- 9-,- -,- -,- -,- -,- -,- -,- M_OT0 M_OT M_OT M_OT MA_B0# MA_B# MA_B# MA_WE# MA_CA# MA_RA# +V0.9 -,- R00 R R9 _% _% _% R0 _% R0 _% R _% -,- -,- -,- -,- -,- -,- MB_B0# MB_B# MB_B# MB_WE# MB_CA# MB_RA# R _% R _% R _% R0 _% 9-,- 9-,- 9-,- 9-,- M_C0# M_C# M_C# M_C# R R9 R R9 _% _% _% _% MB_A(0) MB_A() MB_A() MB_A() 9-,-,- MB_A(:0) R _% MB_A() R _% R0 _% MA_A(0) MA_A() 9-,-,- MA_A(:0) R9 R _% _% R _% MB_A() MB_A() MB_A() R _% MA_A() R9 _% MB_A() R9 _% MA_A() R9 _% MB_A(9) R _% MA_A() R99 _% MB_A(0) R _% MA_A() R0 _% MB_A() R0 _% MA_A() R9 _% MB_A() R9 _% MA_A() R0 _% MB_A() R _% MA_A() R0 _% MB_A() R _% MA_A(9) R _% MA_A(0) R _% MA_A() R _% MA_A() R _% MA_A() R _% MA_A() CHANE by -Oct-00 R-AMPIN IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

29 +V C +VBAT_CPU -,0-,- C 0uF_v_K_XR 0uF_v_K_XR PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN0 PE_C_RXP0 PE_C_RXN9 PE_C_RXP9 PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP CN ACE 0_0P +V. C C C uf_.v 0uF_.v 0.uF_v ,-,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-, , ,9-,- PE_C_TXN PE_C_TXP -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- PE_C_TXN R9 PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN0 PE_C_TXP0 PE_C_TXN9 PE_C_TXP9 PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP +V R9 +V MXM_C# PE_C_RXN PE_C_RXP PE_C_RXN0 PE_C_RXP0 CLK_R_PE_REF# CLK_R_PE_REF PLT_RT# HA YNC HA BITCLK VA_ATA VA_CLK THRM_HUTWN# CRT_HYNC CRT_VYNC CRT_CCLK CRT_CATA HA IN HA OUT MXM_ACPRE HMI_ETECT HMI_TXC# HMI_TXC HMI_TX# HMI_TX HMI_TX# HMI_TX HMI_TX0# HMI_TX0 C 0.uF_v ,-, ,- 0-,0-0-,0-0-,0-0-, CN ACE 0_0P 0- PE_C_TXN 0- PE_C_TXP 0- PE_C_TXN0 0- PE_C_TXP0 R 0-,- 0-,- R - HA RT# 0-,0- CRT_R 0-,0- CRT_ 0-,0- CRT_B 0-,- 0-,- 0-,- 0-, ,- 0-,- R9 0-,-,-,- PWR_OO_ C C0 0.uF_v 0-0-,- 0-,- 0-,- 0-,- 0-,- 0-, ,- 0-,- 0-,- 0-,- 0-, R LV_TXL0- LV_TXL0+ LCM_CPATA LCM_CPCLK LCM VEN LCM BKLTEN TM CATA TM CCLK LV_TXCU- LV_TXCU+ PIFO_HMI LV_TXU- LV_TXU+ LV_TXU- LV_TXU+ LV_TXU0- LV_TXU0+ LV_TXCL- LV_TXCL+ LV_TXL- LV_TXL+ LV_TXL- LV_TXL+ +V R 0-,-,- _ +V. - -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- C C 0.uF_v 0.uF_v R9 C 0.uF_v R90 INV_PWM_ MXM_C0# -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V VA_ATA 9- R.K_% R.K_% +V -,-,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- MK00F TM CATA 9- TM CCLK MK00F - 9- Q0 MK00F Q09 TM_CATA - TM_CCLK MXM_ATA MXM_CLK VA_CLK R0 _% - - R _% 9- CHANE by Q Q MK00F MXM CONN IZE COE OC. NUMBER REV A C Model_No X0 0-Oct-00 HEET 9 OF

30 (Layout Note: No subtrace) +V -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V_CRT 0-,- CRT_R CRT_ CRT_B R - R _ 0-,9-0-,9-0-,9- R 0_% R 0_% R 0_% L BLMBA0N L BLMBA0N L BLMBA0N C9 C C pf_0v pf_0v pf_0v CHENMKO_BAV99 CHENMKO_BAV99 CHENMKO_BAV99 CRT_L_R CRT_L_ CRT_L_B CRTECT# CN YN_00FR00ZU_P 0 +V +V -,-,0-,-,-,9-,-,-,-,-,-,-,-,9-,-,- -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- CHENMKO_BAT_P 0 C WHEN PM uf_0v R0 R.K_%.K_% +V_CRT 0-,- R.K_% R.K_% AZCV (Layout Note: No subtrace) CRT_CATA 0-,9- Q0 CRT_CCLK 0-,9- MK00F Q0 +V R 0K_% MK00F -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- +V +V_CRT 0-,- R _ R 0 AZCV_ (Layout Note: No subtrace) C9 C0 0.uF_v_ uf_0v_ CRT_HYNC U0 OE A Y N VCC OE Y A 0-,9-0-,9- CRT_VYNC CRT_HYNC_R FAIR_NCWZ_U_P_ R R CRT_VYNC_R CHANE by -Jan-00 CRT INTERFACE IZE COE OC. NUMBER REV A C Model_No X0 HEET 0 OF

31 REV HEET CHANE by IZE OF IZE OC. NUMBER OC. NUMBER COE HEET COE HMI CNTR Max VIA Allowed REV OF CHANE by -ec-00 X0 Model_No A C HMI HMI C A Model_No X0 -ec-00 R.K_% R.K_% pF_v C0 R 0K_% L0 BLMA R 0 CHENMKO_BAV99_ 0K_% 9 9 N N N N ANTA_000 9P CN0 HMI_ETECT HMI_TX# HMI_TX HMI_TX HMI_TX# TM_CCLK TM_CATA +V_CRT 9- HMI_TX0 HMI_TX0# HMI_TXC HMI_TXC#

32 +VA +V -,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,- -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- R 0K_% +V C0 0.uF_v 0K_% R -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- PA (0/) +V_LCM POWERPA 00 IBV C0 0.uF_v LCM VEN 0-,9- MK00F Q (0/) R Q C 0uF_.v C 0.uF_v +V -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- C0 Q 0.uF_v R0 R0.K_%.K_% +V +V MK00F UB_P+ UB_P- - - (0/) -,0-,-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,9-,-,-,-,-,-,9-,-,- -,-,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- CN LCM_CPCLK 0-,9- +V -,-,0-,-,-,9-,0-,-,-,-,-,-,-,-,9-,-,- U LCM BKLTEN 0-,9- R EC_BKLTEN - 0 TCZ0FU LV_TXU0+ LV_TXU- LV_TXU+ LV_TXU- LV_TXU+ LV_TXCU- LV_TXCU+ INV_PWM_ LCM_CPATA LV_TXL0- LV_TXL0+ LV_TXL- LV_TXL+ LV_TXL- LV_TXL+ LV_TXCL- LV_TXCL+ LV_TXU0-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-0-,9-,- +VBAT PA -,-,-,9-,0-, ACE 00_0P POWERPA 00 C 0.uF_v C0 000pF_0v C 0.uF_v C 0uF_v_K_XR CHANE by 0-Nov-00 LC INTERFACE IZE COE OC. NUMBER REV A C Model_No X0 HEET OF