ORION VCC_PEG_BUILD INVENTEC ORION DATE POWER DRAWER DESIGN CHECK RESPONSIBLE TITLE

Transcription

1 VCC_PE_BUIL RAWER EIN CHECK REPONIBLE EE ATE POWER ATE ATE CHANE NO. REV IZE = VER : IZE COE OC. NUMBER FILE NAME : XXXX-XXXXXX-XX A C Model_No P/N XXXXXXXXXXXX HEET OF REV X0

2 TABLE OF CONTENT PAE - C& BATTERY CHARER - BATTERY CONN - YTEM POWER(V/V) - YTEM POWER(+V./+V.) 9- YTEM POWER(+V./+VCCP) 0- CPU POWER(VCC_CORE) - R TERMINATION VOLTAE - POWER(LEEP) - POWER(EQUENCE) - CLOCK_ENERATOR - MEROM- - MEROM- - MEROM- - MEROM- 9- THERMAL&FAN CONTROLLER 0- CRETKINE- - CRETLINE- - CRETLINE- - CRETLINE- - CRETLINE- - CRETLINE- - R-IMM0 - R-IMM - R-AMPIN PAE 9- MXM CONN 0- CRT& HMI CONN - LC CONN - ICH- - ICH- - ICH- - ICH- - ICH- - KBC - CIR CONTROLLER 9- PI BIO 0- KEYBOAR CONN. - FINER PRINTER BOAR - HA COEC - AUIO JACK ENE - UBWOOFER - HP,MIC&. JACK - PEAKER CONN - EATA/ATA CONN - O CONN 9- UB CONN 0- IN /9 CONTROLLER PAE - in /9 CONN - EXPRECAR CONN - WLAN/PARE MINI-CAR - LAN INTERFACE - TRANFORMER&RJ CONN - OCKIN CONN - CREW - TV TUNER CONN 9- WABCAM CONN 0- BLUETOOTH CONN - PWR&LI WITCH & LE - LE/WITCH CONN - AUHTER BOAR - WITCH BOAR (R) - WITCH BOAR (L) CHANE by JM FEN -Feb-00 IZE COE OC. NUMBER A C Model_No HEET OF REV X0

3 HMI TM XP Merom P P-P Thermal ensor P9 C/C ystem power BATTERY ystem Charger P0 P-P LCM ual Backlight P LV MXM-HE CONN M/M P9 X PCIE FB Crestline 99 PCBA PM P0-P ual Channel R Interface R ual OIMM P-P IC9LPRBLFT Clock generator P CRT P0 RB Fix O P IE MI PCI Ricoh RC P0-P 9 in UB_0/// UB Ports UB_ Webcam UB_ Expresscard UB_ Fingerprint UB_ Bluetooth UB_ TV TUNER UB_9 ocking P9 P9 P P P0 P P UB ATA_0 H ATA_ H P ATA_0_ ICH-M BA P-P PCIE PCIE_ PCIE_ Expresscard PCIE_ Minicard WLAN PCIE_ PARE MINI-CAR PCIE_ E-ATA P P P P PCIE_ NC Keyboard Touch PA P0 KBC Contrller LPC PCIE_ PCIE_ NIC MAVERALL E0 P-P RJ ual CAP Buttons&LEs P ITE ITE P BIO PI Flash MB MXL00 P9 ITE ITE0E CIR P P HAL Audio Code igmatel TAC9 P TPA00 TLV& TPA00 P P CHANE by ual Omni Mic Ext Mic In Four. Lineout P ual Headphones P Four atellites 0mm Woofer JM FEN P P 0-Nov-00 Block iagram IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

4 +V. CHCTRL_ (99FU) LP_#_R +V. HEET M_VREF V._P I_AP +V VCCP_P V._P LP_# +VA PWR_OO_ AP_PRE CHANE by +VAL LP_# +V Main Battery (BQ) VR_PWR_CK0 AP_I +V. LR V._P AP_PRE PM_PRLPVR +VCCP +VCC_CORE IO POWER PI# LP_# +V. (TP) elector LP_# LR Adapter (AP0) OC. NUMBER KBC_PW_ON +V0.9 +VA COE IZE BATT_CLK BATT_ATA BATT_IN OF +VBC Charger C A Model_No X0 JM FEN -Nov-00 IMVP VI LP_#_R REV (TP0) LP_#_R (APL9) +VAL +VBATR /.V LR (9)

5 R R C uf_v 0 +VBATR BATT_CLK BATT_ATA C9 BAT - -,-,-,0-,9-,-,-,-,- AP_PRE Q FBZ Q FBZ R0 K_% R9 R9 R9 R99.K_% C C.uF_v R 00K_% CHARE_ R9.0K_% C9 C 0.uF_v Kevin sense 0.uF_v R9 9.K_% CHCTRL_ R90 K_% C uf_0v R 0mOHM-%-W R9.K_% -,-,-,0-,9-,-,-,-,- - BATT_IN C 0.uF_v CHARE_ U09 BATT_T VCC ACN ACP T BYPA# ACET VREF 0 A CHEN# CL A ALARM# R.K_% C0 C 0.0uF_0v.uF_v ACRV# Y BATRV# PVCC 0 HIRV 9 PH BTT REN LORV P YNP YNN 0 RP RN 9 BAT EAO EAI FBO IYNET IOUT TML TI_BQ_QFN_P C 0.uF_0v CHARE_ 9 R9 I_AP Q9 FBZ Q FBZ C0 0.uF_v R0 0._% C9 uf_.v BAT_0V_0.A R9 R00 K_% 0K_% R0 R9 C 00K_% 00K_% pf_0v C C 00pF_0v 00pF_0v CHARE_ C C C 0.uF_v uf_v uf_v Q F L IL0R_00_R Q F90A CHANE by C Kevin sense 0uF_v_K_XR CHARE_ JM FEN R0 0.0_%_W C0 0.uF_v C 0.uF_v +VBATR - - CHARE_ +VA -,-,-,-,-,-,-,-,-,-,-,0-,-,- R0 0K_% +VAL -,-,-,-,-,- L NFM0R0T PA0 +VAP +VAPTR L A POWER_PA_P NFM0R0T +VAPTR C90 0pF_0v C C C999 C9 0pF_0v 0.uF_v 0.uF_v uf_v R K_% - AP_I -,- -,- -,-,- C 0.0uF_0v C C 0.uF_v 0.uF_v CHARE_ CHARE_ -Jan-00 Q FBZ +VBC - Q FBZ C9.uF_v C0.uF_v C &BATTERY CHARER IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

6 +VAL -,-,-,-,-,9-,-,- -,-,-,-,-,9-,-,- R 0K_% R0 0K_% +VBC - BATT_ATA BATT_CLK BATT_T -,- -,- - R0 00_% R0 00_% R K_% CN0 C C 0.uF_v YN_00MR000ZL_P -,-,-,-,-,9-,-,- +VAL +VAL 00 CHENMKO_BAV99 0 CHENMKO_BAV99 CHANE by JM FEN -Jan-00 BATTERY CONN IZE COE OC. NUMBER A C Model_No HEET OF REV X0

7 +VAL +VBATP - AP_PRE KBC_PW_ON -,-,- - U TCETFU 0 R R9.K_% R0 0K_% 0 0 C R -,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- A_00mil +VA MAXV PA0 POWERPA 00 C0 uf_0v -,-,-,-,-,-,-,-,-,-,-,0-,-,- +VA A_00mil PA00 POWERPA 00 C0 uf_0v R.K_% C L0 LF0T_RNR C0 0uF_v - R 9.K_% +VBATP 0 R 9 0 EN EN C POO R EN VBT 0.uF_v._% RVH LL RVL _ C0.uF_v Q C0 F900A.uF_v R U VO COMP VFB VREF VFB COMP VO P C 9 VRE 0 VFILT VRE VIN C P R0.K_% KIPEL TONEL 0 POO EN 9 VBT RVH LL RVL TI_TP0_QFN_P R 0K_% R9 C.uF_v R R0 C 0uF_.v -,-,-,-,-,-,- -,-,-,-,-,-,- -,9- RMRT# 0.uF_v R._% C LP_#_R - Q0 F VREF -,- C0 C09.uF_v.uF_v L0 LF0T_RNR Q F90A +VBATP C 0uF_.v_OCON +VAL -,-,-,-,9-,-,- -,- +VAL +VBATR -,-,0-,9-,-,-,-,- PA0 POWERPA_A For power test VREF -,- 000pF_0v C C 0uF_.v C0 0.uF_v R C uf_.v CHANE by JM FEN -Jun-00 YTEM POWER(V/V) IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

8 R 0.K_% R 0.K_% R 0.K_% R.K_% C C V._P -,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- - V._P C C.uF_v +V..uF_v 9-,-,0-,-,- Q9 I00Y PA L0 LF0T_R0NR POWERPA_A C Q FA 0uF_v_mR_Panasonic +VBATR -,-,-,0-,9-,-,-,-,- C.uF_v +V. 9-,-,-,0-,-,-,-,- PA L LF0T_R0NR POWERPA 00 C 0uF_v_9mR_Panasonic 0.uF_v C R._% R POO 9 VBT 0 RVH EN LL RVL TI_TPRER_QFN_P VO P VFB TONEL TRIP VFILT VIN VFB TRIP VO P POO U EN VBT RVH LL 0 RVL 9 R._% C R 0.uF_v 9-,-,-,-,-,-,-,- R +VBATR LP_#_R -,-,-,0-,9-,-,-,-,- -,-,9- - +VA LP_#_R Q0 F C.uF_v Q FA C R9 C R.K_% R 0K_% uf_.v.uf_.v R9 CHANE by JM FEN -Feb-00 YTEM POWER(+V./+V.) IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

9 -,-,0-,-,-,-,0-,-,-,-,-,-,9-,- +VA +V. -,-,-,0-,-,-,-,- C9 +V. +V. +VCCP C uf_.v 9-,-,-,-,-,-,-,-,-,- -,-,0-,-,- -,-,-,-,-,-,-,-,- +VCCP 9-,-,-,-,-,-,-,-,-,- R0 R0 LP_#_R _ -,9-,-,-,-,-,-,-,- uf_.v POK U VCNTL EN FB VIN 9 VIN VOUT VOUT C uf_.v ANPEC_APL9_KAC_TRL_OP_P C9 uf_.v C9 9pF_0v R0.K_% R 0K_% -,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- +V C9 0.uF_0v Q C9 F90A.uF_.v R U0 VCC P R 0K_% RV AJ EN C9 0.0uF_v MT_9_AJTBUf_OT_P R R9 R R C90 R _% C9 0uF_.v_R R 00_% -,9-,-,-,-,-,-,-,- - V._P VCCP_P - LP_#_R CHANE by JM FEN -May-00 YTEM POWER(+V./+VCCP) IZE COE OC. NUMBER REV A C Model_No X0 HEET 9 OF

10 +V R K_% -,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- +VBATR R009 -,-,-,0-,9-,-,-,-,- C 0.uF_v K_% N U 0-,- +VA R K_% B VRMPWR -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- TI_NLVCCKR_C0_P C C9 0.uF_0v C 00uF_v.uF_.v LAYOUT NOTE: C9 C0 C0 PIN CONNECT TO Q, Q C0 C C PIN CONNECT TO Q, Q0 0uF_v_K_XR PI# H_PRTP# VR_PWR_CK0 - -,0-,- H_VI H_VI H_VI H_VI H_VI H_VI H_VI0 +VCC_CORE R R 0-,-,- TP00 TP00 TP0 TP00 TP0 TP009 TP0 R9 C uf_0v R CPU_INNAL_ROUN C uf_0v R 0 BATC_0V_0.A U 0 IN BT RVH 9 RVL W CROWBAR VCC RVL AI_AP9_RM_MOP_0P +VA R._% C 0.uF_0v -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- C C9 C 0.0uF_0v Q09 FA 9 Q IP_T_E Q0 C 000pF_0v FA L0 ETQPLRWFC_PANAONIC R90 +VA PWR_OO_ 0-,-,9- -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- PWR_OO_ VR_PWR_CK0 CLK_PWR 0-,-,9-0-,-,- -,- R0 C9 0.0uF_v C9 0pF_0v CPU_INNAL_ROUN PM_PRLPVR 0-,- 0.00uF_0v C9 CPU_INNAL_ROUN R _ R 99_% EN PWR PELAY CLKEN FBRYN FB TML VI0 0 VI 9 VI VI VI VI VI PRTP PI VCC COMP W 9 TET W 0 PRLP U AI_AP0_LFCP_0P ILIMIT VRPM RRPM RT RAMPAJ LLET CREF CUM 9 CCOMP 0 TTENE 0 9 VRTT CM O PWM PWM PWM W * R ph= R0 R9 R * ph=0ohm C.uF_.v 0 BATC_0V_0.A +VA -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- CHANE by JM FEN Q C FA 000pF_0v C NTC of 0K R0 C0 R R C CPU_INNAL_ROUN K_% * C 0pF_v R9 K_% 0K_%.uF_.v.K_% 0uF_v_K_XR 000pF_0v ph=.k R pf_0v.k_% R C0 C C C0 9 C0 0._% C Q CPU_INNAL_ROUN R BATC_0V_0.A IP_T_E * R R0 000pF_0v K_% * R 00pF_0v 0.0uF_0v C9 0K_% 0K_% R 0.uF_0v 0pF_0v.K_% ph=0k U0 0K_% ph=0k 0 IN BT C0 RVH 9 R RVL W 000pF_0v L0 0K_% CROWBAR VCC RVL ETQPLRWFC_PANAONIC CPU_INNAL_ROUN AI_AP9_RM_MOP_0P R R 0K_% CPU_INNAL_ROUN - VCCENE * R - VENE +VBATR Q 0K_% Q C0 -,-,-,0-,9-,-,-,-,- 000pF_0v R0 K_% FA FA ph install C C0 000pF_0v 000pF_0v CPU_INNAL_ROUN R9 U IN BT 0 9 RVH W RVL CROWBAR VCC RVL AI_AP9_RM_MOP_0P R._% C 0.uF_0v 0uF_v_K_XR C9 C C0 0.0uF_0v Q FA 9 Q IP_T_E L0 ETQPLRWFC_PANAONIC R9 -Mar-00 CPU POWER(VCC_CORE) IZE COE OC. NUMBER REV A C Model_No X0 HEET 0 OF

11 LP_#_R +VA -,-,9-,0-,-,-,0-,-,-,-,-,-,9-,- +V ,9-,-,-,-,-,-,- +V. R -,9-,-,0-,-,-,-,- U EN VTT VTT_IN VTT VCC C0.uF_.v VREF VQ 9 TML-PA MT_99FU_OP_P 0-,-,- M_VREF C0 uf_.v C 0uF_.v C 0uF_.v C0 0.uF_0v NOTE: R REULATOR CHANE by JM FEN -Oct-00 R TERMINATION VOLTAE IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

12 +V. +V. -,9-,-,0-,-,-,-,- 9-,- +VAL -,-,-,-,-,-,-,-,-,-,-,0-,-,- +VA Q AO09 C0 00pF_v R 00K_% R _% Q MK00F +V 9-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9-0-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- +V C9 0uF_.v 000pF_0v R R 00K_% Q FR0P Q AO09_ C09 -,-,-,-,-,-,- +VA -,-,9-,0-,-,-,0-,-,-,-,-,-,9-,- Q0 MK00F C0 0uF_.v +VAL +V. 9-,-,-,-,-,-,-,-,- R 00K_% C 0.0uF_v Q9 FCAN Q R9 0K_% FCAN R Q MK00F C0 0uF_.v R9 -,-,-,-,-,-,- Q MK00F -,9-,-,-,-,-,-,- LP_#_R R 0K_% U0 TCET0F Q MK00F -,9- LP_#_R -,- LP R CHANE by POWER(LEEP) IZE COE OC. NUMBER REV A C Model_No X0 JM FEN -May-00 HEET OF

13 V._P V._P V._P VCCP_P R 0K_% R 0K_% R 0K_% R K_% VREF - +V 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- LP_#_R -,9-,-,-,-,-,-,- R 0 K_% CHENKO_LL_P+VA_KBC - R 00K_% R9 0K_% 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- +V R M_% +VA -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- U-A + OUT - ON_LM9R_OP_P C 0.uF_0v 9-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- +V R.K_% R 0K_% R 0K_% R0 C9 9.9K_% 000pF_0v 0-,-,9- PWR_OO_ -,-,-,-,-,-,-,-,-,-,-,0-,-,- +VA -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- R 9 CHENKO_LL_P +VA M_% R 0K_% PWR_OO_ 0-,-,9- R R 0K_% 0K_% C0 0.uF_v R +VA_KBC - U-B + - OUT ON_LM9R_OP_P C 0.uF_v - PWR_OO_KBC +VAL -,-,-,-,9-,-,- R 00K_% C uf_0v - VCC_POR#_ CHANE by JM FEN -Oct-00 POWER(EQUENCE) IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

14 +V. +V 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- CR#_E CR#_F Byte:bit=0,disable CR#_E;,enable CR#_E RC Byte:bit=0,disable CR#_F;,enable CR#_F RC Layout note: All decoupling 0.uF disperse closed to pin C C C C9 C0 C 0.0uF_v 0.0uF_v 0.0uF_v 0.0uF_v 0.0uF_v 0.0uF_v +VCCP L9 BLMA Layout note: All decoupling 0.uF disperse closed to pin C C C C C.uF_.v 0.0uF_v 0.0uF_v 0.0uF_v 0.0uF_v -,9-,0-,-,- L0 BLMA C.uF_.v 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- +V +V R9 0K_% R0 0K_% R9 0K_% R R9 0K_% CR#_ CR#_H Byte:bit=0,disable CR#_;,enable CR#_ Byte:bit=0,disable CR#_H;,enable CR#_H FA 0 FB RC9 RC0 CPU_BEL CPU_BEL CLK REF FC 0 0 R.K_% CPU_BEL0 -,0- CLK_R_ICH - C R _% +V pf_0v - R R R FB CLOCK FREQUENCY 00 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- CLKREQ_R_MCH# CLK_PWR VR_PWR_CK0 +V R 0K_% 0-0K_% 0K_% R R9 _ HOT CLOCK FREQUENCY 00 +VCCP R 0K_% 9-,-,-,-,-,-,-,-,-,- CLKREQ_R_ATA# CLK_R_CIRPCI CLK_R_CBPCI ICH MCLK ICH MATA C0 pf_0v ,- 9-,-,-,9-,-,-,- 9-,-,-,9-,-,-,- X0.MHZ 9-,-,-,-,-,-,-,-,-,- 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- - -,0- -,0-0-,- 0- C 0PPM R9 0K_% 0K_% R R _% R _% R._% R._% C C0 pf_0v R CLK ICH R0 CLKREQ_ATA# CLK CIRPCI CLK CBPCI U VRC_IO VRC_IO VRC_IO V9_IO 9 VRC VREF 0 VPLL_IO 9 VCPU_IO 9 V VPCI VCPU V 0 UB_MHZ_FLA FLB_TET_MOE REF0_FLC_TET_EL PCI0_CR#_A PCI_CR#_B PCI_TME PCI CK_PWR_P# CLK TAT 0 X 9 X PCI 9 RC 9 RC RC REF CPU NC PCI_TOP# CPU_TOP# CPUT_F CPUC_F 0 CPUT0 CPUC0 CPUT_ITP_RCT CPUC_ITP_RCC RCT_CR#_H RCC_CR#_ RCT0 RCC0 RCT9 0 RCC9 RCT_CR#_F RCC_CR#_E RCT 0 RCC PCI elect PCI_F_ITP_EN RCT RCC RCT_CR#_C RCC_CR#_ RCT_ATAT RCC_ATAC MHz_Non_RCT_E MHz RCC_E RCC0_OTT_9 RCT0_OTC_9 IC_IC9LPR0HLFT_TOP_P CLK_MCHBCLK CLK_MCHBCLK# CLK_CPUBCLK CLK_CPUBCLK# CLK_XP CLK_XP# CLK_PCIE_CAR CLK_PCIE_CAR# CLK_PCIE_MINI CLK_PCIE_MINI# CLK_PE_REF CLK_PE_REF# CLK ICHPCI CLK_PE_MCH CLK_PE_MCH# CLK_PCIE_ICH CLK_PCIE_ICH# CLK_ATA CLK_ATA# CLK_PCIE_LAN CLK_PCIE_LAN# CLK_PCIE_EATA CLK_PCIE_EATA# CLK KBPCI _% _% _% R R R R R R0 R R R R R _% R _% R R9 R _% R99 R00 R R R R9 R9 R9 R9 R9 R9 R9 R9 R9 R90 0K_% PCITOP#_ CPUTOP#_ CLK_R_MCHBCLK CLK_R_MCHBCLK# CLK_R_CPUBCLK CLK_R_CPUBCLK# CLK_R_XP CLK_R_PCIE_L CLK_R_PCIE_L# CLK_R_XP# CLKREQ_ECAR# CLKREQ_MINI# CLK_R_PCIE_CAR CLK_R_PCIE_CAR# CLK_R_PCIE_MINI CLK_R_PCIE_MINI# CLKREQ_R_L# CLK_R_PE_REF CLK_R_PE_REF# CLK_R_MINICAR CLK_R_KBPCI CLK_R_ICHPCI CLK_R_PE_MCH CLK_R_PE_MCH# CLK_R_PCIE_ICH CLK_R_PCIE_ICH# CLK_R_ATA CLK_R_ATA# CLK_R_PCIE_LAN CLK_R_PCIE_LAN# CLK_R_PCIE_EATA CLK_R_PCIE_EATA# *CLKERQ# pin controis RC Table Please place close to CLKEN within 00mils 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- C9 C C Byte:bit =0(PW) Byte:bit = Byte:bit =0(PW) Byte:bit = +V +V CR#_A CR0 CR Byte; bit=0,disable CR#_A;,enable CR#_A CR#_B CR CR Byte; bit=0,disable CR#_A;,enable CR#_B ITP_EN=0 RC/RC# ITP_EN= ITP/ITP# R R0 0K_% R0 R09 0K_% _elet=0 LC_T 00MHZ _elet= MHZ non-spread clock CR#_C Byte:bit =0(PW) Byte:bit = CR0 CR Byte; bit=0,disable CR#_C;,enable CR#_C CR#_ Byte:bit0 =0(PW) Byte:bit0 = CR CR Byte; bit=0,disable CR#_;,enable CR#_ CLK REF - R _% R9 _% R _% LAYOUT NOTE : THE R9, R9, R9 CLOE TO U900 CHANE by C JM FEN C - - C0 CLK_R_KBC CLK_R_CIR CLK_R_ICH -Mar-00 CLOCK_ENERATOR IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

15 H_A#(:) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(9) H_A#(0) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_REQ#(:0) H_A#() H_A#() H_A#(9) H_A#(0) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(9) H_A#(0) H_A#() H_A#() H_A#() H_A#() H_A#() - - H_REQ#(0) H_REQ#() H_REQ#() H_REQ#() H_REQ#() H_ATB#0 H_ATB# H_A0M# H_FERR# H_INNE# CN0- J A# L A# L A# K A# M A# N A# J A9# N A0# P A# P A# L A# P A# P A# R A# M ATB0# K REQ0# H REQ# K REQ# J REQ# L REQ# Y A# U A# R A9# W A0# U A# Y A# U A# R A# T A# T A# W A# W A# Y A9# U A0# V A# W A# AA A# AB A# AA A# V ATB# A A0M# A FERR# C INNE# AR ROUP 0 AR ROUP ICH XP/ITP INAL CONTROL A# H E BNR# BPRI# H EFER# RY# F BY# E F BR0# IERR# 0 B INIT# LOCK# H C REET# R0# F F R# R# TRY# HIT# E HITM# BPM0# A A BPM# A BPM# BPM# AC PRY# AC AC PREQ# AC TCK AA TI TO AB AB TM AB TRT# BR# C0 THERMAL PROCHOT# THERMA A B THERMC THERMTRIP# C ,- AP_PRE_PU CHENMKO_BAT_P +VCCP 0mils/0mils R9 _% 0-, ,-,-,-,-,-,-,-,-, H_A# H_BNR# H_BPRI# H_EFER# H_RY# H_BY# H_BREQ# H_INIT# H_LOCK# H_CPURT# H_TRY# H_HIT# H_HITM# H_BPM0_XP# H_BPM_XP# H_BPM_XP# H_BPM_XP# H_BPM_PRY# H_BPM_PREQ# H_TCK H_TM H_TRT# XP_BREET# PM_THRMTRIP# H_R#(0) H_R#() H_R#() +VCCP R9 _% CLOE TO CPU H_R#(0:) R.9_% R _ OHM +/- % PULL-UP TO +VCCP IF ITP I IMPLEMENTE +VCCP H_TO 9-,-,-,-,-,-,-,-,-,- +VA R9 R9 _% -,-,-,-,-,-,-,-,-,-,-,0-,-,- K_% H_THERMA THERM_MINU ,-,-,-,-,-,-,-,-, ,-,-,-,-,-,-,-,-, TI_FLEX +VCCP H_TPCLK# H_INTR H_NMI H_MI# TPCLK# C LINT0 B LINT A MI# H CLK A BCLK0 BCLK A - - CLK_R_CPUBCLK CLK_R_CPUBCLK# M RV0 N RV0 REERVE T RV0 V RV0 B RV0 C RV0 RV0 RV0 RV09 F RV00 FOX_PZK_M P MCH CPU ICH +VCCP +VCCP R.9_% R.9_% R0.9_% R.9_% ,-,-,-,-,-,-,-,-,- - - H_BPM_PREQ# TI_FLEX H_TM H_TCK PM_THRMTRIP# should be T at CPU MEROM- IZE COE OC. NUMBER REV A C Model_No X0 CHANE by JM FEN -Apr-00 HEET OF

16 H_#(:0) H_TBN#0 H_TBP#0 H_INV#0 -, H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() CN0- E 0# F # E # # F # # E # E # K # 9# J 0# J # H # F # K # H # J TBN0# H TBP0# H INV0# ATA RP 0 ATA RP # Y AB # V # # V # V T # U # 9# U 0# Y W # Y # # W # W AA # # AA AB # TBN# Y AA TBP# U INV# H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() -, H_#(:0) H_TBN# H_TBP# H_INV# +VCCP R0 K_% H_#(:0) -,- Layout note:zo= ohm 0." max for TLREF H_TBN# H_TBP# H_INV# CPU_BEL0 CPU_BEL CPU_BEL R9 R C N # K # P # R 9# L 0# M # L # M # P # P # P # T # R # L 9# T 0# N # L TBN# M TBP# N INV# A C C AF AF A B B C TLREF TET TET TET TET TET TET BEL0 BEL BEL ATA RP MIC ATA RP AE # 9# A 0# AA AB # AB # # AC # A0 AE # AF # # AC # AE A 9# AC 0# # A AF # # AC AE TBN# TBP# AF AC0 INV# COMP0 COMP COMP COMP PRTP# PLP# PWR# PWROO LP# PI# R U AA Y E B AE FOX_PZK_M P R R 9-,-,-,-,-,-,-,-,-,- 0-,0-,- R._% R.9_% R._% R.9_% +VCCP H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_TBN# H_TBP# H_INV# H_CPULP# PI# -,- H_#(:0) R0 9-,-,-,-,-,-,-,-,-,- R9 K_% H_#() H_#() H_#() H_#(9) H_#(0) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(9) H_#(0) H_#() -,0- -,0- -,0- - CLOE TO CPU H_PRTP# - H_PLP# - H_PWR# H_PWR H_PWR_XP Please series resister R=K on H_PWR_XP without stub CHANE by JM FEN -Oct-00 MEROM- IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

17 +VCC_CORE 0-,- +VCC_CORE 0-,- CN0- A AB0 VCC00 VCC0 A9 VCC00 VCC09 AB PLACE THEE INIE OCKET C C C A0 C C VCC00 VCC00 AC A AC9 VCC00 VCC0 CAVITY ON L (NORTH IE A VCC0 AC VCC00 A AC 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v VCC00 VCC0 A ECONARY) AC VCC00 VCC0 A VCC0 AC VCC00 A0 VCC0 AC VCC009 B A VCC00 VCC0 B9 VCC0 A9 VCC0 B0 A0 VCC0 VCC09 C C C B A C0 C VCC0 VCC00 B VCC0 A VCC0 B A VCC0 VCC0 B 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v VCC0 VCC0 A B VCC0 VCC0 A B0 AE9 VCC0 VCC0 C9 AE0 VCC09 VCC0 C0 VCC00 VCC0 AE C AE VCC0 VCC0 C VCC09 AE VCC0 C9 C C C C C VCC090 AE VCC0 C AE VCC0 VCC09 C VCC0 VCC09 AE0 9 AF9 PLACE THEE INIE OCKET 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v VCC0 VCC09 0 AF0 VCC0 VCC09 CAVITY ON L (OUTH IE VCC0 VCC09 AF AF VCC09 VCC09 AF ECONARY) VCC00 VCC09 AF VCC0 VCC09 AF +VCCP VCC0 VCC099 C C9 C E C9 C9 VCC0 VCC000 AF0 9-,-,-,-,-,-,-,-,-,- E9 VCC0 E0 VCCP0 VCC0 V 0uF_.v 0uF_.v E 0uF_.v 0uF_.v 0uF_.v VCC0 VCCP0 E VCC0 VCCP0 J E K VCC0 VCCP0 E M C VCC09 VCCP0 E VCC00 VCCP0 J 0uF_v_mR_Panasonic E0 K VCC0 VCCP0 PLACE THEE INIE OCKET F VCCP0 M VCC0 C90 C C C0 CAVITY ON L (NORTH IE C C0 F9 VCCP09 N VCC0 F0 N VCC0 VCCP0 F R VCC0 VCCP PRIMARY) 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v F VCCP R VCC0 F VCCP T VCC0 F VCC0 VCCP T +V. F V VCC09 VCCP F0 W VCC00 VCCP 9-,-,-,-,-,-,-,-,- AA VCC0 AA9 VCC0 VCCA0 B AA0 C PLACE THEE INIE OCKET VCC0 VCCA0 C9 C C C AA C C9 VCC0 CAVITY ON L (OUTH IE AA A 0- VCC0 VI0 H_VI0 AA AF 0- VCC0 VI H_VI ECONARY) 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v 0uF_.v AA AE +VCC_CORE 0- VCC0 VI H_VI AA VI AF 0- VCC0 H_VI AA0 VI AE 0-,- 0- VCC09 H_VI AB9 AF 0- VCC00 VI H_VI AC0 AE 0- VCC0 VI H_VI R AB0 VCC0 00_% AB VCC0 AB VCC0 VCCENE AF 0- C C9 C AB OUTH IE ECONARY VCC0 AB 0uF_v_mR 0uF_v_mR 0uF_v_mR VCC0 AB AE 0- VCC0 VENE FOX_PZK_M P +VCCP VCCENE VENE 9-,-,-,-,-,-,-,-,-,- C C 0.0uF_v C C PLACE THEE INIE OCKET CAVITY ON L (NORTH IE ECONARY) C 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v C 0uF_.v LAYOUT NOTE: PLACE C0 NEAR PIN B C C NORTH IE ECONARY C C C 0uF_v_mR R 00_% 0uF_v_mR_ 0uF_v_mR_ LAYOUT NOTE: ROUTE VCCENE AN VENE TRACE AT. OHM WITH 0 MIL PACEIN PLACE PU AN P WITHIN I INCH OF CPU CHANE by JM FEN -ec-00 MEROM- IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

18 A CN0- FOX_PZK_M P V00 IZE HEET COE REV OF CHANE by A V AF V MEROM- C A Model_No X0 JM FEN 9-Feb-00 OC. NUMBER V AE V V AE V A AF V AF V V AF V AF AF V9 AF9 V0 V AF V0 V A V A9 A V A V AE V V AE AE V AE V V9 AE V0 AE AE9 V0 AC AC V AC V V AC9 AC V AC V A V V A V A A V9 A V9 AB V0 V AB V AB AB V AB9 V V AB V AB AC V AC V V9 AC V0 V09 AA V0 AA AA V AA V V AA V AA AA9 V V AA V AA V AB AB V09 V V V099 V V00 V0 W V0 W W V0 W V0 V0 Y V0 Y Y V0 Y V0 R V0 V09 T V090 T T V09 T V09 V09 U U V09 V09 U V09 U V V09 V0 V0 N N V0 V09 N N V00 P V0 P V0 V0 P P V0 R V0 V0 R R V0 K K V0 V0 K L V09 V00 L V0 L L V0 V0 M V0 M V0 M M V0 V0 V0 H H V0 V09 H H V00 J V0 V0 J J V0 V0 J K V0 F V0 F V0 F F V0 V0 F F9 V09 V00 F V0 F F V0 V0 V0 V0 V0 E E V0 V0 E E V0 V09 E E V00 E9 V0 V0 E E V0 V0 V0 V0 C C V0 V0 V0 V0 V09 V00 V0 9 V0 V0 V0 V0 B B9 V0 V0 B V0 B V0 C C V0 V09 C C V00 C V0 V0 C9 C A V00 A V00 V00 A V00 A A9 V00 A V00 V00 AF V009 B V00 B V0 B B

19 +V 9-,-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- C9.uF_.v Q0 AO09 C0 0.0uF_v CPU FAN CN ENTERY_0_B0_0E_P +V 9-,-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- C.uF_.v Q0 AO09 C 0.0uF_v PU FAN CN0 VCC REFENCE MLX_9_0_P 9-,-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- +V 9-,-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- +V PWM CPU_FAN# THERM WARN# - 9- U0 TCET0F R 0K_% PWM PU_FAN# - R00 _ U0 TCET0F R0 0K_% +V +V 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- C0 R.K_% 00pF_0v R0 - H_THERMA - THERM_MINU 9- THERM WARN# 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- C9 0.uF_v R0 U0 V CLK + ATA - ALERT# THERM# MT Pf_MOP_P This resistor is needed to place close to PM_THRMTRIP# -,-,-,9-,-,-,- -,-,-,9-,-,-,- -,- ICH MCLK ICH MATA THERM_CI# LAYOUT NOTE: PUT THE THERMAL ENOR CLOE TO CPU CHANE by JM FEN -May-00 THERMAL&FAN CONTROLLER IZE COE OC. NUMBER REV A C Model_No X0 HEET 9 OF

20 CHANE by JM FEN -Feb-00 ITL_CRETLINE_FCBA_99P BJ NC BK NC BK0 NC BL0 NC BL9 NC BL NC BL NC BK NC BJ NC9 E NC0 A NC C NC B0 NC A0 NC A9 NC BK NC MIC TET_ A R TET_ H VO_CTRL_CLK K VO_CTRL_ATA 9 CLK_REQ# ICH_YNC# 0 CLKREQ_R_MCH# MCH_ICH_YNC# R 0K_% R 0.uF_v NC C R 9_% ITL_CRETLINE_FCBA_99P ME AM9 CL_CLK CL_ATA AK0 CL_PWROK AT AN9 CL_RT# CL_VREF AM0 BM_BUY# H_PRTP# - PM_EXTT#0 - PM_EXTT# 0 PM_PWROK -,- PLT_RT# R09 PM_THRMTRIP# PM_PRLPVR - CL_RT#0 R R -,- K_% CPU_BEL0 -,- R0 CPU_BEL K_% P CF_0 R CPU_BEL -,- N CF_ 0- K_% N MCH_CF(0:) CF_ MCH_CF() C CF_ MCH_CF() C CF_ MCH_CF() F CF_ MCH_CF() N CF_ MCH_CF() CF_ MCH_CF() J0 CF_ MCH_CF(9) C0 CF_9 MCH_CF(0) R CF_0 MCH_CF() L CF_ +V MCH_CF() J CF_ MCH_CF() E CF_ MCH_CF() E0 CF_ MCH_CF() K CF_ MCH_CF() M0 R CF_ MCH_CF() M R 0K_% CF_ L 0K_% MCH_CF() CF_ MCH_CF(9) N CF_9 MCH_CF(0) L CF_0 0-,-,- PM_PWROK - R K_% 0-,- 0-,- -,- PM_BM_BUY# L9 PM_PRTP# L PM_EXT_T#_0 J PM_EXT_T#_ AW9 PWROK AV0 RTIN# N0 THRMTRIP# PRLPVR PM CL_CLK0 CL_ATA0 -,9-,-,-,- RAPHIC VI 0- B VRMPWR +V. K CRT_C_CLK CRT_C_ATA F CRT_HYNC C CRT_TVO_IREF E CRT_VYNC 0-,-,- R0 0-,-,- TP99 TP999 TP E FX_VI_0 A9 FX_VI_ FX_VI_ C B9 FX_VI_ FT_VR_EN E F9 CRT_RE E9 CRT_RE# TP99 TP99 VA PE_TX_0 M T PE_TX_ T PE_TX_ PE_TX_ N0 PE_TX_ R U PE_TX_ W PE_TX_ PE_TX_ Y Y9 PE_TX_ PE_TX_9 AC PE_TX_0 A AC0 PE_TX_ A PE_TX_ PE_TX_ A9 AE0 PE_TX_ AH PE_TX_ H CRT_BLUE CRT_BLUE# K9 CRT_REEN J9 CRT_REEN# MCH_CF() PB X CLK ENABLE HIH=REERVE PE_TX#_ AE9 PE_TX#_ PE_TX#_ AH LOW=CALITOA MI_TXP_ AM9 AM MI_TXP_ PE_TX#_ AC AH9 CF MI_TXP_0 MI_TXP_ AJ M TV_CONEL0 P TV_CONEL PE_TX#_0 PE_TX#_ AC9 AJ MI_RXP(0) MI_RXP() MI_RXP() MI_RXP() - MI_RXP(:0) MCH_CF() (FB ynamic OT) MI_TXN_0 AJ AJ MI_TXN_ MI_TXN_ AM0 MI_TXN_ AM LOW=ynamic OT isable HIH=ynamic OT Enable PE_TX#_ W A9 PE_TX#_9 AC MI_RXN() MI_RXN() F TVA_RTN J TVB_RTN L TVC_RTN TV PE_TX#_ Y W PE_TX#_ MI MI_RXN(0) MI_RXN() E TVA_AC TVB_AC K TVC_AC AM MI_RXP_0 MI_RXP_ AJ9 AN MI_RXP_ AN MI_RXP_ CLK - - PCI-EXPRE RAPHIC PE_TX#_ R0 PE_TX#_ PE_TX#_ T PE_TX#_ U N MI_TXP(0) MI_TXP() MI_TXP() MI_TXP() - MI_RXN(:0) N PE_TX#_0 U9 PE_TX#_ PE_RX_ A PE_RX_ M_VREF_0 M_VREF_ AW AR9 M_RCOMP_VOH M_RCOMP_VOL BL BK 0-0- RV M_RCOMP BL BK M_RCOMP# LV 0=ALL-Z MOE ENABLE =NORMAL OPERATION H0 RV0 B RV BJ0 RV BK RV BF9 RV BH0 RV BK RV BJ RV BF RV B RV9 BC RV0 B RV BJ9 RV BE RV BH9 RV AW0 RV BK0 RV C RV RV B RV9 C RV0 A RV B RV B RV B RV C RV MI_RXN_0 AN AJ MI_RXN_ AN MI_RXN_ AN MI_RXN_ - MI_TXP(:0) MI_TXN() MI_TXN() E A A LVB_ATA_0 LVB_ATA_ LVB_ATA_ PE_RX_ A9 AH MI_TXN(0) MI_TXN() PE_RX_ AH PE_RX_ PE_RX_0 AC AC PE_CLK K K PE_CLK# CLK_R_PE_MCH CLK_R_PE_MCH# - MI_TXN(:0) LVB_ATA#_0 B LVB_ATA#_ B LVB_ATA#_ PLL_REF_CLK H H PLL_REF_CLK# W PE_RX_ PE_RX_ W AB0 PE_RX_ PE_RX_9 Y PLL_REF_CLK PLLREF_CLK# C PE_RX_ T9 T PE_RX_ B C 0.uF_v 0 LVA_ATA_0 E0 LVA_ATA_ F LVA_ATA_ PE_RX_ M PE_RX_ PE_RX_ U MA_A() MB_A() PE_RX_0 J0 L ,-,- M_VREF LVA_ATA#_0 E LVA_ATA#_ F9 LVA_ATA#_ M_RCOMP_VOH M_RCOMP_VOL R0 0_% R0 0_% PE_RX#_9 A PE_RX#_0 PE_RX#_ A0 PE_RX#_ A AH9 PE_RX#_ A PE_RX#_ PE_RX#_ A -,- -,- -,- XOR/ALLZ M_OT_0 BH BJ M_OT_ BJ M_OT_ M_OT_ BE M_OT PE_RX#_ AB W9 PE_RX#_ Y Y0 PE_RX#_ M_OT0 M_OT M_OT +V. L LV_IB L LV_VB N LV_VREFH N0 LV_VREFL LVA_CLK# C LVA_CLK E LVB_CLK# LVB_CLK MCH_CF(:) 00=PARTIAL CLOCK ATIN IABLE 0=XOR MOE ENABLE PE_RX#_ T0 PE_RX#_ PE_RX#_ U0.uF_.v MCH_CF(9) PCIE raphics Lane HIH=Normal operation LOW=Reverse Lane R MUXIN B0 M_C#_0 BK M_C#_ M_C#_ B BE M_C#_ 0.0uF_v PE_RX#_ N T -,- -,- C M_CKE_0 BE9 AY M_CKE_ B9 M_CKE_ M_CKE_ B AW0 M_CK#_0 M_CK#_ BA M_CK#_ AW M_CK#_ AW (CPU trap) HIH=Moblie CPU INTERPOERABILITY MOE MCH_CF() LOW=RV U0- P RV P RV R RV N RV AR RV AR RV AM RV AN RV J RV9 AR RV0 AM RV AL RV AM RV 0 RV 0- J0 L_BKLT_CTRL H9 L_BKLT_EN E9 L_CTRL_CLK E0 L_CTRL_ATA C L_C_CLK L_C_ATA K0 L_V_EN PE_RX#_0 L PE_RX#_ -,- M_C0# M_C# M_C# M_C# R0 K_% C9 J -,- N PE_COMPI PE_COMPO M M_CKE0 M_CKE M_CKE M_CKE M_RCOMP_VOL U R0 K_% -,- M_CLK_R0# M_CLK_R# M_CLK_R# M_CLK_R# M_CK_0 AV9 BB M_CK_ BA M_CK_ AV M_CK_ 0- R0 K_% 0.0uF_v.uF_.v MCH_CF(9) 0- - M_CLK_R0 M_CLK_R M_CLK_R M_CLK_R MCH_CF(0) MCH_CF(0) (PCIE BACKWAR C HIH=MIx +V. C MCH_CF() LOW=MIx -,- -,9-,-,-,0-,-,-,-,- M_RCOMP_VOH R R MCH_CF(9) (MI LANE REVERAL) R R R R MCH_CF() 0- MCH_CF(9) MCH_CF() ,9-,-,-,0-,-,-,-,- - -,- -,- -,- -,- -, ,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- VCC ELECT MCH_CF() +V MCH_CF() LOW=.0V HIH=.V LOW=NORMAL HIH=LANE REVERE LOW=ONLY VO OR PCIE X I OPERATIONAL HIH=VO AN PCIE X ARE OPERATIN IMULTANEOULY VIA THE PE PORT +VCC_PE R.9_% PE_C_RXN0 PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN9 PE_C_RXN0 PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXN PE_C_RXP0 PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP9 PE_C_RXP0 PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_C_RXP PE_TXN0 PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN9 PE_TXN0 PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXP0 PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP9 PE_TXP0 PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP CRETLINE- IZE COE OC. NUMBER A C Model_No HEET 0 OF REV X0

21 HOT COE Trace need be 0 mils REV Layout notes: OF IZE Model_No X0 JM FEN Place to near NB HEET OC. NUMBER CHANE by Feb-00 CRETLINE--HOT C A C 0.uF_v 0-9-,-,-,-,-,-,-,-,-, C 0.uF_v C 0.uF_v 0.uF_v C 9- C99 0.uF_v 0- C 0.uF_v C 0.uF_v C 0.uF_v uF_v C uF_v C9 0.uF_v C - 0.uF_v C _% R C 0.uF_v R 00_% C 0.uF_v 0.uF_v C9 0-0.uF_v C uF_v C0 R.9_% uF_v C K_% R - 0.uF_v C C 0.uF_v C09 0.uF_v 9-,-,-,-,-,-,-,-,-, uF_v C 0- C0 0.uF_v 0-0.uF_v C C0 0.uF_v C 0.uF_v uF_v C K_% R 0.uF_v C H_R#_0 H_R#_ H_R#_ H_COMP W W H_COMP# B H_WIN B H_TRY# - H_TBP#_ A9 H_VREF E H_HIT# H_HITM# C H_LOCK# 0 H_RCOMP C M H_REQ#_0 E H_REQ#_ H_REQ#_ A H_REQ#_ H B H_REQ#_ E AE H_INV#_ H H_PWR# H_RY# K M H_TBN#_0 K H_TBN#_ H_TBN#_ A H_TBN#_ AH H_TBP#_0 L H_TBP#_ K AC H_TBP#_ AJ0 H_#_ AH H_#_ H_#_ AH F H_#_ N H_#_ H_#_9 H H_BY# C0 H_EFER# H_INV#_0 K H_INV#_ L A H_INV#_ H_#_ AE H_#_ H_#_ AH H_#_ AJ AH H_#_ AJ H_#_ H_#_ AE H_#_ AJ AJ H_#_9 H_#_ H_#_0 AE AJ H_#_ AB Y H_#_ AC H_#_ H_#_ AE H_#_ AC A H_#_ AJ9 H_#_ H_#_9 AH H_#_ H H_#_0 AJ AE9 H_#_ H_#_ AE H_#_ A9 AC9 H_#_ AC H_#_ H_#_ AC H_#_ A AC H_#_9 H H_#_ AB H_#_0 H_#_ A N N H_#_ W H_#_ H_#_ W9 H_#_ N Y H_#_ Y9 H_#_ H_#_9 P M H_#_ H_#_0 W N H_#_ A H_#_ H H_#_ P K9 H_#_ M H_#_ H_#_ W0 H_#_ Y V H_#_9 H_#_ M H_#_0 H_#_ J H_#_ B9 C H_BNR# E H_BPRI# H_BREQ# F H_CPURT# B H_CPULP# E E H_#_0 H_#_ H_#_0 M0 N H_#_ N9 H_#_ H_A#_ H_A#_ N9 B H_A#_ C H_A#_ H_A#_ M H_A#_ C F H_A#_ L H_A#_9 H_A# H H_ATB#_0 H_ATB#_ 0 H_AVREF H_A#_ N J9 H_A#_ B H_A#_ H_A#_ E9 H_A#_9 B H_A#_ J B H_A#_0 E H_A#_ C H_A#_ H_A#_ A9 B9 H_A#_ H_A#_ J H_A#_ B K9 H_A#_ P H_A#_ H_A#_9 R H_A#_0 B H0 H_A#_ L9 H_A#_ H_A#_ H_A#_ M ITL_CRETLINE_FCBA_99P U0- HPLL_CLK AM AM HPLL_CLK# H_A#_0 H_A#_ C K H_A#_ B H_A#_ L 0.uF_v C _% R ,-,-,-,-,-,-,-,-,- - 0.uF_v C C0 0.uF_v C 0.uF_v R C0 0.uF_v R9.9_% 9-,-,-,-,-,-,-,-,-, H_RY# H_A#(:) CLK_R_MCHBCLK# 0.uF_v C H_LOCK# H_TRY# H_ATB#0 H_ATB# H_BREQ# H_BNR# H_EFER# H_PWR# H_INV#0 H_INV# H_TBN#0 H_TBP#0 H_TBP# H_HITM# CLK_R_MCHBCLK H_A#() H_A#() H_A#() H_A#() H_COMP H_CPURT# H_COMP# H_COMP# +VCCP PE_C_TXP PE_C_TXP PE_C_TXP PE_C_TXP PE_C_TXP H_CPULP# PE_C_TXP PE_C_TXP PE_C_TXP PE_C_TXP PE_C_TXP PE_C_TXP9 PE_C_TXP0 PE_C_TXN PE_C_TXN PE_C_TXN PE_C_TXP0 PE_C_TXP PE_C_TXP PE_C_TXP PE_C_TXN PE_C_TXN PE_C_TXN9 PE_C_TXN0 PE_C_TXN PE_C_TXN PE_C_TXN0 PE_C_TXN PE_C_TXN PE_C_TXN PE_C_TXN PE_C_TXN PE_C_TXN PE_TXN PE_TXN9 PE_TXN0 PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXP PE_TXN0 PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXN PE_TXP PE_TXP PE_TXP PE_TXP9 PE_TXP0 PE_TXP PE_TXP PE_TXP PE_TXP H_R#() PE_TXP0 PE_TXP PE_TXP PE_TXP PE_TXP PE_TXP H_REQ#() H_REQ#() H_REQ#() H_REQ#() H_REQ#(0) H_R#() H_R#(:0) H_TBN# H_TBP# H_HIT# H_BPRI# H_A# H_REQ#(:0) H_R#(0) H_#(0) H_#() H_#(0) H_#(:0) H_BY# H_INV# H_INV# H_TBN# H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(0) H_#() H_#(9) H_#() H_#() H_#(0) H_#() H_#(9) H_#() H_#() H_#(0) H_#() H_#(9) H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#() H_#(0) H_#() H_#(9) H_#() H_#() H_#(0) H_#() H_#(9) H_#() H_#() H_#() H_A#() H_A#(0) H_WIN H_RCOMP H_#(9) H_#() H_#() H_#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(0) H_A#(9) H_A#() H_A#(9) H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#() H_A#(0) H_RCOMP H_COMP H_WIN +VCCP +VCCP +VCCP H_TBP# H_TBN# H_A#(9)

22 IZE COE OC. NUMBER REV A C Model_No X0 CHANE by JM FEN -ep-00 HEET OF CRETLINE--R ITL_CRETLINE_FCBA_99P ITL_CRETLINE_FCBA_99P AR AR9 A_Q AN A_Q AM A_Q AN0 A_Q9 AT9 A_Q0 AN9 A_Q AM9 A_Q AN A_Q AR A_Q A_Q U0- AR A_Q0 AW A_Q BA A_Q AY A_Q AR A_Q AR A_Q AT A_Q AW A_Q BB A_Q BF A_Q9 B A_Q0 BJ A_Q BB A_Q B0 A_Q BH9 A_Q BE A_Q AW A_Q BE A_Q B A_Q BE0 A_Q9 BF A_Q0 BH A_Q B0 A_Q BF0 A_Q AR0 A_Q AW0 A_Q AT9 A_Q AW A_Q AW A_Q AY A_Q9 AV A_Q0 AT A_Q AV A_Q AT A_Q AW A_Q AV A_Q AU A_Q AT A_Q BA A_Q BA A_Q9 BE0 A_Q0 B0 A_Q B A_Q AY9 A_Q B0 A_Q AW9 A_Q B A_Q BB9 A_Q BB A_Q AY A_Q9 AT A_Q0 AT A_Q AY A_Q BB A_Q R YTEM MEMORY A U0- BB9 -,- AP9 AY A_B_0 MA_B0# A_B_ BK9 B_Q0 B_B_0 -,- AR MA_B# B_Q A_B_ BF9 B_B_ B -,- AW0 MA_B# B_Q B_B_ B AW B_Q BL -,- AN BE -,- A_CA# MA_CA# B_Q B_CA# MB_CA# - AN0 MA_M(:0) B_Q AT AV0 AR0 A_M_0 B_Q B_M_0 B AV9 B9 A_M_ B_Q B_M_ B BA0 BK A_M_ A_M_ AW B_Q B_M_ BB0 B_Q9 A_M_ AW B_M_ BL9 BA9 A_M_ B B_Q0 B_M_ BH BE0 B_Q B_M_ BJ AY BA BF A_M_ B_Q B_M_ AN AY9 AW A_M_ B_Q B_M_ - BF0 MA_Q(:0) B_Q A_Q_0 AT BF9 A_Q_ BE B_Q B_Q_0 AT0 BJ0 A_Q_ BB B_Q B_Q_ B0 BJ B_Q_ BK B_Q BC BJ BK9 A_Q_ B_Q B_Q_ BB BL BJ A_Q_ B_Q9 B_Q_ BH BK BL A_Q_ A_Q_ BB B_Q0 B_Q_ BK9 A_Q_ AP B_Q_ BE B_Q - BK MA_Q#(:0) B_Q_ AV B_Q AT BK AU0 A_Q#_0 B_Q B_Q#_0 B BJ BC0 A_Q#_ B_Q B_Q#_ BC BL BL A_Q#_ B_Q A_Q#_ BA B_Q#_ BJ B_Q#_ BK B_Q BA BJ A_Q#_ A_Q#_ BH B_Q B_Q#_ BK BK B_Q B_Q#_ BK BC BJ0 BF A_Q#_ B_Q9 B_Q#_ AP BL AV A_Q#_ B_Q0 B_Q#_ -,- BK MA_A(:0) B_Q BJ9 BK BC A_MA_0 A_MA_ B0 B_Q B_MA_0 BE A_MA_ BK B_MA_ B B_Q BK A_MA_ BH B_MA_ B B_Q BC AW B_Q B_MA_ BL BC BF A_MA_ B_Q B_MA_ BK BE BE A_MA_ B_Q A_MA_ BJ B_MA_ BC A_MA_ BJ B_MA_ BA9 B_Q B A_MA_ BL B_Q9 B_MA_ BC BJ0 B_Q0 B_MA_ AY BA BL9 B A_MA_9 B_Q B_MA_9 BC9 BK B A_MA_0 B_Q B_MA_0 BE BL BE A_MA_ A_MA_ B0 B_Q B_MA_ BK9 A_MA_ BJ B_Q B_MA_ BA9 BK0 B_MA_ B B_Q BJ B_Q -,- -,- A_RA# BE BJ AV MA_RA# B_Q B_RA# AY0 TP9 BF TP A_RCVEN# B_Q B_RCVEN# AY BH B_Q9 BA9 -,- B BC -,- A_WE# MA_WE# B_Q0 B_WE# BC B_Q BK B_Q BE B_Q B B_Q BJ B_Q BA B_Q BB B_Q AR B_Q AT B_Q9 AY B_Q0 AY B_Q AU B_Q AT B_Q MB_WE# MB_RA# R YTEM MEMORY B -,- MB_A(:0) MB_Q#(:0) - - MB_Q(:0) - MB_M(:0) MB_ATA(:0) - MA_ATA(:0) - -,- -,- -,- MB_B0# MB_B# MB_B#

23 POWER POWER OF CHANE by HEET IZE OC. NUMBER 0 mils from REV COE the Edge X0 Cavity Capacitors -Feb-00 JM FEN X0 Model_No A C CRETLINRE--POWER C 0.uF_.v 0.uF_v C 0.uF_v C 0uF_v uf_.v C 0.uF_.v C C 9-,-,-,-,-,-,-,-,-,- uf_.v 0.uF_v C C9 0.uF_v C0 C0 uf_.v C 0.uF_v V_NCTF_ AA9 V_NCTF_ AB V_NCTF_9 AB V_CB A V_CB B V_CB C V_CB BL V_CB BL A V_CB V_NCTF_ AM V_NCTF_ AP V_NCTF_ AP V_NCTF_9 AR V_NCTF_ T V_NCTF_0 AR9 V_NCTF_ AR V_NCTF_ U V_NCTF_ U V_NCTF_ V V_NCTF_ V AC A VCC_NCTF_ A VCC_NCTF_ VCC_NCTF_9 AF V_NCTF_ T V_NCTF_0 A9 V_NCTF_ A V_NCTF_ AF V_NCTF_ AF V_NCTF_ AK V_NCTF_ AM VCC_NCTF_ U VCC_NCTF_ VCC_NCTF_ U U VCC_NCTF_ VCC_NCTF_ U VCC_NCTF_ U V VCC_NCTF_ V VCC_NCTF_ VCC_NCTF_9 V VCC_NCTF_ AC V VCC_NCTF_0 VCC_NCTF_ VCC_NCTF_ AR Y VCC_NCTF_ VCC_NCTF_ Y Y VCC_NCTF_ Y VCC_NCTF_ VCC_NCTF_ Y VCC_NCTF_ T0 T VCC_NCTF_9 AC VCC_NCTF_ VCC_NCTF_0 T U9 VCC_NCTF_ VCC_NCTF_ AM AL VCC_NCTF_ VCC_NCTF_ AL VCC_NCTF_ AA AA VCC_NCTF_ AA VCC_NCTF_ VCC_NCTF_9 AP VCC_NCTF_ AB AP VCC_NCTF_0 VCC_NCTF_ AR AH AH VCC_NCTF_ VCC_NCTF_ AH AJ VCC_NCTF_ AJ VCC_NCTF_ VCC_NCTF_ AK VCC_NCTF_ AK AK VCC_NCTF_9 AB VCC_NCTF_ VCC_NCTF_0 AK A VCC_NCTF_ AJ AL VCC_AXM_NCTF_ AM VCC_AXM_NCTF_ VCC_AXM_NCTF_ AM AM9 VCC_AXM_NCTF_ VCC_AXM_NCTF_ AM AM VCC_AXM_NCTF_ AM VCC_AXM_NCTF_9 AB VCC_NCTF_ AF VCC_NCTF_0 VCC_NCTF_ AH VCC_NCTF_ AP9 VCC_AXM_NCTF_ AP AP VCC_AXM_NCTF_ VCC_AXM_NCTF_ AP AL9 VCC_AXM_NCTF_ AL VCC_AXM_NCTF_ VCC_AXM_NCTF_ AL VCC_AXM_NCTF_ AR VCC_AXM_NCTF_ AR AR VCC_AXM_NCTF_9 VCC_AXM_NCTF_ AL AT VCC_AXM_ AT VCC_AXM_ AK9 VCC_AXM_ AK VCC_AXM_ AK VCC_AXM_ VCC_AXM_ AJ AJ VCC_AXM_ VCC_AXM_NCTF_ AL VCC_AXM_NCTF_0 U0- ITL_CRETLINE_FCBA_99P 0.uF_.v C 0uF_v_mR_Panasonic C VCC_M_LF BE9 B VCC_M_LF B VCC_M_LF VCC_M_LF AW AT VCC_M_LF uf_.v C VCC_M_ VCC_M_ BL VCC_M_ AU0 VCC_M_ AV AW VCC_M_ AW VCC_M_ VCC_M_ AY VCC_M_ BA BA VCC_M_9 AW VCC_M_LF VCC_M_LF BC9 B BH VCC_M_ BH VCC_M_ VCC_M_ BH VCC_M_ BJ BJ VCC_M_9 AU VCC_M_ BJ VCC_M_0 VCC_M_ BK VCC_M_ BK BK VCC_M_ BK VCC_M_ B VCC_M_ B BE VCC_M_ BE VCC_M_ VCC_M_9 BE VCC_M_ AU VCC_M_0 BF BF VCC_M_ B VCC_M_ VCC_M_ B VCC_M_ V VCC_AX_NCTF_0 VCC_AX_NCTF_ V VCC_AX_NCTF_ V9 Y VCC_AX_NCTF_ VCC_AX_NCTF_9 U VCC_M_ AU VCC_M_0 BA BB VCC_M_ BC VCC_M_ VCC_M_ BC BC VCC_M_ AP9 VCC_AX_NCTF_ AP0 VCC_AX_NCTF_ AP VCC_AX_NCTF_ AP VCC_AX_NCTF_ AP VCC_AX_NCTF_ AR0 VCC_AX_NCTF_ AR VCC_AX_NCTF_ AR VCC_AX_NCTF_ AR AR VCC_AX_NCTF_9 VCC_AX_NCTF_ U VCC_AX_NCTF_ AM VCC_AX_NCTF_ AM VCC_AX_NCTF_ AM9 VCC_AX_NCTF_ AM0 VCC_AX_NCTF_ AM VCC_AX_NCTF_ AM VCC_AX_NCTF_ AP VCC_AX_NCTF_ AP VCC_AX_NCTF_9 AP VCC_AX_NCTF_ T VCC_AX_NCTF_0 AJ VCC_AX_NCTF_ AJ9 VCC_AX_NCTF_ VCC_AX_NCTF_ AK VCC_AX_NCTF_ AK9 VCC_AX_NCTF_ AL VCC_AX_NCTF_ AL VCC_AX_NCTF_ AL9 VCC_AX_NCTF_ AL0 VCC_AX_NCTF_9 AL VCC_AX_NCTF_ T VCC_AX_NCTF_0 AL VCC_AX_NCTF_ A VCC_AX_NCTF_ A VCC_AX_NCTF_ AF VCC_AX_NCTF_ AF9 VCC_AX_NCTF_ AH VCC_AX_NCTF_ AH VCC_AX_NCTF_ AH VCC_AX_NCTF_ AH9 VCC_AX_NCTF_9 VCC_AX_NCTF_ T AJ VCC_AX_NCTF_0 Y VCC_AX_NCTF_ Y9 VCC_AX_NCTF_ AA VCC_AX_NCTF_ AA VCC_AX_NCTF_ AB VCC_AX_NCTF_ AB9 VCC_AX_NCTF_ AC VCC_AX_NCTF_ AC VCC_AX_NCTF_9 VCC_AX_NCTF_ T AC9 VCC_AX_NCTF_0 A V VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y9 Y0 VCC_AX_NCTF_ Y VCC_AX_NCTF_ Y VCC_AX_NCTF_9 VCC_AX_NCTF_ T9 Y VCC_AX_NCTF_0 Y VCC_AX_NCTF_ VCC_AX_NCTF_ U VCC_AX_NCTF_ U VCC_AX_NCTF_ U VCC_AX_NCTF_ V VCC_AX_NCTF_ V VCC_AX_NCTF_ V9 VCC_AX_NCTF_9 V0 VCC_AX_NCTF_ T VCC_AX_NCTF_0 V VCC_AX_NCTF_ V VCC_AX_NCTF_ AN VCC_AX_ W VCC_AX_ VCC_AX_ Y VCC_AX_ AA0 AA VCC_AX_ AA VCC_AX_ VCC_AX_9 AA VCC_AX_NCTF_ T VCC_AX_NCTF_0 U VCC_AX_NCTF_ U9 VCC_AX_NCTF_ U0 VCC_AX_ VCC_AX_ AF VCC_AX_ AA AH0 VCC_AX_ AH VCC_AX_ VCC_AX_9 AH VCC_AX_ W VCC_AX_0 AH VCC_AX_ AH VCC_AX_ A AJ0 VCC_AX_ AC AC VCC_AX_ AC VCC_AX_ VCC_AX_ AC VCC_AX_ AC AC9 VCC_AX_9 T VCC_AX_ A0 VCC_AX_0 VCC_AX_ A VCC_AX_ A A VCC_AX_ AF VCC_ AC VCC_ AK AJ VCC_ AJ VCC_ VCC_9 AH R0 VCC_AX_ AB VCC_AX_0 VCC_AX_ AB VCC_AX_ AB9 AC0 VCC_AX_ VCC_AX_ AT VCC_ AH VCC_0 VCC_ AH9 VCC_ AF R0 VCC_ AT VCC_ VCC_ AH AC VCC_ U0- ITL_CRETLINE_FCBA_99P 9-,-,-,-,-,-,-,-,-,- -,9-,-,-,0-,-,-,-,- C uf_.v 0.uF_v C uf_.v C C 0.uF_.v 0.uF_.v C 9-,-,-,-,-,-,-,-,-,- C 0.uF_.v R -,9-,-,-,0-,-,-,-,- 9-,-,-,-,-,-,-,-,-,- C 0.uF_.v C 0.uF_v +VCCP +V. +VCCP +V. +VCCP +VCCP

24 POWER REV OF PLACE ON THE EE 0-Nov-00 JM FEN X0 Model_No A C CRETLINE--POWER HEET IZE CHANE by COE OC. NUMBER 0.uF_v C uf_.v C9 C9 0.uF_v U.uF_.v C U VTT_ R VTT_0 VTT_ R R VTT_ VTT_ U U9 VTT_ VTT_ U U VTT_ VTT_ U VTT_ U VTT_9 U VTT_0 U T VTT_ VTT_ T T0 VTT_ VTT_ T9 T VTT_ VTT_ T T VTT_ VTT_ T T VTT_9 VCC_M_CK_ VCC_M_CK_ BK BJ VCC_M_CK_ VCC_M_CK_ BJ A VCC_TX_LV VA_AC_B B B VA_LV VA_PE_B K9 A VTTLF VTTLF F VTTLF AH VTT_ VCC_MI AJ0 VCC_HV_ C0 B0 VCC_HV_ A VCC_PE_ VCC_PE_ W0 VCC_PE_ W V9 VCC_PE_ VCC_PE_ V0 VCC_RXR_MI_ AH0 VCC_RXR_MI_ AH BK VCCYNC AT VCC_AX_ VCC_AX_ AU VCC_AX_ AU AT9 VCC_AX_ VCC_AX_ AT AT0 VCC_AX_ VCC_AX_NCTF AR9 B VCC_AXF_ VCC_AXF_ B A VCC_AXF_ C B VCCA_TVB_AC_ B VCCA_TVC_AC_ VCCA_TVC_AC_ A VCC_CRT M AN VCC_HPLL J VCC_LV_ VCC_LV_ H VCC_PE_PLL U N VCC_QAC VCC_TVAC L9 J VCCA_M_ AU AT VCCA_M_ VCCA_M_ AT VCCA_M_9 AT9 BC9 VCCA_M_CK_ VCCA_M_CK_ BB9 AR VCCA_M_NCTF_ VCCA_M_NCTF_ AR C VCCA_TVA_AC_ B VCCA_TVA_AC_ VCCA_TVB_AC_ VCCA_HPLL VCCA_LV A VCCA_MPLL AM K0 VCCA_PE_B U VCCA_PE_PLL VCCA_M_ AW AT VCCA_M_0 VCCA_M_ AT AV9 VCCA_M_ AU9 VCCA_M_ VCCA_M_ AU U0- ITL_CRETLINE_FCBA_99P VCCA_CRT_AC_ A B VCCA_CRT_AC_ A0 VCCA_AC_B B9 VCCA_PLLA H9 VCCA_PLLB AL uf_v C C uf_v -,9-,-,0-,-,- 0.uF_v C R9 0.uF_v C 9-,-,-,-,-,-,-,-,-,- C 0.uF_v C uf_v uf_v C -,9-,-,0-,-,- C 0uF_v 0.uF_.v C 0.uF_v C C uf_.v.uf_.v C0 9-,-,-,-,-,-,-,-,-,-.uF_.v C00 -,9-,-,0-,-,- C 0.uF_.v C uf_v C -,9-,-,0-,-,- C uf_.v -,9-,-,0-,-,- 0uF_.v 9-,-,-,-,-,-,-,-,-,- uf_v C C0 uf_v C 0uF_.v 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 0.uF_v C R9 0.uF_v C 9-,-,-,-,-,-,-,-,- BLMA L0 uf_.v C L00 BLMBB 0.uF_v C C 0uF_v R uf_.v C C 0.uF_v uf_.v C C uf_v C 0.uF_.v -,9-,-,0-,-,- 0uF_.v C9 0-0uF_v C uf_.v C -,9-,-,0-,-,- -,9-,-,-,0-,-,-,- C -,9-,-,0-,-,- 0.0uF_v C uf_.v CHENMKO_BAT_P 0 C0.uF_.v -,9-,-,0-,-,- -,9-,-,0-,-,- 0uF_0v C0 +VCC_PE R +V +V. +VCCP +V. +V. +V. +V. +V. +V. +V. +V. +V. +VCCP +VCCP +V. +V. +V

25 V V Model_No A C CHANE by OF HEET COE OC. NUMBER IZE CRETLINE--POWER REV A AF V_09 V_0 AF9 V_ AT AV V_ H0 V_ -ep-00 JM FEN X0 V_9 Y V_99 Y0 Y V_00 V_0 P9 T9 V_0 T V_0 V_0 T V_0 R AA V_0 AB V_0 V_0 W W9 V_ W V_9 V_90 W W V_9 V_9 W V_9 Y Y V_9 Y V_9 V_9 Y Y9 V_9 V_ P0 V_ V_ R9 T9 V_9 V_0 T V_ T U V_ V_ U U0 V_ V V_ V_ V V_ V_ N9 V_ N N V_ V_9 N9 N V_0 N9 V_ V_ N P9 V_ V_ P V_ P P L9 M V_ M V_ V_ M M9 V_9 V_0 M V_ M0 M9 V_ V_ N N V_ N V_ J9 K V_ V_ K V_ K L V_ V_9 L L0 V_0 L V_ V_ L L V_ V_ L V_ H V_ V_ H V_ H J V_ J V_ V_ J J V_9 V_0 J V_ J J V_ V_ V_ V_ 9 V_ V_ V_ 9 V_ V_ V_9 V_0 V_ V_ H V_ V_ E E V_ V_ E V_ F9 F V_ F V_ V_ F0 F0 V_9 V_0 V_ V_0 C V_0 V_0 V_0 V_0 V_0 9 V_0 9 V_0 V_09 E0 E V_0 E AV V_9 AW AW V_9 AW V_99 ITL_CRETLINE_FCBA_99P U0-0 C V_99 V_00 C0 V_ AT9 V_ AU AU V_9 AB V_9 V_90 AU9 AU V_9 AU V_9 V_9 AU9 AU V_9 V_9 AV9 V_9 V_ AR V_ V_9 AR V_ AB0 AR9 V_0 V_ AR V_ AR AR V_ V_ AT0 AT V_ AT V_ AM V_ AM AN V_9 V_ AA9 V_0 AN AN9 V_ AN V_ V_ AN AN V_ V_ AP V_ AP AP0 AK V_ V_9 AK AA V_ AK V_0 V_ AK V_ AL AM V_ V_ AM AM V_ AM V_ V_ AJ AJ V_9 AA V_ V_0 AJ AJ9 V_ AJ V_ V_ AJ AJ V_ V_ AJ9 V_ AK0 AK V_ V_ V_9 A V_ A A V_0 V_ A0 V_ AH AH0 V_ V_ AH AH V_ AH9 V_ V_ AJ V_ A V_9 A V_ V_0 AE0 AE V_ AE V_ V_ AF0 AF V_ V_ AF V_ AF A V_ A V_9 V_ A A V_0 V_ A V_ A9 A V_ V_ A A V_ A9 V_ V_ A V_ A0 BL BL V_9 V_9 A V_90 BL C V_9 V_9 C C9 V_9 V_9 C C9 V_9 V_9 C V_9 C C BK9 V_9 AC V_ V_0 BK BK0 V_ BK V_ V_ BK V_ BK BL V_ BL V_ V_ BL9 V_ V_9 AC V_ V_0 BJ V_ BJ BJ V_ BJ V_ V_ BJ V_ BJ BK V_ BK V_ V_ BK V_9 V_ AC9 V_0 B9 B9 V_ V_ B V_ B B V_ BH V_ V_ BH0 V_ BH BH V_ BH V_ AC BE0 V_0 V_ BE BE V_ BE V_ V_ BF V_ BF BF V_ V_ B9 B V_ B V_ V_0 BC B V_ V_ B V_ B B V_ B V_ V_ B BE V_ V_ BE9 V_9 BE AC0 BB V_0 V_ BB0 BB V_ BB9 V_ V_ BB V_ BC BC V_ V_ BC BC V_ BC0 V_9 AC V_0 B B V_ V_ B V_ B BA V_ BA V_ V_ BA BA V_ V_ BA V_9 BB V_ V_0 V_ AY AY0 V_ B0 V_ V_ B0 V_ B B9 V_ V_ B0 B V_ B V_9 AB V_ AW AW9 V_0 V_0 AW V_0 AW AW V_0 AY0 V_0 V_0 AY AY V_0 V_0 AY V_09 AY AB V_ AY ITL_CRETLINE_FCBA_99P U0-9 V_ A V_0 AB V_00

26 R 0K_% MA_A(:0) M_VREF -,0-,- -,- R MA_M(:0) 0K_% MA_Q#(:0) MA_Q(:0) - MA_A() -,- -,- -,- 0-,- 0-, ,- 0-,- -,- 0-,- ICH MCLK ICH MATA MA_B# MA_B0# MA_B# M_C0# M_C# M_CLK_R0 M_CLK_R0# M_CLK_R M_CLK_R# M_CKE0 M_CKE MA_CA# MA_RA# MA_WE# -,- -,- - 0-,- M_OT0 0-,- M_OT CN0-0 A0 0 A 00 A 99 A 9 A 9 A 9 A 9 A 9 A 9 A9 0 A0_AP 90 A 9 A A A A A_BA 0 BA0 0 BA 0 0# # 0 CK0 CK0# CK CK# 9 CKE0 0 CKE CA# 0 RA# 09 WE# 9 A0 00 A 9 CL 9 A 9 OT0 OT 0 M0 M M M 0 M M 0 M M Q0 Q Q 0 Q Q Q 9 Q Q Q#0 9 Q# 9 Q# Q# 9 Q# Q# Q# Q# Q0 Q Q Q 9 Q Q Q Q Q Q9 Q0 Q Q 0 Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q 0 Q Q Q Q 9 Q9 Q0 Q Q 0 Q Q Q 9 Q Q Q 9 9 Q9 Q0 0 Q 9 Q Q 9 FOX_A0AX_NRX_RV_.mm_00P O IMM0_.mm +V. - MA_ATA(:0) 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- -,9-,-,-,0-,-,-,- Layout notes: Place these Caps closed o-imm0.uf_.v.uf_.v C C C C9 C C C0 0.uF_v 0.uF_v 0.uF_v 0.uF_v.uF_.v C9 0.uF_v +V C.uF_.v U0 TOVER - C.uF_.v R0 _.uf_.v -,9-,-,9-,-,-,- -,9-,-,9-,-,-,- - 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- C 0.uF_v R_HOT C +V.uF_.v C PM_EXTT#0 0- CN0- V V V 9 V 9 V V V V V9 0 V0 V 0 V VP V V V V V V V V V9 V0 V V 9 V 9 V V V V V V9 V0 V V 9 V 0 V V V 9 V V V9 V0 V V V V V 90 V V 9 V V9 V0 V V V V V V V V V9 9 V0 V 9 V V V 0 V 0 V V 99 NC 0 NC 0 NC 9 NC NCTET VREF 0 FOX_A0AX_NRX_RV_.mm_00P HYT VCC MAX_MAX0_OT_P U0 Layout note: Put this IC close to R CHANE by JM FEN -Feb-00 R-IMM-0 IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

27 MB_A(:0) MB_Q#(:0) OF COE IZE REV Layout note: Place these Hi_Feq & Resistors closed MCH CHANE by HEET OC. NUMBER O IMM 9.mm -,9-,-,-,0-,-,-,-,- 0- R-IMM- C A Model_No X0 JM FEN -ec-00 Layout note: Place these Caps closed o-imm A CL 9 9 A WE# 09 -,- 0- Q Q Q Q 9 Q OT0 OT 9 RA# 0 0 0# # 9 A Q# 9 Q# Q# Q# 9 Q# Q# Q# Q0 Q Q 0 Q Q9 9 Q 0 Q0 Q Q 9 9 Q Q Q Q9 Q#0 Q Q9 9 Q Q0 Q Q 0 Q Q Q Q 9 Q 9 Q9 Q Q0 Q Q Q 0 Q Q Q Q 9 Q Q0 Q Q Q Q Q Q Q Q Q9 Q Q0 Q Q Q Q Q Q Q Q Q9 Q Q0 Q Q 0 Q Q Q Q Q Q 9 0 CKE M0 0 M M M M 0 M 0 M M Q0 9 9 A 9 A A9 9 BA0 0 0 BA CA# CK0 0 CK0# CK CK# CKE0 90 A 9 A A A A A_BA A A 9 A A 9 A FOX_A0A_NARN_F_00P CN- 0 A0 A 0 A0_AP 0 C90 0.uF_v 0-0-,- 0.uF_v C9 C.uF_.v -,- C9.uF_.v -,0-,-.uF_.v C0 -,- -,9-,-,9-,-,-,- -,- C0 0.uF_v 0K_% R 0-,- 0- C99.uF_.v -,9-,-,-,0-,-,-,-,- 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 0-,- 0-,- -,- 0.uF_v C ,- 0K_% R -,9-,-,9-,-,-,- 0.uF_v C0 0.uF_v C9 0.uF_v C - C9 0.uF_v C9.uF_.v - C00 0.uF_v.uF_.v C9 C9 0.uF_v - -,- -,- V V V V9 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 0-,- V9 V 9 V0 V 9 V V V 0 V 0 V V V9 V V0 V V V V V V V V V9 V V0 V V V V V 90 V V 9 V V V0 V V 9 V V 0 V V V 9 V V V0 V V V 9 9 V V V V V V9 V 0 V V V 9 V 9 V V V V9 99 VP VREF 0 NC 0 NC NC 0 NC 9 NCTET V 0 V0 V 0-,- CN- FOX_A0A_NARN_F_00P C9.uF_.v MB_B# MB_B# MB_B0# M_OT MB_WE# MB_RA# MB_CA# M_CKE M_CKE M_C# M_C# M_CLK_R M_CLK_R# +V. +V. +V +V MB_A() M_OT MB_ATA(:0) M_VREF PM_EXTT# M_CLK_R# M_CLK_R MB_M(:0) MB_Q(:0) ICH MATA ICH MCLK

28 +V0.9 -,- C C0 C C C C9 C C C C C0 C C9 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v C C0 C C C C9 C C C0 C C C C 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v 0.uF_v +V0.9 LAYOUT NOTE : PLACE ONE CAP CLOE TO EVERY PULL UP REITOR TERMINATE TO +V0.9 -,- R _% R0 _% R _% R99 _% 0-,- 0-,- 0-,- 0-,- M_CKE0 M_CKE M_CKE M_CKE R _% R _% R _% R9 _% R _% R _% R _% R _% R _% R9 _% 0-,- 0-,- 0-,- 0-,- -,- -,- -,- -,- -,- -,- M_OT0 M_OT M_OT M_OT MA_B0# MA_B# MA_B# MA_WE# MA_CA# MA_RA# +V0.9 -,- R9 R0 R _% _% _% R9 _% R9 _% R0 _% -,- -,- -,- -,- -,- -,- MB_B0# MB_B# MB_B# MB_WE# MB_CA# MB_RA# R0 _% R _% R09 _% R9 _% 0-,- 0-,- 0-,- 0-,- M_C0# M_C# M_C# M_C# R0 R9 R0 R90 _% _% _% _% MB_A(0) MB_A() MB_A() MB_A() -,- MB_A(:0) R0 _% MB_A() R _% MA_A(0) -,- MA_A(:0) R9 _% R0 _% MB_A() MB_A() R9 _% MA_A() R0 _% MB_A() R _% MA_A() R _% MB_A() R _% MA_A() R _% MB_A(9) R _% MA_A() R9 _% MB_A(0) R _% MA_A() R00 _% MB_A() R _% MA_A() R _% MB_A() R _% MA_A() R0 _% MB_A() R _% R _% MA_A() MA_A(9) R0 _% 0-,- MB_A() R0 _% MA_A(0) R _% MA_A() R _% MA_A() R _% MA_A() R _% 0-,- MA_A() CHANE by JM FEN -Oct-00 R-AMPIN IZE COE OC. NUMBER REV A C Model_No X0 HEET OF

29 +VBATR PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN0 PE_C_RXP0 PE_C_RXN9 PE_C_RXP9 PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP PE_C_RXN PE_C_RXP C 0.uF_v CN0- E_ PWR_RC E_ PWR_RC E_ PWR_RC E_ E_ PWR_RC PWR_RC E_ PWR_RC E_ PWR_RC E_ PWR_RC E_9 PWR_RC E_0 PWR_RC E_ PWR_RC E_ PWR_RC E_ PWR_RC E_ E_ PWR_RC PWR_RC E_ PWR_RC E_ E_ PWR_RC PWR_RC E_9 PWR_RC E_0 PWR_RC E_ E_ PWR_RC PWR_RC E_ PWR_RC E_ PWR_RC E_ PWR_RC E_ PWR_RC E_ PWR_RC PWR_RC VRUN PWR_RC VRUN VRUN PWR_RC PWR_RC VRUN 9 PWR_RC VRUN 0 PWR_RC VRUN PWR_RC VRUN PWR_RC RUNPWROK VRUN 9 0 E_ E_ E_ E_ E_ E_ E_ E_ E_9 E_0 E_ E_ E_ E_ E_ E_ E_ E_ E_9 E_0 E_ E_ E_ E_ E_ E_ E_ PRNT# 9 PEX_RX# PEX_RX PEX_TX# 0 PEX_TX PEX_RX# PEX_RX PEX_TX# PEX_TX 9 PEX_RX# 0 PEX_RX PEX_TX# PEX_TX PEX_RX# PEX_RX PEX_TX# 9 PEX_TX 0 PEX_RX# PEX_RX PEX_TX# PEX_TX PEX_RX0# 9 0 PEX_RX0 PEX_TX0# PEX_TX0 PEX_RX9# PEX_RX9 PEX_TX9# PEX_TX9 9 0 PEX_RX# PEX_RX PEX_TX# PEX_TX PEX_RX# PEX_TX# PEX_RX 9 90 PEX_TX 9 9 PEX_RX# 9 9 PEX_RX PEX_TX# 9 PEX_TX PEX_RX# 9 PEX_RX PEX_TX# PEX_TX 0 0 PEX_RX# 0 0 PEX_RX PEX_TX# 0 PEX_TX 0 09 PEX_RX# 0 PEX_RX PEX_TX# PEX_TX PEX_RX# PEX_RX PEX_TX# 9 PEX_TX 0 ACE_9_0_P C9 C9 C9 0uF_.v uf_.v 0.uF_v R 0-,- - 0-, , ,-,-,-,9-,0-,-,-,-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-, PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN0 PE_C_TXP0 PE_C_TXN9 PE_C_TXP9 PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PE_C_TXN PE_C_TXP PWR_OO_ R 0- PE_C_RXN 0- PE_C_RXP +V 9-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,9- C9 0.uF_v AP_PRE_PU PE_C_RXN0 PE_C_RXP0 CLK_R_PE_REF# CLK_R_PE_REF PCIE_RT# ICH MATA ICH MCLK THERM_MXM# CRT_HYNC CRT_VYNC CRT_CCLK CRT_CATA LP_#_R CRT_LC_R CRT_LC_ R0 0K_% ,-,-,0-,-,-,-,- - - TM_TX- TM_TX+ TM_TX- TM_TX+ HMI_HP TM_TXC- TM_TXC+ TM_TX0- TM_TX CN0- PEX_RX# PEX_RX PEX_TX# PEX_TX PEX_RX0# 9 PEX_RX0 PEX_TX0# 0 PEX_TX0 PEX_REFCLK# PRNT# PEX_REFCLK TV_C_HTV_Pr CLK_REQ# 9 0 PEX_RT# TVY_HTV_Y_TV_CVB RV RV TV_CVB_HTV_Pb MB_AT MB_CLK VA_RE 9 0 THERM# VA_HYNC VA_RN VA_VYNC CA_CLK VA_BLU CA_AT 9 LV_UCLK# 0 IP IP LV_UCLK IP RV LV_UTX# LV_UTX RV 9 0 AC_BATT# LV_UTX# IP IP LV_UTX IP IP LV_UTX# 9 LV_UTX 0 IP IP IP LV_UTX0# IP LV_UTX IP_VI_B_CLK# LV_LCK# 9 LV_LCK 9 IP_VI_B_CLK 9 9 VI_B_HP_ 9 RV LV_LTX# RV LV_LTX IP_VI_B_TX# LV_LTX# 0 LV_LTX 0 IP_VI_B_TX LV_LTX# 0 IP_VI_B_TX# 09 0 IP_VI_B_TX LV_LTX IP_VI_B_TX0# LV_LTX0# LV_LTX0 IP_VI_B_TX0 VI_A_HP 9 VI_A_CLK# _AT 0 CI_A_CLK CC_CLK LV_PPEN LV_BL_BRHT VI_A_TX# VI_A_TX LV_BLEN 9 0 CB_AT VI_A_TX# CB_CLK VI_A_TX VRUN VI_A_TX0# VRUN 9 VI_A_TX0 VRUN 0 VRUN ACE_9_0_P C0 CLOE TO MXM C0 0uF_0v , CRT_R L R _ C0 L,L,L0 INTALL IUT-FBM T 0pF_0v CRT_ L R _ C 0pF_0v V. -, ,9-,-,-,-,-,- -,9-,-,-,-,-,- - 0-,- 0-,- 0-, C C0 0.uF_v 0.uF_v - -, , PE_C_TXN PE_C_TXP PE_C_TXN0 PE_C_TXP0 VI_CHROMA VI_LUMA VIEO_COMP CRT_R CRT_ CRT_B LV_CLKO- LV_CLKO+ LV_RXO- LV_RXO+ -,-,- LV_RXO- LV_RXO+ LV_RXO- LV_RXO+ LV_RXO0- LV_RXO0+ LV_CLKE- LV_CLKE+ LV_RXE- LV_RXE+ LV_RXE- LV_RXE+ LV_RXE- LV_RXE+ LV_RXE0- LV_RXE0+ LCM_C_A LCM_C_CL LCM VEN INV_PWM_ LCM BKLTEN TM_CATA_ TM_CCLK_ +V PIFO L0 CRT_B 9-00_ R0 C 0pF_0v 0-,- CRT_LC_B Close to MXM CHANE by JM FEN -Jun-00 MXM CAR IZE COE OC. NUMBER REV A C Model_No X0 HEET 9 OF

30 OC. NUMBER COE OF HEET REV CLOE TO VA CONN (0/) IZE (0/) HMICONN -May-00 CRT& HMI CONN C A 0 Model_No X0 JM FEN CHANE by (0/) pf_0v R._% CHENKO_LL_P C 0K_%_ R ,- C9 pf_0v Q0 MKFU.9_% R L L_MH_.U 0- R.K_% 9-9- CHENMKO_BAV99 9-,- 9-,-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-, ,- R0 _ R 9.K_% OE Y Vcc PHP_LVCP_TOP_P U A OE Y A C 0.uF_v R.K_% - 9-,- 0K_% R R 9.K_% 0-9- R C R0.K_% CHENMKO_CHPZV_P A C pf_0v C9 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 9- Q00 MKFU.9_% R L L_MH_.U 00K_%._% R R MKFU Q00 - -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- L_MH_.U L R YN_009FR0ZR_P CN0 0 CHENMKO_BAV99 0K_%_ R.K_% R R.K_% R pf_0v C0 0-9-,- MKFU Q0 CHENMKO_CHPZV_P 0 A C C ANTA_000 9P CN0-9-.uF_.v C pf_0v C -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- R.K_% R0.K_% R0.K_% C0 0.uF_.v 0.uF_v C 9-,- FUE A_V_00FF00F 9-,-,-,9-,9-,0-,-,-,-,-,-,-,-,-,-,9- pf_0v C CHENMKO_BAV99 RB 0 C0 uf_0v 9- TM_CCLK_ TM_CATA_ +V HMI_ATA HMI_CLK HMI_ATA 9-,- TM_TX+ TM_TX- TM_TX0+ HMI_CLK TM_TXC+ TM_TXC- TM_TX0- VI_CHROMA_OCKIN VIEO_COMP_OCKIN VI_LUMA_OCKIN +V TM_TX- TM_TX+ HMI_HP CRT_HYNC CRT_VYNC CRT_CCLK _VCC CRT_LC_R +V CRT_LC_ CRT_LC_B VI_CHROMA VIEO_COMP _VCC +VA +VA VI_LUMA +V CRT_CATA

31 (0/) (0/) (0/) Place closed to connector REV Model_No X0 JM FEN 9-Feb-00 COE OF OC. NUMBER CHANE by IZE HEET LC CONN C A 9-9-.uF_v C00 0K_% R ,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-, ,-, ,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- - -,- CN ACE 00_0P 00 BATA 9- AO09 Q00 00pF_0v C C0 0.uF_v 9- -,-,9-,0-,-,-,-,0-,-,-,-,-,-,9-,- C0 0.0uF_v U0 PHP_LVC_OT_P_ ,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 9- C0 000pF_0v 9- R0 C0.uF_.v ,-,-,0-,9-,-,-,- MK00F Q0 Q0 MK00F R0 0 - R0 K_% K_% R0.K_% R 9- R.K_% ,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- -,-, AV_+V HP_LOO +V INV_PWM_ +V +V_LE 9- LV_RXO- LV_RXO+ LV_RXO- LV_CLKO+ LV_CLKO- +VA LV_CLKE+ LV_CLKE- LV_RXO0+ LV_RXO0- LV_RXO+ LV_RXO- LV_RXO+ LV_RXE+ LV_RXE- +V LCM_C_A LCM_C_CL +V LV_RXE+ LV_RXE- LCM VEN LP R LV_RXE+ LV_RXE- LCM BKLTEN LI_W#_ LV_RXE0+ LV_RXE0- +VBATR AV_+V +VA

32 IE CPU LPC RTC LAN / LAN IHA ATA OC. NUMBER COE CLOE TO ICH OF Close to ICH XR ICH- C A Model_No X0 JM FEN 0-Nov-00 CHANE by HEET REV IZE 0-,-,0- - -,-,-,-,9-,-, _% R - 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- X.KHZ_VAIL - POWERPA_ PA _% R _% R K_% R - BATC 09 - R M_% C99 pf_0v - R K_% R _% R0 _% - uf_.v C C9 000pF_0v - YN_0000MA000NL_P CN R - 9-,-,-,-,-,-,-,-,- C00 pf_0v - K_% R0 - C pF_0v TP ,-,- - R.9_% ATATXP ATALE# AF0 ATARBIA A A ATARBIA# AB ATA_CLKN ATA_CLKP AC A MI# TPCLK# AA AE THRMTRIP# AA TP -,- ATA0RXP AF AH ATA0TXN ATA0TXP AH A ATARXN ATARXP A AJ ATATXN ATATXP AJ ATARXN AF ATARXP AF ATATXN AE AE E0 LAN_TX LAN_TX C0 9 LRQ0# E LRQ#_PIO NMI A AH RCIN# RTCRT# AF RXTC A AF RXTC AF ATA0RXN INNE# AE INIT# INTR AC0 A INTRUER# INTVRMEN AF Y IORY LAN00_LP A LAN_RTYNC C LAN_RX0 B LAN_RX C LAN_RX LAN_TX0 AE0 HA_OCK_EN#_PIO HA_OCK_RT#_PIO A HA_RT# AE HA_IN0 AJ AH HA_IN HA_IN AH A HA_IN HA_OUT AE HA_YNC AJ IEIRQ Y AF FERR# E FWH0_LA0 FWH_LA F FWH_LA F FWH_LA C FWH_LFRAME# B LAN_CLK LAN_COMPI LAN_COMPO C LAN_OCK#_PIO AH HA_BIT_CLK AJ T AB T T 9 R ACK# Y REQ W IOR# W W IOW# PRTP# AF PLP# AE A U 0 T V V U V U V T V A0ATE AF A A0M# CPUPWR_PIO9 A9 A0 AA AA A A AB C# Y Y C# V 0 - ITL_ICH_M_BA_P U9- - 0M_% R pF_0v C0 K_% R - - C9 uf_.v - 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- - -,-,- - -,-,- 0-,-,-,-,9-,0-,-,-,-,9-,0-,-,-,-,-,-,-,-,-,-,-,-,-,-,0-,-,-,-,-,9-,- 9-,-,-,-,-,-,-,-,- _% R - pf_0v C0 - C0 000pF_0v -,0- R - - -,-, R.9_% -,-,- R _% R0 0K_% -,- 0K_% R ATA_C_TXN ATA_C_TXP CLK_R_ATA# ATA_TXN R ATA_C_RXP0 +V +V_RTC HA BITCLK ATA_TXP ATA_C_RXN ATA_C_RXP PM_THRMTRIP# CLK_R_ATA +VCCP +V._PCIE_ICH +VAL +V ATA_C_RXN0 PIE ACK# PIE () PIE () PIE () PIE (0) PIE C#() PIE C#(0) PIE A() PIE A() PIE A(0) PIE (0) PIE (9) PIE () PIE () PIE () PIE () PIE () PIE () PIE IORY PIE IOW# PIE IOR# ATA_C_TXN0 ATA_C_TXP0 HA IN0 PIE REQ HA YNC HA OUT HA RT# PIE () PIE () PIE () PIE () H_TPCLK# H_PRTP# +V_RTC H_PLP# +V ATA_TXN0 ATA_TXP0 H_INIT# H_A0M# H_FERR# H_INNE# H_INTR H_NMI H_MI# +VCCP PM KBCCPURT# LPC RQ0# LPC A() LPC A() LPC A() LPC A(0) LPC FRAME# LE ATA# PIE IRQ EC A0ATE H_PWR