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2 Microelectronic Engineering 109 (013) Contents lists available at SciVerse ScienceDi rect Microelect ronic Engineeri ng journal homepage: Modeling, simulation and design of the vertical Graphene Base Transistor F. Driussi, P. Palestri, L. Selmi DIEGM, University of Udine, via delle Scienze 08, Udine 33100, Italy article info abstract Article history: Available online 1 April 013 Keywords: Graphene Modeling Graphene Base Transistor RF analog application Device optimization An efficient one-dimensional model to investigate the high frequency performance of Graphene Base Transistor (GBT) has been developed and used to provide guidelines for the design and optimi zation of THz operation devices. The simulation results show that cut-off frequencies in the THz range are feasible over a quite broad range of the model parameters, assessing the promis ing potential of the intrisic GBT device. The model indicates that, for an opt imized GBT, the structure should exploit dielectric materials with not too large permittivity and small energy barrie rs with respect to the metal emitter. Ó 013 Elsevier B.V. All rights reserved. 1. Introductio n Graphene has great potential as the material for high frequency transistors in analog applications. In particular, conventional device concepts such as the short channel Graphene Field Effect Transistor (GFET) have already reached of about 400 GHz [1] and have the potential to achieve a cut-off frequency ( ) above 1 THz [,3]. However, obtaining high output resistance and low off currents in GFETs is very challenging [4,5]. Recently, the Graphene Base Transistor (GBT) has been proposed [6,7] and its DC functionality has been experimentally demonstrated [8]. This device is also very promising for THz operation, because it shows mitigated output resistance and off current limitations with respect to GFETs. This paper presents a simulation study of the potential of GBT in terms of current drive, transcond uctance and cut-off frequency. Furthermore, design criteria for device optimizati on are proposed.. Structure and working principle of GBT The GBT working principle differs from that of the GFET since the charge carriers travel perpendicul ar to the graphene sheet. Fig. 1(left) reports a prototypical GBT structure. As it can be seen, the GBT is based on a vertical arrangement of three regions: Emitter (E), Base (B), and Collector (C) separated by two insulators [6]. From an electrical point of view, the device works similarly to the hot electron transistor [9,10], the heterojunct ion bipolar transistor, or a vacuum triode. In GBT (Fig. 1), the Emitter Base structure acts as an electron emitter injecting hot electrons across the graphene base layer into the conduction band of the Base Collector Insulating layer(bci). The electrons leave the emitter by tunneling through the Emitter Base Insulating layer (EBI), while the graphene base works as the control electrode. In the GBT, transport across the base is expected to be ballistic and, hence, transparenc y is limited only by quantum effects. Although the graphene layer is only one atom thick, the inplane resistance per square is low [11] due to the high mobility and the capability to induce large concentr ations per unit area. This is an advantage over conventi onal HBTs where the base layer cannot be made too thin without strongly increasing the base resistance value. In the GBT, instead, with a suitable sizing of the emitter windows, uniform injection over the device area might be possible. All the above characteri stics suggest that a high should be reachable with the GBT structure. In addition, the BCI layer can be designed in such a way that significantly high voltages can be applied between the base and the collector electrode s. 3. Electrical modeling of GBT In order to investigate the potential of GBT as a high frequenc y transistor and explore its design space, we have develope d an efficient one-dimensi onal (1D) model to estimate the collector current density ( ) and the of the proposed device. Firstly we compute the 1D electrost atics of a metal-insul ator graphene-insulator metal stack. The charge in the graphene base (Q B ) is related to the electric fields in the Emitter Base and Base Collector insulators. Denoting with V 1 and V the voltage drops across the EBI and BCI, respectively, and neglecting the charge contribution due to electrons traveling in the EBI and BCI, Q B can be calculated as Corresponding author. Tel.: ; fax: address: francesco.driussi@uniud.it (F. Driussi). Q B ¼ e 1 V 1 e V ð1þ /$ - see front matter Ó 013 Elsevier B.V. All rights reserved.
3 F. Driussi et al. / Microelectronic Engineering 109 (013) Fig. 1. Sketch of GBT (left) and corresponding band diagram with bias (right). Electrons leave the emitter by tunneling through the Emitter Base Insulator (EBI) and travel across the graphene base and conduction band of the Base Collector Insulator (BCI). U G ¼ 4:5 ev. where and are the EBI and BCI thickne sses and e 1 ¼ e ¼ k e 0. In the normal region of operation (V 1 ; V > 0), holes accumulate in the graphene and, due to the finite Density of States (DoS) of the latter, the Fermi level in the base (E fb, Fig. 1) lies below the neutrality point (U B ) by several units of kt. Consideri ng a Fermi Dirac distribution for carriers in graphene, Q B is related to E fb through: Q B ¼ e ph v F Z UB 1 ðu B EÞ exp½ðe E fb Þ=kTŠ de 1 þ exp½ðe E fb Þ=kTŠ The voltage drops V 1 and V can be expressed as a function of the external biases as (see the band diagram in Fig. 1): ev 1 ¼ e þ U M U G U B þ E fb ev ¼ e U M þ U G þ U B E fb The work-functi ons of the metal emitter and collector termina ls are taken equal: U M ¼ 4:5 ev. The coupled solution of Eqs. (1) (4) easily yields Q B ; V 1 and V. Fig. reports the electrostatic s of the device; the neutrality point corresponds to Q B ¼ 0. Its position is clearly visible as an inflection point in the V 1 vs. curves of Fig. and depends on the EBI and BCI capacitance, hence on ; and k (see Eq. (1)). V solid line: dashed line: =6 nm (a) =1. nm = nm = nm k=10 k= Fig.. Voltage drop across the EBI (V 1) as a function of the applied. Above the, the graphene finite DoS produces V 1 <, which tends to reduce the device transconductance. The figure shows the dependence on and (a) and on k (b). (b) V 1 ðþ ð3þ ð4þ Above this point, the finite DoS of the graphene layer results in > V 1. The collector current density is then estimate d neglecting recombin ation in the thin graphene base and thus assuming J E ðh FB ¼ 1Þ. In particular, J E is obtained from the integral of the current spectrum dj E over energy [1] dj E ¼ ekt p h 3 log½1 þ exp½ðe fm EÞ=kTŠŠ T WKB ðeþ where T WKB ðeþ is the WKB tunneling probability through the EBI energy barrier (including direct and FN tunnelin g), is the effective mass in the emitter metal (assumed equal to m 0 ) and E fm is the Fermi level of the metal emitter (Fig. 1). For a given electron energy, dj E is thus calculate d as the product of the current density impinging the emitter insulator interface times the probability that the electron passes throug h the EBI and BCI energy barriers [1]. A Fermi Dirac energy distrib ution has been considered for the electrons in the emitter. J E is then calculate d integrating dj E ðeþ over energy. The cut-off frequency of the intrinsic device is estimated with a quasi-static approach, according to the general expression ð ; Þ¼ 1 pðs c þ s d Þ The charging time (s c ¼ DQ B =DJ E ) is determine d by computin g the charge and the current at two values at constant V CE (consistently with the definition); the drift time s d ¼ð þ t FN Þ= accounts for the delay due to the charge traveling inside the dielectrics according to [13]. The average length of the tunnelin g path (t FN ) is conserva tively set to zero for the sake of worst case estimates, while the drift velocity is tentati vely set to 10 7 cm/s, a realistic value based on the current knowledge about high field drift velocity in dielectric s [14,15]. 4. Expected performance of GBT In the following paragraph we explore the design space of GBT. For the reported simulations, the bias points were chosen in order to have a maximum BCI electric field of 0. MV/cm. Furthermore the tunneling mass in the EBI layer used to calculate the tunnel probabili ty has been set to m I ¼ 0:5m 0. The impact of m I on the results will be discussed in Fig. 10. ð5þ ð6þ
4 340 F. Driussi et al. / Microelectronic Engineering 109 (013) =6 nm =0.3 ev, k=30, k=30 V CE =4 V =0.3 ev, k=0, k= [nm] Fig. 3. versus the EBI thickness (), permittivity (k) and conduction band offset with respect to the metal emitter (U). ¼ V, V CE ¼ 4 V. g m / [V -1 ] solid: dashed: k=10 =1. nm = nm Fig. 6. g m = as a function of the Base Emitter voltage for a few and k values. g m ¼ d =d. =0.7 ev,,, k= Fig. 4. Collector current density ( ) as a function of for a few k and band offset values. g m /g d 10 1 =0.7 V, = V,,, k= V CE Fig. 7. Intrinsic voltage gain (g m =g d, where g d ¼ d =dv CE) of the GBT device versus V CE for different and k values. Intrinsic gains above 0 can be achieved = V =1.5 V V CE =1. nm,, = nm,, k=10 Ref. [18] Ref. [19] Fig. 5. Output characteristics of the GBT device. A preliminary analysis of GBT performanc e is illustrated in Fig. 3, where template materials have been considered: is reported for different k values, band offsets between the emitter and the dielectric (U, Fig. 1) and EBI and BCI thicknesses. These results suggest that THz operation should be possible with in the 1 nm range, for U 6 0:5 ev and in a wide range of k values. A Fig. 8. Cut-off frequency versus for a few and k values. For large values, saturates at a constant value essentially set by s d. Reference data for SiGe HBT devices are also reported. At high, high injection is expected also in the GBT, but preliminary calculations suggest that THz operation is maintained also in presence of these effects. (See above-mentioned references for further information.) thicker EBI reduces the current and the transcond uctance (g m ) while a larger k increases the capacitance thus lowering the. Based on these results we investigated in more detail a few design options for the intrinsic device. Fig. 4 shows the
5 F. Driussi et al. / Microelectronic Engineering 109 (013) =x10 7 cm/s =10 7 cm/s =5x10 6 cm/s [nm] Fig. 9. Cut-off frequency as a function of BCI thickness for different values of the average drift velocity in BCI ( ) =m 0 =0.75 m 0 =0.5 m m I [m 0 ] Fig. 10. Cut-off frequency as a function of the tunneling mass in the EBI layer (m I) for different values of the electron mass in the metal emitter. characterist ics of a few designs, while Fig. 5 reports the output characterist ics of a specific device, where better (i.e. larger) output resistances with respect to GFETs can be seen [5]. For bias conditions correspondi ng to in the THz range, the g m = attains values in the 4 V 1 range (Fig. 6), which are comparable to those of scaled CMOS technologie s [16]. Consequentl y, the intrinsic voltage gain g m =g d (Fig. 7) reaches values above 0, which are higher than those of GFETs [5,3] and promising for analog applications. Fig. 8 reports the as a function of. Very good performanc e is expected for the optimized designs with respect to HBT state of the art. At high, the SiGe HBT reference data show the drop due to high injection effects. In this respect, although the GBT should be prone to a similar drop, preliminary calculatio ns, accounting in Eqs. (1) (4) for the charge in the BCI and EBI regions associated to the tunneling current, essentiall y suggest that the GBT advantage over the HBT is maintain ed even in the presence of high injection effects, because the GBT structure has a thinner structure with respect to the HBT. Fig. 9 shows the impact of s d on for a few values. As expected, for increasing s d (that is larger for thicker BCI and smaller ) the decreases, but maintains values above THz over most of the explored range. Fig. 10 reports versus the tunneling mass m I for different values of the effective mass in the metal emitter ; reduces for increasing m I and for decreasing. Despite this slight decrease in, the results in Figs. 9 and 10 suggest that the device performanc e is not strongly determined by the parameter values and that THz operation can be achieved over quite a wide range of the model parameters. 5. Conclusi ons We develope d an efficiend model capturing the most important physics and enabling the early design of a vertical hot electron transistor with a graphene base (GBT). The simulations indicate that in the THz range and competitive g m =g d and g m = should be reachable for the intrinsic device within a broad range of material and device paramete rs, provided the average drift velocity in EBI and BCI is comparable to the electron saturatio n velocity in SiO. The model suggests that materials with not too high k values and (most important) small energy barriers with respect to the graphene Dirac point, which are partly available today [17], should be considered for the fabricatio n of the EBI and BCI layers. Although based on an admittedl y simplified model, the results provide useful design guidelines to steer the selection of materials suitable to fabricate GBTs with competitive performance metrics. Acknowledgmen ts Authors would like to thank D. Esseni, S. Venica (DIEGM, University of Udine), M. Lemme (University of Siegen) and J. Dabrowski (IHP) for fruitful discussions. The work has been funded by the UE STREP Project GRADE (317839) via the IUNET consortium. References [1] R. Cheng et al., Proceedings of the National Academy of Sciences (01), dx.doi.org/ /pnas [] J.G. Champlain, Journal of Applied Physics 109 (011) [3] A. Paussa et al., IEDM Technical Digest (011) 71. [4] S.O. Koswatta et al., IEEE Transactions on Microwave Theory and Techniques 59 (10) (011) 739. [5] I. Imperiale et al., IEDM Technical Digest (010) 73. [6] W. Mehr et al., IEEE Electron Device Letters 33 (01) 691. [7] L. Britnell et al., Science 335 (01) 947. [8] S. Vaziri et al., Nano Letters, 013, [9] C.A. Mead, Journal of Applied Physics 3 (1961) 646. [10] M. Heiblum, Solid-State Electronics 4 (1981) 343. [11] A.K. Geim et al., Nature Materials 6 (007) 183. [1] S. Takagi et al., IEEE Transactions on Electron Devices 46 () (1999) 348. [13] S. Ramo, Proceedings of the Institute of Radio Engineers (1939) 584. [14] P. Palestri et al., Proceedings of ESSDERC (000) 96. [15] A.V. Vishnyakov et al., Solid State Electronics 53 (009) 51. [16] B. Parvais et al., Proceedings of VLSI-TSA Symposium (009) 80. [17] C. Guedj et al., IEDM Technical Digest (007) 977. [18] B. Heinemann et al., IEDM Technical Digest (010) 688. [19] B. Geynet et al., in: Proceedings of Bipolar/BiCMOS Circuits and Technology Meeting, 008, p. 11.
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