2D Critical path = 6. Retiming moving delays. Retiming - Pipelining. Delays can be moved from ALL inputs to ALL outputs

Transcription

1 SP esgn SP esgn Retmng movng delays Retmng elays can be moved from LL nputs to LL outputs Reduce Crtcal Path faster reduced power consumpton Reduced number of Regster Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Retmng - Ppelnng Generalzaton of Ppelnng Ppelnng s equvalent to ntroducng delays at the nput followed by retmng Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Retmng () Retmng does not change delay n loop the teraton bound () () Crtcal path 6 Loop bound 6/ Crtcal path Loop bound 6/...but the crtcal path! Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

2 SP esgn x(n) a b t Retmng y(n) () () Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn t Retmng : set of edges that f removed, or cut, results n two dsjont graphs. () Retmng dd delays to edges () gong one way and remove from ones gong the other. Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn t Retmng Retmng: dd delays to edges gong g one way and remove from edges gong the other. () () () () crt +6 # crt ++8 #5 Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Node Retmng Node Retmng: around one node. () () () () crt +6 # crt + #5 Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

3 SP esgn Retmng Formulaton ω(e) weght of edge # of delays r(x) retmng values r(u) U U ω(e) ω r (e) V V ω r (e) ω(e) + r(v) - r(u) r(v) Vald retmng f all ω r (e) > Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Retmng Formulaton () G hg G Graph G Graph G Each node n G has retmng value j and each node n G has retmng value j+k ny value j results n the same retmed graph. Vald retmng f all ω r (e) > Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Node Retmng wth Formulaton Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- G SP esgn Node Retmng wth Formulaton G Orgnal weghts Choose retmng values G r()r()r ( ) ( ) G r() Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

4 SP esgn Node Retmng wth Formulaton () Orgnal weghts Retmng values r(), r(), r() and r ω r (e) ω(e) ) + r(v) -r(u) Receve Send Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Node Retmng wth Formulaton () Retmed weghts lgorthm for clock perod n mnmzaton n.. Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Ppelnng Feedforward Ppelnng s a specal case of cutset retmng: Placng delays at feedforward cutsets. x(n) h h h Feedforward cutset h y(n) Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Replace each by k Slow own by k () () Clock fter -slow transformaton () () clk t.u. ter t.u. Clock t.u. Input new samples every alternate cycles. null operatons account for odd clock cycles. Hardware utlzed only 5% tme clk t.u. ter t.u. t u Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

5 SP esgn () y( n) x( n) + a y( n ) () Example y( n) x( n) + a y( n ) 5 Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Retmng -slow Graph () () clk t.u. ter tu t.u. tu t.u. Hardware Utlzaton 5 % Hardware can be fully utlzed f two ndependent operatons are avalable. clk t.u. ter tu t.u. Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Retmng -stage Lattce Flter SP esgn Retmng Loop ounds -stage Lattce Flter Crtcal Path L L L Crtcal Path (N+) dders + Mult N Number of Stages Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- dd + Mult 5 dd + Mult L L 5 dd + Mult L Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

6 SP esgn Retmng Iteraton ound -stage Lattce Flter SP esgn t Retmng -stage Lattce Flter {,,, } max L L L dd + Mult Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Retmng -stage Lattce Flter Crtcal Path dders + Mult Independent of N nr. of stages n flter compared to Orgnal Crtcal Path (N+) dders + Mult SP esgn t Retmng -stage Lattce Flter Move every second delay Worse for Low N. rade-off depends on M and Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- Crtcal Path dders + Mult Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

7 SP esgn t Retmng 5-stage Lattce Flter SP esgn Retmng wth Slowdown -stage Lattce Flter Crtcal Path Crtcal Path dders +Mult Crtcal Path (N+) dders + Mult N Number of Stages Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Slowdown by factor SP esgn Slowdown of -stage Lattce Flter () Crtcal Path s Crtcal Path has not changed. Same f clk. Inserton of samples to preserve behavor! x x x x x x x x... or x x x x... Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- dd delays on Edges n one drecton and remove n the other Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

8 SP esgn SP esgn Slowdown of -stage Lattce Flter Regster Mnmzaton Crtcal Path Crtcal Path dders + Mult y y y y 7 y y ut requres twce the number of clock cycles Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- lgorthm for regster mnmzaton n.. Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- SP esgn Old Odexample: pe ata-flow Graph (FG) x(n) One s the same SP esgn Pacemaker revsted h h h + + y(n) x(n) h h h + () y(n) Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-

9 SP esgn Wavelet Flterbank SP esgn Wavelet Flterbank F ( z) + z + z + z G ( ) b z + z Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden- Vktor Öwall, ept. of Electrcal and Informaton echnology, Lund Unversty, Sweden-