NOTES, UNLESS OTHERWISE SPECIFIED:

Size: px
Start display at page:

Download "NOTES, UNLESS OTHERWISE SPECIFIED:"

Transcription

1 NOTES, UNLESS OTHERWISE SPEIFIE:. The netname "M_PPV" represents connection to the +.V digital power plane.. The symbol represents connection to the digital ground plane.. "Z" suffix on a signal name indicates an active low signal.. ll components with designators "U", "", "Y" and "Q" are electrostatic discharge sensitive.. ll resistor values are in ohms, /W and % unless otherwise specified. OMPUTER GENERTE RWING. O NOT ISE MNULLY ISIONS ESRIPTION TE PPROVE EO : Initial Release // H HIGHEST REFERENE ESIGNTORS USE J L R TP U Q9 WN en Uhing ENGR my White PV TE 9// /9/ TEXS INSTRUMENTS () OPYRIGHT TEXS INSTRUMENTS LL RIGHTS RESERVE SS NEXT SSY USE ON PPLITION MFG Q SW adence. TITLE TI- P KUH M oard RWING NO SLE of

2 J & J Input Flex onnector From Slave SI / M T (_P[:], _N[:], _P[:], _N[:]) / M LK (LK_P, LK_N, LK_P, LK_N) / STRL (STRL_N, STRL_P, STRL_N, STRL_P) U. TRP S M / M T (_P[:], _N[:], _P[:], _N[:]) / M LK (LK_P, LK_N, LK_P, LK_N) From Master SI / STRL (STRL_N, STRL_P, STRL_N, STRL_P) ONTROL (STROE, MOE[:], SEL[:], R[:], OEZ) U, U, U Level Translators.V->.V SP ONTROL (LK, O, I, ENZ, IRQZ) M_RSTZ U VREG.V->.V U.V M Power Supplies VIS PG_FSET EN_FSET PGE PGE PGE & TEXS INSTRUMENTS WN TE en Uhing 9// ISSUE TE RWING NO SLE

3 M_PPV Note: Only install one K Ohm pull-up resistor on _OEZ. If _OEZ pull-up is installed on Main board side, do not install R. p. R_ p. OEZ p. M_RSTZ R Note: R and are specific values selected to delay SI driven _OEZ to allow the M enough time to park properly. Recommend installing values as shown. L MHz pf o Not Install V,% PPV M_PPV R K R K.uF p. SP_I _N _P _N _P _N _P p. IRQZ p. SEL_ p. SEL N _P STRL_N STRL_P _N _P _N _P _N _P _N _P _R OEZ MRSTZ _N _P _N _P _N _P _N9 _P9 STRL_N STRL_P _N _P _N _P _N _P _N _P _N _P Master LVS J E F E F E F E F E F E F E F E F 9 9E 9F E F E F E F E F E F E F E F E F E F 9 9E 9F E F E F E F E F E F E F M_FLEX_ONNETOR _N _P _N _P _N _P _N9 _P9 LK_N LK_P _N _P _N _P _N _P _N _P V is not used on pins, E, _R R R_ SP_LK p. SP_O p. _N _P _N _P _N _P _N _P LK_N LK_P _N _P _N _P _N _P Note: o not install R if there is a pull-up on the SP_M_SZ signal on the Main board. M_PPV R o Not Install K PPV MOE_ p. MOE_ p. R_ p. R_ p. R_ p. STR p. SP_M_SZ p. M_PPV _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N STRL_P STRL_N _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N STRL_P STRL_N M_PPV L _P[:] p. _N[:] p. LK_P p. LK_N p. STRL_P p. STRL_N p. _P[:] p. _N[:] p. LK_P p. LK_N p. STRL_P p. STRL_N p. MHz PPV.uF _N _P _N _P _N _P _N _P STRL_N STRL_P _N _P _N _P _N _P _N _P _N _P _N _P _N _P _N _P STRL_N STRL_P _N _P _N _P _N _P _N _P _N _P Slave LVS J E F E F E F E F E F E F E F E F 9 9E 9F E F E F E F E F E F E F E F E F E F 9 9E 9F E F E F E F E F E F E F M_FLEX_ONNETOR _N _P _N _P _N _P _N9 _P9 LK_N LK_P _N _P _N _P _N _P _N _P _N _P _N _P _N _P _N _P LK_N LK_P _N9 _P9 _N _P _N _P PPV _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N STRL_P STRL_N _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N STRL_P STRL_N M_PPV _P[:] p. _N[:] p. LK_P p. LK_N p. STRL_P p. STRL_N p. _P[:] p. _N[:] p. LK_P p. LK_N p. STRL_P p. STRL_N p. TP TP INPUT ONNETOR.uF L MHz L MHz 9.uF WN TE RWING NO en Uhing 9// TEXS INSTRUMENTS ISSUE TE SLE

4 Power own ircuitry M_PPV M_PPV uf TP U EN VOUT VIN ERROR GN GN(T) LPS-./NOP M_PPV uf EN_FSET M_PPV R K Q FVN VIS R R Q FVN R R9.V ZJ Q FVN R.K Q SS Q FVN R R uf o Not Install M_PPV R o Not Install p., EN_FSET J TSM---T-SV R K TP VIS R K R.K pf Q N R K OMP U Vin EN ENR OMP -/MOE + PGN PGN GN 9 GN L uh LPS-ML TPS POWER P SW_ SW SW SUP OUT 9 F RV F OUT F PG REF SE F.uF uf STPSZ F RV F F REF 9 uf RV_ RV_. PF R.K.% R K % VF R9.K % TSW R K.%.V uf uf uf p., EN_FSET R K.% RV_ TSW uf -.V.V TP p. V protection diode p. VIS p. R K R K Q9 FM9PZ R K Q N uf TP TP SMJ9-TP M_PPV R 9K.% PG pf V,% R R K TP PG_FSET p. o Not Install TP TP9 M Power Supplies TEXS INSTRUMENTS WN TE en Uhing 9// ISSUE TE RWING NO SLE

5 p. _P[:] p. _N[:] p. LK_P p. LK_N p. _P[:] p. _N[:] p. LK_P p. LK_N p. STRL_P p. STRL_N p. STRL_P p. STRL_N MT MT MT MT _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N STRL_P STRL_N STRL_P STRL_N U 9 9 _P_ K _P P_ H _P_ G _P_ 9 _P P_ E _P P_ K _P_9 J _P P P_ F _P_ J _P P N_ L _N N_ G _N_ H _N N N N N_ L _N_9 K _N N N_ G _N_ K _N N_ F G LK_P LK_N Y9 9 _P_ P _P_ Z _P_ T _P_ U _P_ Z9 _P_ Z _P_ W _P_ Y _P_ P _P_9 R _P P_ Y _P_ V _P_ R _P P_ Y _N_ N _N_ Y _N_ U _N_ T _N_ Z _N_ Y _N_ X _N_ X _N_ N _N_9 P _N_ Z _N_ X _N_ U _N_ P _N N_ V U LK_P LK_N E STRL_P X STRL_N W STRL_P STRL_N LPTE p. _P[:] p. _N[:] p. _P[:] p. _N[:] p. LK_P p. LK_N p. LK_P p. LK_N p. STRL_P p. STRL_N p. STRL_P p. STRL_N _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N _P _P _P _P _P _P _P _P _P _P9 _P _P _P _P _P _P _N _N _N _N _N _N _N _N _N _N9 _N _N _N _N _N _N LK_P LK_N STRL_P STRL_N STRL_P STRL_N U E _P P P P_ E _P P_ E _P_ E _P P_ 9 _P_9 _P_ E _P P P P P N N N N N N_ E _N_ E _N N N_9 _N N N N N N_ LK_P LK_N Y W _P_ Y _P_ Y _P_ X _P_ W _P_ X _P_ W _P_ W _P P_ Z9 _P_9 Y _P_ Y _P_ Z _P_ Z _P_ Y _P P_ Y X _N_ Z _N_ X _N_ X _N_ X _N_ W _N_ W _N_ W _N_ 9 _N_ Z _N_9 Y _N_ Z _N_ Z _N_ Z _N_ Y _N N_ Z Z LK_P LK_N 9 STRL_P Y STRL_N Y STRL_P STRL_N LPTE M_PPV J SL S U M_PPV p. RSTZ G PWRNZ onn_ p. M_SP_LK W R p. M_SP_O W SPLK K p. SP_SZ X SPI W SPENZ SPO_MSI SPO p. M_SP_I p. MOE_ P p. MOE_ V MOE p. SEL_ P MOE p. SEL_ V SEL M_PPV p. R_ R SEL p. R_ R R p. R_ T K p. R_ U U p. IRQZ U RESETZ p. STR W IRQZ M_PPV p. OEZ R STROE OEZ TP TP TP TP9 E M_PPV 9 J TP_ G TP_ R R M_PPV N TP_ K K U K IST_ SL IST_ SL X + IST_ S S R R - G IST_ TEST_MUX LERT PF E GN THERM E TEMP_P E TEMP_N PROG_FUSE_EN TMP LPTE M_PPV p. STR p. MOE_ p. MOE_ p. R_ p. R_ p. R_ p. R_ M_PPV p. SEL_ p. SEL_ p. OEZ p. SP_LK p. SP_O p. SP_M_SZ p. M_RSTZ M_PPV R K M_PPV U IR R R 9 R R 9 R R R9 OEZ GN GN GN SNVHTRHLR M_PPV M_PPV U IR R R R 9 R R 9 R R M_PPV STR p. MOE_ p. MOE_ p. R_ p. R_ p. R_ p. R_ p. M_PPV SEL_ p. SEL_ p. OEZ p. M_SP_LK p. M_SP_O p. SP_SZ p. RSTZ p. ring TP for reset waveform MRST, outside of M outline R K OEZ GN M_PPV GN GN SNVHTRHLR M_PPV M_PPV M_PPV U IR SP_SZ p. OEZ IR OEZ p. M_SP_I SP_I p. R p. M_EN_FSET EN_FSET p. p. IRQZ IRQZ p. R R GN GN 9 K SNVHTRGYR ONTROL TEST SUPPORT MRST_ E MRST_ MRST_ MRST_ MRST_ E MRST_ E MRST_ MRST_ MRST_ W MRST_9 Y MRST_ X MRST_ Y MRST_ W MRST_ W MRST_ Y MRST_ X MRST MRST MRST MRST MRST MRST MRST MRST MRST MRST9 MRST MRST MRST MRST MRST MRST TP TP TP TP TP TP TP TP TP TP TP9 TP TP TP TP TP TP M ata/ontrol TP TEXS INSTRUMENTS WN ISSUE TE TE en Uhing 9// SLE RWING NO

6 M_PPV uf.uf.uf.uf.uf p. p. VIS p o Not Install o Not Install 9 9 R9 R EN_IS p. M_EN_FSET PG_IS EN_RESET PG_RESET p. PG_FSET 9 G U H J R T U 9 E E9 E E F K L M N P V W W9 W W X X X X9 Y Z Z I I I I I I I I I I I I I I L M N Z VIS VIS VIS VIS VIS VIS H J EN_FSET J EN_IS F EN_RESET K PG_FSET F PG_IS PG_RESET LPTE VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) 9 VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) 9 VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) VSS(GN) E VSS(GN) E VSS(GN) E9 VSS(GN) E VSS(GN) E VSS(GN) E VSS(GN) F VSS(GN) F VSS(GN) F VSS(GN) H VSS(GN) H VSS(GN) H VSS(GN) H VSS(GN) J VSS(GN) J VSS(GN) K VSS(GN) L VSS(GN) L VSS(GN) L VSS(GN) L VSS(GN) M VSS(GN) M VSS(GN) M VSS(GN) M VSS(GN) M VSS(GN) M VSS(GN) N VSS(GN) N VSS(GN) N VSS(GN) P VSS(GN) R VSS(GN) R VSS(GN) T VSS(GN) T VSS(GN) T VSS(GN) T VSS(GN) V VSS(GN) V VSS(GN) V VSS(GN) W VSS(GN) W VSS(GN) W9 VSS(GN) W VSS(GN) W VSS(GN) W VSS(GN) X VSS(GN) X VSS(GN) X9 VSS(GN) X VSS(GN) X VSS(GN) X VSS(GN) X VSS(GN) X VSS(GN) Y VSS(GN) Y9 VSS(GN) Y VSS(GN) Y VSS(GN) Y VSS(GN) Z VSS(GN) Z VSS(GN) Z VSS(GN) Z VSS(GN) Z VSS(GN) Z VSS(GN) Z VSS(GN) Z M Power/Gnd TEXS INSTRUMENTS WN TE en Uhing 9// ISSUE TE RWING NO SLE

7 IMPORTNT NOTIE FOR TI ESIGN INFORMTION N RESOURES Texas Instruments Incorporated ( TI ) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, TI Resources ) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you (individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of this Notice. TI s provision of TI Resources does not expand or otherwise alter TI s applicable published warranties or warranty disclaimers for TI products, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections, enhancements, improvements and other changes to its TI Resources. You understand and agree that you remain responsible for using your independent analysis, evaluation and judgment in designing your applications and that you have full and exclusive responsibility to assure the safety of your applications and compliance of your applications (and of all TI products used in or for your applications) with all applicable regulations, laws and other applicable requirements. You represent that, with respect to your applications, you have all the necessary expertise to create and implement safeguards that () anticipate dangerous consequences of failures, () monitor failures and their consequences, and () lessen the likelihood of failures that might cause harm and take appropriate actions. You agree that prior to using or distributing any applications that include TI products, you will thoroughly test such applications and the functionality of such TI products as used in such applications. TI has not conducted any testing other than that specifically described in the published documentation for a particular TI Resource. You are authorized to use, copy and modify any individual TI Resource only in connection with the development of applications that include the TI product(s) identified in such TI Resource. NO OTHER LIENSE, EXPRESS OR IMPLIE, Y ESTOPPEL OR OTHERWISE TO NY OTHER TI INTELLETUL PROPERTY RIGHT, N NO LIENSE TO NY TEHNOLOGY OR INTELLETUL PROPERTY RIGHT TI OR NY THIR PRTY IS GRNTE HEREIN, including but not limited to any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information regarding or referencing third-party products or services does not constitute a license to use such products or services, or a warranty or endorsement thereof. Use of TI Resources may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. TI RESOURES RE PROVIE S IS N WITH LL FULTS. TI ISLIMS LL OTHER WRRNTIES OR REPRESENTTIONS, EXPRESS OR IMPLIE, REGRING TI RESOURES OR USE THERE, INLUING UT NOT LIMITE TO URY OR OMPLETENESS, TITLE, NY EPIEMI FILURE WRRNTY N NY IMPLIE WRRNTIES MERHNTILITY, FITNESS FOR PRTIULR PURPOSE, N NON-INFRINGEMENT NY THIR PRTY INTELLETUL PROPERTY RIGHTS. TI SHLL NOT E LILE FOR N SHLL NOT EFEN OR INEMNIFY YOU GINST NY LIM, INLUING UT NOT LIMITE TO NY INFRINGEMENT LIM THT RELTES TO OR IS SE ON NY OMINTION PROUTS EVEN IF ESRIE IN TI RESOURES OR OTHERWISE. IN NO EVENT SHLL TI E LILE FOR NY TUL, IRET, SPEIL, OLLTERL, INIRET, PUNITIVE, INIENTL, ONSEQUENTIL OR EXEMPLRY MGES IN ONNETION WITH OR RISING OUT TI RESOURES OR USE THERE, N REGRLESS WHETHER TI HS EEN VISE THE POSSIILITY SUH MGES. You agree to fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of your noncompliance with the terms and provisions of this Notice. This Notice applies to TI Resources. dditional terms apply to the use and purchase of certain types of materials, TI products and services. These include; without limitation, TI s standard terms for semiconductor products evaluation modules, and samples ( Mailing ddress: Texas Instruments, Post Office ox, allas, Texas opyright, Texas Instruments Incorporated

Ultra-Small Footprint N-Channel FemtoFET MOSFET Test EVM

Ultra-Small Footprint N-Channel FemtoFET MOSFET Test EVM User's Guide SLPU007 December 07 Ultra-Small Footprint N-Channel FemtoFET MOSFET Test EVM Contents Introduction... Description... Electrical Performance Specifications... 4 Schematic... 4 Test Setup....

More information

USB INTERFACE PAGE 6 ADS4449/ADS58H40 INTERFACE CONNECTOR TO TSW1400 PAGE 7

USB INTERFACE PAGE 6 ADS4449/ADS58H40 INTERFACE CONNECTOR TO TSW1400 PAGE 7 POWER SUPPLY PGE US INTERFE PGE SM PGE THS PGE S/SH LMH PGE SM PGE PGES, & SM PGE THS PGE LMH PGE SM PGE INTERFE ONNETOR TO TSW PGE SH, S MP I/F RWN Y: JV SMITH -- ENGINEER: Q IHON -- Size ocument Number

More information

USB INTERFACE PAGE 6 INTERFACE CONNECTOR TO TSW1400 PAGE 7

USB INTERFACE PAGE 6 INTERFACE CONNECTOR TO TSW1400 PAGE 7 POWER SUPPLY PGE US INTERFE PGE SM PGE THS PGE S/SH LMH PGE SM PGE PGES, & SM PGE THS PGE LMH PGE SM PGE INTERFE ONNETOR TO TSW PGE TI- Size ocument Number Rev RWN Y: JV SMITH -- LOK IGRM ENGINEER: Q IHON

More information

SN54HC42, SN74HC42 4-LINE TO 10-LINE DECODERS (1 of 10)

SN54HC42, SN74HC42 4-LINE TO 10-LINE DECODERS (1 of 10) SNH, SNH -LINE TO -LINE EOERS ( of ) SLS EEMER REVISE MY Full ecoding of Input Logic ll Outputs re High for Invalid onditions lso for pplications as -Line to -Line ecoders Package Options Include Plastic

More information

TEXAS INSTRUMENTS - DLP Products

TEXAS INSTRUMENTS - DLP Products OMPUTER GENERTE RWING - O NOT ISE MNULLY NOTES, UNLESS OTHERWISE SPEIFIE: ISIONS ESRIPTION TE PPROVE.. The netname "PPV" represents connection to the +.V power plane. The netname "PP9V" represents connection

More information

SN54HC151, SN74HC151 8-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

SN54HC151, SN74HC151 8-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS SNH, SNH 8-Line to -Line Multiplexers an Perform as: oolean Function enerators Parallel-to-Serial onverters Data Source Selectors Package Options Include Plastic Small-Outline (D) and eramic Flat () Packages,

More information

SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SN54HC138, SN74HC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS SNH8, SNH8 -LINE TO 8-LINE DEODERS/DEMULTIPLEXERS Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems Incorporate Three Enable Inputs to Simplify ascading and/or Data Reception

More information

SN54HC259, SN74HC259 8-BIT ADDRESSABLE LATCHES

SN54HC259, SN74HC259 8-BIT ADDRESSABLE LATCHES SN4H29, SN4H29 8-BIT ARESSABLE LATHES 8-Bit Parallel-Out Storage Register Performs Serial-to-Parallel onversion With Storage Asynchronous Parallel lear Active-High ecoder Enable Input Simplifies Expansion

More information

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N P REVISION REOR J SP88 0 - RE N_JK P 90-00_-POS TP # - Remove these components to stack north # - Populate these components to stack north Use k Resistors or adjust as needed Header - Molex 90-0 PITORS,

More information

USBF USBF.prj. Title: Section: USBF-01. B Designer: Brian Ashelin Date: COMMUNICATIONS COMMUNICATIONS ADC ADC INPUT VCA 4 PAGE 7 PAGE 1 PAGE 5 PAGE 2

USBF USBF.prj. Title: Section: USBF-01. B Designer: Brian Ashelin Date: COMMUNICATIONS COMMUNICATIONS ADC ADC INPUT VCA 4 PAGE 7 PAGE 1 PAGE 5 PAGE 2 INPUT V INPUT V PGE PGE OMMUNITIONS OMMUNITIONS PGE INPUT V INPUT V PGE INPUT V INPUT V PGE POWER ISTRIUTION POWER ISTRIUTION PGE INPUT V INPUT V PGE LOK ISTRIUTION LOK ISTRIUTION PGE USF USF.prj 0th ve.

More information

SN54F280B, SN74F280B 9-BIT PARITY GENERATORS/CHECKERS

SN54F280B, SN74F280B 9-BIT PARITY GENERATORS/CHECKERS SN0, SN70 -T PRTY NRTORS/KRS SS00 3, PRL RVS OTOR 3 enerates ither Odd or ven Parity for Nine ata Lines ascadable for N-its Parity Package Options nclude Plastic Small-Outline Packages, eramic hip arriers,

More information

SN54F251B, SN74F251B 1-OF-8 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS

SN54F251B, SN74F251B 1-OF-8 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS -State Versio of SNFB and SNFB -State Outputs Interface Directly ith System Bus Performs Parallel-to-Serial onversion omplementary Outputs Provide True and Inverted Data Package Optio Include Plastic Small-Outline

More information

CD54/74HC393, CD54/74HCT393

CD54/74HC393, CD54/74HCT393 CD54/74HC393, CD54/74HCT393 Data sheet acquired from Harris Semiconductor SCHS186A September 1997 - Revised May 2000 High Speed CMOS Logic Dual 4-Stage Binary Counter /Title CD74 C393 D74 CT39 ) Subect

More information

CD54/74AC153, CD54/74ACT153

CD54/74AC153, CD54/74ACT153 CD4/74AC13, CD4/74ACT13 Data sheet acquired from Harris Semiconductor SCHS237A September 1998 - Revised May 2000 Dual 4-Input Multiplexer Features Description [ /Title (CD74 AC13, CD74 ACT1 3) /Subject

More information

SN54HC153, SN74HC153 DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

SN54HC153, SN74HC153 DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS Permit Multiplexing from n Lines to One Line Perform Parallel-to-Serial Conversion Strobe (Enable) Line Provided for Cascading (N Lines to n Lines) Package Options Include Plastic Small-Outline (D), Thin

More information

2-input AND gate with open-drain output. The 74AHC1G09 is a high-speed Si-gate CMOS device.

2-input AND gate with open-drain output. The 74AHC1G09 is a high-speed Si-gate CMOS device. 74HC1G09 Rev. 02 18 December 2007 Product data sheet 1. General description 2. Features 3. Ordering information The 74HC1G09 is a high-speed Si-gate CMOS device. The 74HC1G09 provides the 2-input ND function

More information

CD54/74HC164, CD54/74HCT164

CD54/74HC164, CD54/74HCT164 Data sheet acquired from Harris Semiconductor SCHS155A October 1997 - Revised May 2000 CD54/74HC164, CD54/74HCT164 High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register Features Description

More information

CD74HC93, CD74HCT93. High Speed CMOS Logic 4-Bit Binary Ripple Counter. Description. Features. Pinout. Ordering Information

CD74HC93, CD74HCT93. High Speed CMOS Logic 4-Bit Binary Ripple Counter. Description. Features. Pinout. Ordering Information Data sheet acquired from Harris Semiconductor SCHS138 August 1997 CD74HC93, CD74HCT93 High Speed CMOS Logic 4-Bit Binary Ripple Counter [ /Title (CD74 HC93, CD74 HCT93 ) /Subject High peed MOS ogic -Bit

More information

SN54HC20, SN74HC20 DUAL 4-INPUT POSITIVE-NAND GATES

SN54HC20, SN74HC20 DUAL 4-INPUT POSITIVE-NAND GATES SNHC0, SN7HC0 DUAL -INPUT POSITIVE-NAND GATES SCLS0C DECEMBER REVISED MAY 7 Package Options Include Plastic Small-Outline (D) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic

More information

CD74HC195. High Speed CMOS Logic 4-Bit Parallel Access Register. Features. Description. Ordering Information. PInout. [ /Title (CD74 HC195 ) /Subject

CD74HC195. High Speed CMOS Logic 4-Bit Parallel Access Register. Features. Description. Ordering Information. PInout. [ /Title (CD74 HC195 ) /Subject Data sheet acquired from Harris Semiconductor SCHS165 September 1997 High Speed CMOS Logic 4-Bit Parallel Access Register [ /Title (CD74 HC195 ) /Subject High peed MOS ogic -Bit aralel ccess egiser) /Autho

More information

ZCRMZN00100KITG. Crimzon Development Board Kit. Product User Guide. Introduction. Kit Contents. Applying Power to Development Board

ZCRMZN00100KITG. Crimzon Development Board Kit. Product User Guide. Introduction. Kit Contents. Applying Power to Development Board ZRMZN0000KITG rimzon evelopment oard Kit PUG000-0 Product User Guide Introduction Zilog s ZRMZN0000KITG rimzon evelopment oard Kit is designed for use as a target with the rimzon In-ircuit Emulator (ZRMZNIE0ZEMG).

More information

SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS

SN54HC682, SN74HC682 8-BIT MAGNITUDE COMPARATORS SCLS0C MARCH 9 REVISED MAY 99 Compare Two -Bit Words 00-kΩ Pullup Resistors Are on the Q Inputs Package Options Include Plastic Small-Outline (DW) and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK),

More information

Block Diagram. Level Translators USB ICSP. Ethernet PoE. Atmega 32U4. 16MHz. User button Reset 32U4. Headers. Reset. Wi-Fi Module. Leds.

Block Diagram. Level Translators USB ICSP. Ethernet PoE. Atmega 32U4. 16MHz. User button Reset 32U4. Headers. Reset. Wi-Fi Module. Leds. lock iagram Ethernet PoE Level Translators SPI HNSHKE URT tmega U US ISP MHz User button Leds Wi-Fi Module U GPIO Headers micros US US Host MHz lock iagram Size ocument Number Rev Yun ate: Thursday, January,

More information

CD54/74HC151, CD54/74HCT151

CD54/74HC151, CD54/74HCT151 CD54/74HC151, CD54/74HCT151 Data sheet acquired from Harris Semiconductor SCHS150A September 1997 - Revised May 2000 High Speed CMOS Logic 8-Input Multiplexer [ /Title (CD74H C151, CD74H CT151) /Subject

More information

Intel Edison. 7V to 15V Brick Power Supply. 4.4V power supply and battery recharger UART 1 USB 0TG. EDISON BREAKOUT BOARD Title Title page

Intel Edison. 7V to 15V Brick Power Supply. 4.4V power supply and battery recharger UART 1 USB 0TG. EDISON BREAKOUT BOARD Title Title page Intel Edison reakout Sept/0 V to V rick Power Supply V power supply and battery recharger SPI GPIO Intel Edison PWM I S URT 0 0" header US 0TG URT Level Shifter URT US FTI P P lient US Micro Type- lient

More information

CD74HC151, CD74HCT151

CD74HC151, CD74HCT151 Data sheet acquired from Harris Semiconductor SCHS150 September 1997 CD74HC151, CD74HCT151 High Speed CMOS Logic 8-Input Multiplexer [ /Title (CD74H C151, CD74H CT151) /Subject High peed MOS ogic 8- nput

More information

TC7WB66CFK,TC7WB66CL8X TC7WB67CFK,TC7WB67CL8X

TC7WB66CFK,TC7WB66CL8X TC7WB67CFK,TC7WB67CL8X CMOS Digital Integrated Circuits Silicon Monolithic TC7WB66CFK,TC7WB66CL8X TC7WB67CFK,TC7WB67CL8X 1. Functional Description Dual SPST Bus Switch 2. General TC7WB66CFK/L8X,TC7WB67CFK/L8X The TC7WB66CFK/L8X

More information

2-input EXCLUSIVE-OR gate

2-input EXCLUSIVE-OR gate Rev. 01 7 September 2009 Product data sheet 1. General description 2. Features 3. Ordering information is a high-speed Si-gate CMOS device. It provides a 2-input EXCLUSIVE-OR function. Symmetrical output

More information

INTEGRATED CIRCUITS. 74LVC138A 3-to-8 line decoder/demultiplexer; inverting. Product specification 1998 Apr 28

INTEGRATED CIRCUITS. 74LVC138A 3-to-8 line decoder/demultiplexer; inverting. Product specification 1998 Apr 28 INTEGRATED CIRCUITS -to-8 line decoder/demultiplexer; inverting 998 Apr 8 FEATURES Wide supply voltage range of. to. V In accordance with JEDEC standard no. 8-A Inputs accept voltages up to. V CMOS lower

More information

CD74HC109, CD74HCT109

CD74HC109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140 March 1998 CD74HC109, CD74HCT109 Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger [ /Title (CD74H C109, CD74H CT109) /Subject Dual J- Fliplop

More information

INTEGRATED CIRCUITS. 74LV00 Quad 2-input NAND gate. Product specification Supersedes data of 1998 Apr 13 IC24 Data Handbook.

INTEGRATED CIRCUITS. 74LV00 Quad 2-input NAND gate. Product specification Supersedes data of 1998 Apr 13 IC24 Data Handbook. INTEGRATED CIRCUITS Supersedes data of 1998 Apr 13 IC24 Data Handbook 1998 Apr 20 FEATURES Wide operating voltage: 1.0 to 5.5 V Optimized for low voltage applications: 1.0 to 3.6 V Accepts TTL input levels

More information

Obsolete Product(s) - Obsolete Product(s)

Obsolete Product(s) - Obsolete Product(s) Features W flyback SMPS demonstration board for alarm system based on the L99 and STPNKZ Input voltage: Vin: Vac (f: Hz) Output voltages: Vout =. V, Iout = A Vout = V, Iout= ma Vout =. V, Iout = ma (.9

More information

74LVC374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS

74LVC374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS INTEGRATE CIRCUITS Octal -type flip-flop; positive edge-trigger (3-State) Supersedes data of February 1996 IC24 ata Handbook 1997 Mar 12 FEATURES Wide supply voltage range of 1.2V to 3.6V In accordance

More information

The 74HC21 provide the 4-input AND function.

The 74HC21 provide the 4-input AND function. Rev. 03 12 November 2004 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL).

More information

74HC2G16; 74HCT2G16. The 74HC2G16; 74HCT2G16 is a high-speed Si-gate CMOS device. The 74HC2G16; 74HCT2G16 provides two buffers.

74HC2G16; 74HCT2G16. The 74HC2G16; 74HCT2G16 is a high-speed Si-gate CMOS device. The 74HC2G16; 74HCT2G16 provides two buffers. Rev. 1 2 November 2015 Product data sheet 1. General description The is a high-speed Si-gate CMOS device. The provides two buffers. 2. Features and benefits 3. Ordering information Wide supply voltage

More information

Temperature range Name Description Version XC7SET32GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.

Temperature range Name Description Version XC7SET32GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1. Rev. 01 3 September 2009 Product data sheet 1. General description 2. Features 3. Ordering information is a high-speed Si-gate CMOS device. It provides a 2-input OR function. Symmetrical output impedance

More information

74HC2G34; 74HCT2G34. The 74HC2G34; 74HCT2G34 is a high-speed Si-gate CMOS device. The 74HC2G34; 74HCT2G34 provides two buffers.

74HC2G34; 74HCT2G34. The 74HC2G34; 74HCT2G34 is a high-speed Si-gate CMOS device. The 74HC2G34; 74HCT2G34 provides two buffers. Rev. 01 6 October 2006 Product data sheet 1. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device. The provides two buffers. Wide supply voltage range from 2.0

More information

TC74VCX14FT, TC74VCX14FK

TC74VCX14FT, TC74VCX14FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74CX14FT, TC74CX14FK Low-oltage Hex Schmitt Inverter with 3.6- Tolerant Inputs and Outputs TC74CX14FT/FK The TC74CX14FT/FK is a high-performance

More information

April 2004 AS7C3256A

April 2004 AS7C3256A pril 2004 S7C3256 3.3V 32K X 8 CMOS SRM (Common I/O) Features Pin compatible with S7C3256 Industrial and commercial temperature options Organization: 32,768 words 8 bits High speed - 10/12/15/20 ns address

More information

74HC30; 74HCT General description. 2. Features and benefits. 3. Ordering information. 8-input NAND gate

74HC30; 74HCT General description. 2. Features and benefits. 3. Ordering information. 8-input NAND gate Rev. 7 2 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an. Inputs include clamp diodes. This enables the use of current limiting resistors

More information

CD74HC147, CD74HCT147

CD74HC147, CD74HCT147 Data sheet acquired from Harris Semiconductor SCHS149 September 1997 CD74HC147, CD74HCT147 High Speed CMOS Logic 10-to-4 Line Priority Encoder [ /Title (CD74 HC147, CD74 HCT14 7) /Subject (High Speed CMOS

More information

Silicon N-channel dual gate MOS-FET IMPORTANT NOTICE. use

Silicon N-channel dual gate MOS-FET IMPORTANT NOTICE.  use Rev. 4 2 November 27 Product data sheet IMPORTANT NOTICE Dear customer, As from October st, 26 Philips Semiconductors has a new trade name - NXP Semiconductors, which will be used in future data sheets

More information

XC7SET General description. 2. Features. 3. Applications. Ordering information. Inverting Schmitt trigger

XC7SET General description. 2. Features. 3. Applications. Ordering information. Inverting Schmitt trigger Rev. 01 31 ugust 2009 Product data sheet 1. General description 2. Features 3. pplications is a high-speed Si-gate CMOS device. It provides an inverting buffer function with Schmitt trigger action. This

More information

REVISION HISTORY DESCRIPTION INITIAL SCHEMATIC AIY REMOVED ANALOG SWITCHES CHANGED FEEDBACK

REVISION HISTORY DESCRIPTION INITIAL SCHEMATIC AIY REMOVED ANALOG SWITCHES CHANGED FEEDBACK REVISION HISTORY Notes - Unless otherwise noted. Resistances values in Ohms. apacitance values in micrarads (uf). ll 0.uF and 0.0uF capactors are decoupling and should be placed near the I they are shown

More information

TC4028BP, TC4028BF TC4028BP/BF. TC4028B BCD-to-Decimal Decoder. Pin Assignment TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC4028BP, TC4028BF TC4028BP/BF. TC4028B BCD-to-Decimal Decoder. Pin Assignment TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4028BP, TC4028BF TC4028B BCD-to-Decimal Decoder TC4028B is a BCD-to-DECIMAL decoder which converts BCD signal into DECIMAL signal. Of ten outputs

More information

CD54/74HC30, CD54/74HCT30

CD54/74HC30, CD54/74HCT30 CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121D August 1997 - Revised September 2003 High Speed CMOS Logic 8-Input NAND Gate [ /Title (CD54H C30, CD74H C30, CD74H CT30)

More information

DISCRETE SEMICONDUCTORS DATA SHEET M3D071. BAT74 Schottky barrier double diode. Product specification Supersedes data of 1996 Mar 19.

DISCRETE SEMICONDUCTORS DATA SHEET M3D071. BAT74 Schottky barrier double diode. Product specification Supersedes data of 1996 Mar 19. DISCRETE SEMICONDUCTORS DATA SHEET M3D07 Supersedes data of 996 Mar 9 200 Sep 05 FEATURES Low forward voltage Guard ring protected Small plastic SMD package. APPLICATIONS Ultra high-speed switching Voltage

More information

CD74HC165, CD74HCT165

CD74HC165, CD74HCT165 Data sheet acquired from Harris Semiconductor SCHS156 February 1998 CD74HC165, CD74HCT165 High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register Features [ /Title (CD74H C165, CD74H CT165) /Subject

More information

5.0 V 256 K 16 CMOS SRAM

5.0 V 256 K 16 CMOS SRAM February 2006 5.0 V 256 K 16 CMOS SRAM Features Pin compatible with AS7C4098 Industrial and commercial temperature Organization: 262,144 words 16 bits Center power and ground pins High speed - 10/12/15/20

More information

INTEGRATED CIRCUITS. 74LV273 Octal D-type flip-flop with reset; positive-edge trigger. Product specification 1997 Apr 07 IC24 Data Handbook

INTEGRATED CIRCUITS. 74LV273 Octal D-type flip-flop with reset; positive-edge trigger. Product specification 1997 Apr 07 IC24 Data Handbook INTEGRATED CIRCUITS Octal D-type flip-flop with reset; positive-edge trigger 1997 Apr 07 IC24 Data Handbook FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for Low Voltage applications: 1.0 to 3.6V

More information

CD54/74HC30, CD54/74HCT30

CD54/74HC30, CD54/74HCT30 CD/7HC0, CD/7HCT0 Data sheet acquired from Harris Semiconductor SCHSA August 997 - Revised May 000 High Speed CMOS Logic 8-Input NAND Gate [ /Title (CDH C0, CD7H C0, CD7H CT0) /Subject High peed MOS ogic

More information

INTEGRATED CIRCUITS. 74LV stage binary ripple counter. Product specification 1998 Jun 23 IC24 Data Handbook

INTEGRATED CIRCUITS. 74LV stage binary ripple counter. Product specification 1998 Jun 23 IC24 Data Handbook INTEGRATED CIRCUITS 1998 Jun 23 IC24 Data Handbook FEATURES Optimized for Low Voltage applications: 1.0 to 5.5V Accepts TTL input levels between V CC = 2.7V and V CC = 3.6V Typical V OLP (output ground

More information

SN54F109, SN74F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

SN54F109, SN74F109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Package Optio Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 00-mil DIPs description These devices contain two independent J-K positive-edge-triggered flip-flops.

More information

TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC

TIL308, TIL309 NUMERIC DISPLAYS WITH LOGIC SOLI-STTE ISPLYS WITH INTEGRL TTL MSI IRUIT HIP FOR USE IN LL SYSTEMS REQUIRING ISPLY OF B T 6,9-mm (0.270-Inch) haracter Height TIL308 Has Left ecimal TIL309 Has Right ecimal Easy System Interface Wide

More information

Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Pin 1 Pin 3 Pin 5 Pin 4 n.c.

Qualified for industrial applications according to the relevant tests of JEDEC47/20/22. Pin 1 Pin 3 Pin 5 Pin 4 n.c. TVS (transient voltage suppressor) Bi/uni-directional, 3.3 V, 2 pf, RoHS and halogen free compliant Feature list ESD/Transient/Surge protection according to: - IEC61-4-2 (ESD): ±3 kv (air/contact discharge)

More information

STM1831. Voltage detector with sense input and external delay capacitor. Features. Applications

STM1831. Voltage detector with sense input and external delay capacitor. Features. Applications Voltage detector with sense input and external delay capacitor Features Voltage monitored on separate sense input V SEN Factory-trimmed voltage thresholds in 100 mv increments from 1.6 V to 5.7 V ±2% voltage

More information

Dual 3-channel analog multiplexer/demultiplexer with supplementary switches

Dual 3-channel analog multiplexer/demultiplexer with supplementary switches with supplementary switches Rev. 03 16 December 2009 Product data sheet 1. General description 2. Features 3. Applications 4. Ordering information The is a dual 3-channel analog multiplexer/demultiplexer

More information

TL601, TL604, TL607, TL610 P-MOS ANALOG SWITCHES

TL601, TL604, TL607, TL610 P-MOS ANALOG SWITCHES TL0, TL0, TL0, TL0 P-MO NLOG WITCHE L0 D, JUNE 9 REVIED OCTOBER 9 witch ± 0-V nalog ignals TTL Logic Capability -to 0-V upply Ranges Low (00 Ω) On-tate Resistance High (0 Ω) Off-tate Resistance -Pin Functions

More information

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting 3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible

More information

4-bit magnitude comparator

4-bit magnitude comparator Rev. 6 21 November 2011 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a that compares two 4-bit words, A and B, and determines whether A is greater than

More information

Dual N-channel field-effect transistor. Two N-channel symmetrical junction field-effect transistors in a SOT363 package.

Dual N-channel field-effect transistor. Two N-channel symmetrical junction field-effect transistors in a SOT363 package. Rev. 2 15 September 211 Product data sheet 1. Product profile 1.1 General description Two N-channel symmetrical junction field-effect transistors in a SOT363 package. CAUTION This device is sensitive to

More information

STTH3002. Ultrafast recovery diode. Main product characteristics. Features and benefits. Description. Order codes K DOP3I STTH3002PI DO-247 STTH3002W

STTH3002. Ultrafast recovery diode. Main product characteristics. Features and benefits. Description. Order codes K DOP3I STTH3002PI DO-247 STTH3002W Ultrafast recovery diode Main product characteristics I F(V) 3 K V RRM 2 V T j (max) 175 C V F (typ).77 V t rr (typ) 22 ns Features and benefits Very low conduction losses Negligible switching losses K

More information

Low-power dual Schmitt trigger inverter

Low-power dual Schmitt trigger inverter Rev. 1 9 October 2014 Product data sheet 1. General description The is a dual inverter with Schmitt-trigger inputs. It transforms slowly changing input signals into sharply defined, jitter-free output

More information

74HC1G125; 74HCT1G125

74HC1G125; 74HCT1G125 Rev. 05 23 December 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed, Si-gate CMOS device. The provides one non-inverting buffer/line driver with 3-state

More information

SN54HC273, SN74HC273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR SCLS136B DECEMBER 1982 REVISED MAY 1997

SN54HC273, SN74HC273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR SCLS136B DECEMBER 1982 REVISED MAY 1997 ontain Eight Flip-Flops With Single-ail Outputs Direct lear Input Individual Data Input to Each Flip-Flop Applications Include: Buffer/Storage egisters Shift egisters Pattern Generators Package Options

More information

60 V, 0.3 A N-channel Trench MOSFET

60 V, 0.3 A N-channel Trench MOSFET Rev. 01 11 September 2009 Product data sheet 1. Product profile 1.1 General description ESD protected N-channel enhancement mode Field-Effect Transistor (FET) in a small SOT2 (TO-26AB) Surface-Mounted

More information

74HC General description. 2. Features. Octal D-type flip-flop; positive-edge trigger; 3-state; inverting

74HC General description. 2. Features. Octal D-type flip-flop; positive-edge trigger; 3-state; inverting Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The is specified in compliance

More information

CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238

CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147C October 1997 - Revised August 2001 CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 High Speed CMOS Logic 3-to-8 Line Decoder/ Demultiplexer

More information

2N7002F. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.

2N7002F. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1. Rev. 3 28 April 26 Product data sheet. Product profile. General description N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology..2 Features Logic level

More information

The 74LV08 provides a quad 2-input AND function.

The 74LV08 provides a quad 2-input AND function. Rev. 4 8 December 2015 Product data sheet 1. General description The is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC08 and 74HCT08. The provides a quad 2-input AND function.

More information

7-stage binary ripple counter

7-stage binary ripple counter Rev. 9 28 April 2016 Product data sheet 1. General description The is a with a clock input (CP), an overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to Q6).

More information

The 74LV08 provides a quad 2-input AND function.

The 74LV08 provides a quad 2-input AND function. Quad 2-input ND gate Rev. 03 6 pril 2009 Product data sheet. General description 2. Features 3. Ordering information The is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC0

More information

DATA SHEET. PEMD48; PUMD48 NPN/PNP resistor-equipped transistors; R1 = 47 kω, R2 = 47 kω and R1 = 2.2 kω, R2 = 47 kω DISCRETE SEMICONDUCTORS

DATA SHEET. PEMD48; PUMD48 NPN/PNP resistor-equipped transistors; R1 = 47 kω, R2 = 47 kω and R1 = 2.2 kω, R2 = 47 kω DISCRETE SEMICONDUCTORS DISCRETE SEMICONDUCTORS DATA SHEET NPN/PNP resistor-equipped transistors; R1 = 47 kω, R2 = 47 kω and R1 = 2.2 kω, R2 = 47 kω Supersedes data of 2004 Jun 02 2004 Jun 24 FEATURES Built-in bias resistors

More information

2N7002T. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1.

2N7002T. 1. Product profile. 2. Pinning information. N-channel TrenchMOS FET. 1.1 General description. 1.2 Features. 1. Rev. 1 17 November 25 Product data sheet 1. Product profile 1.1 General description N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. 1.2 Features

More information

INTEGRATED CIRCUITS. PCK2002P 533 MHz PCI-X clock buffer. Product data Supersedes data of 2001 May Dec 13. Philips Semiconductors

INTEGRATED CIRCUITS. PCK2002P 533 MHz PCI-X clock buffer. Product data Supersedes data of 2001 May Dec 13. Philips Semiconductors INTEGRATED CIRCUITS Supersedes data of 2001 May 09 2002 Dec 13 Philips Semiconductors FEATURES General purpose and PCI-X 1:4 clock buffer 8-pin TSSOP package See PCK2001 for 48-pin 1:18 buffer part See

More information

74LV393 Dual 4-bit binary ripple counter

74LV393 Dual 4-bit binary ripple counter INTEGRATED CIRCUITS Supersedes data of 1997 Mar 04 IC24 Data Handbook 1997 Jun 10 FEATURES Optimized for Low Voltage applications: 1.0 to.6v Accepts TTL input levels between V CC = 2.7V and V CC =.6V Typical

More information

TC74HC155AP, TC74HC155AF

TC74HC155AP, TC74HC155AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC155AP, TC74HC155AF Dual 2-to-4 Line Decoder 3-to-8 Line Decoder TC74HC155AP/AF The TC74HC155A is a high speed CMOS DUAL 2-to-4 LINE DECODER

More information

PC Card (PCMCIA) Interface Switch

PC Card (PCMCIA) Interface Switch End of Life. Last Available Purchase Date is 3-Dec-204 Si9706DY PC Card (PCMCIA) Interface Switch FEATURES Single SO-8 Package CMOS-Logic Compatible Inputs Slow V CC Ramp Time Smart Switching Extremely

More information

I F T s =25 C 83 A. T j = 150 C T s =70 C 67 A. T j = 175 C T s =70 C 79 A I Cnom 75 A I CRM I CRM = 3 x I Cnom 225 A V GES

I F T s =25 C 83 A. T j = 150 C T s =70 C 67 A. T j = 175 C T s =70 C 79 A I Cnom 75 A I CRM I CRM = 3 x I Cnom 225 A V GES SEMITOP 4 Press-Fit IGBT module Engineering Sample SK 75 GD 12T4 Tp Features One screw mounting module Solder free mounting with Press-Fit terminals Fully compatible with other SEMITOP Press-Fit types

More information

FDV301N Digital FET, N-Channel

FDV301N Digital FET, N-Channel FVN igital FET, N-Channel General escription This N-Channel logic level enhancement mode field effect transistor is produced using ON Semiconductor's proprietary, high cell density, MOS technology. This

More information

INTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook.

INTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook. INTEGRATED CIRCUITS Supersedes data of 1997 May 15 IC24 Data Handbook 1998 Jun 23 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for low voltage applications: 1.0V to 3.6V Accepts TTL input levels

More information

TOSHIBA Field Effect Transistor Silicon N Channel MOS Type SSM6N15FE

TOSHIBA Field Effect Transistor Silicon N Channel MOS Type SSM6N15FE SSMNFE TOSHIBA Field Effect Transistor Silicon N Channel MOS Type SSMNFE High Speed Switching Applications Analog Switching Applications Unit: mm Small package Low ON resistance : R on =. Ω (max) (@V GS

More information

3.3 V 256 K 16 CMOS SRAM

3.3 V 256 K 16 CMOS SRAM August 2004 AS7C34098A 3.3 V 256 K 16 CMOS SRAM Features Pin compatible with AS7C34098 Industrial and commercial temperature Organization: 262,144 words 16 bits Center power and ground pins High speed

More information

HEF4024B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. 7-stage binary counter

HEF4024B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. 7-stage binary counter Rev. 7 18 November 2011 Product data sheet 1. General description 2. Features and benefits 3. Applications The is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master

More information

74HC1G86; 74HCT1G86. 2-input EXCLUSIVE-OR gate. The standard output currents are half those of the 74HC/HCT86.

74HC1G86; 74HCT1G86. 2-input EXCLUSIVE-OR gate. The standard output currents are half those of the 74HC/HCT86. Rev. 04 20 July 2007 Product data sheet 1. General description 2. Features 3. Ordering information 74HC1G86 and 74HCT1G86 are high-speed Si-gate CMOS devices. They provide a 2-input EXCLUSIVE-OR function.

More information

BCD-to-decimal decoder

BCD-to-decimal decoder -to-decimal decoder U0 The U0 is a decoder which converts signals to decimal signals. Of the ten outputs to, those corresponding to the to input codes are set to, and the others are all set to. If inputs

More information

AP Pin Assignments. Description. Features UNIVERSAL DC/DC CONVERTER AP34063 SO-8. PDIP-8 ( Top View ) ( Top View )

AP Pin Assignments. Description. Features UNIVERSAL DC/DC CONVERTER AP34063 SO-8. PDIP-8 ( Top View ) ( Top View ) UNIVERSAL DC/DC CONVERTER Description Pin Assignments The Series is a monolithic control circuit containing the primary functions required for DC-to-DC converters. These devices consist of an internal

More information

HEF40175B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. Quad D-type flip-flop

HEF40175B. 1. General description. 2. Features and benefits. 3. Applications. 4. Ordering information. Quad D-type flip-flop Rev. 8 2 November 20 Product data sheet. General description 2. Features and benefits 3. pplications The is a quad edge-triggered D-type flip-flop with four data inputs (D0 to D3), a clock input (CP),

More information

74HC153-Q100; 74HCT153-Q100

74HC153-Q100; 74HCT153-Q100 Rev. 3 23 January 2014 Product data sheet 1. General description The is a dual 4-input multiplexer. The device features independent enable inputs (ne) and common data select inputs (S0 and S1). For each

More information

8-bit binary counter with output register; 3-state

8-bit binary counter with output register; 3-state Rev. 01 30 March 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with Low power Schottky TTL (LSTTL). It

More information

INTEGRATED CIRCUITS. 74ALS138 1-of-8 decoder/demultiplexer. Product specification 1996 Jul 03 IC05 Data Handbook

INTEGRATED CIRCUITS. 74ALS138 1-of-8 decoder/demultiplexer. Product specification 1996 Jul 03 IC05 Data Handbook INTEGRATED CIRCUITS 1996 Jul 03 IC05 Data Handbook FEATURES Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding DESCRIPTION The decoder accepts three

More information

74LV374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS

74LV374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS INTEGRATE CIRCUITS Octal -type flip-flop; positive edge-trigger (3-State) Supersedes data of 1996 Feb IC24 ata Handbook 1997 Mar 20 FEATURES Wide operating voltage: 1.0 to 5.5 Optimized for Low oltage

More information

74AHC1G00; 74AHCT1G00

74AHC1G00; 74AHCT1G00 74HC1G00; 74HCT1G00 Rev. 06 30 May 2007 Product data sheet 1. General description 2. Features 3. Ordering information 74HC1G00 and 74HCT1G00 are high-speed Si-gate CMOS devices. They provide a 2-input

More information

S-5743 A Series 125 C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC. Features. Applications. Package.

S-5743 A Series 125 C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC. Features. Applications. Package. www.ablicinc.com S-5743 A Series 125 C OPERATION HIGH-WITHSTAND VOLTAGE HIGH-SPEED BIPOLAR HALL EFFECT LATCH IC ABLIC Inc., 2015-2017 Rev.1.1_02 This IC, developed by CMOS technology, is a high-accuracy

More information

PMN40LN. 1. Description. 2. Features. 3. Applications. 4. Pinning information. TrenchMOS logic level FET

PMN40LN. 1. Description. 2. Features. 3. Applications. 4. Pinning information. TrenchMOS logic level FET M3D32 Rev. 1 13 November 22 Product data 1. Description N-channel logic level field-effect power transistor in a plastic package using TrenchMOS technology. Product availability: in SOT457 (TSOP6). 2.

More information

TrenchMOS ultra low level FET

TrenchMOS ultra low level FET M3D32 Rev. 1 27 September 22 Product data 1. Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS technology. Product availability: in SOT457 (TSOP6). 2.

More information

74LV74 Dual D-type flip-flop with set and reset; positive-edge trigger

74LV74 Dual D-type flip-flop with set and reset; positive-edge trigger INTEGRATED IRUITS positive-edge trigger Supersedes data of 1996 Nov 07 I24 Data andbook 1998 Apr 20 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for ow Voltage applications: 1.0 to 3.6V Accepts

More information

LL4148 / LL4448. Small Signal Fast Switching Diodes. Vishay Semiconductors

LL4148 / LL4448. Small Signal Fast Switching Diodes. Vishay Semiconductors Small Signal Fast Switching Diodes Features Silicon Epitaxial Planar Diodes Electrical data identical with the devices e2 N448 and N4448 respectively Lead (Pb)-free component Component in acc. to RoHS

More information

Order codes Part numbers DPAK (tape and reel) PPAK (tape and reel)

Order codes Part numbers DPAK (tape and reel) PPAK (tape and reel) 800 ma fixed and adjustable output very low drop voltage regulator Features ery low dropout voltage (typ. 0.4 at 800 ma) Guaranteed output current up to 800 ma Fixed and adjustable output voltage (± 1

More information

74HC10; 74HCT General description. 2. Features and benefits. 3. Ordering information. Triple 3-input NAND gate

74HC10; 74HCT General description. 2. Features and benefits. 3. Ordering information. Triple 3-input NAND gate Rev. 3 5 August 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a triple 3-input NAND gate. Inputs include clamp diodes that enable the use of current

More information