Phase Noise Simulation and. SystemVerilog
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1 Phase Noise Simulation and Modeling of ADPLL by SystemVerilog Tingjun Wen Integrated Device Technology Tad Kwasniewski Carleton University Sept
2 Motivations Integrate the phase noise behavioral simulation with the circuit it level l design Find a better random number generator with good statistical ti ti properties to make the phase noise simulation more accurate Make the phase noise simulation faster Use the phase noise behavioral simulation to explore new ADPLL architectures with lower phase noise 2
3 Behavioral Simulation Languages LANGUAGE Matlab/Simulink Verilog/VHDL Verilog-AMS/VHDL-AMS SystemVerilog SystemC/AMS EVENT-DRIVEN Function calls Intrinsic Intrinsic i Intrinsic C++ Class Library 3
4 SystemVerilog + C Language Direct programming interface (DPI) Can call any standard C functions directly Exporting Verilog tasks and functions to C Example noise.c: double flicker(double stddev, double *pflicker); noise.v: import "DPI-C" function real flicker(input real stddev, output real pflicker); clock) begin period = period + flicker(flicker_stddev, pflicker); end 4
5 Noise Terminologies 5
6 Spectrum vs Distribution FFT Spectrum Distribution White (0dB/dec) Uniform White (0dB/dec) Pink (-10dB/dec)? Red (-20dB/dec)? Infrared (-30dB/dec)? Normal 6
7 Noise Generator Hierarchy Mersenne twister* Ranlux algorithm Tausworthe LFSR GFSR Inverse transform Uniform White Noise Box-Muller* Filter fitting Ziggurat Voss McCartney* Marsaglia Normal White Noise Pink Noise Integral* Red Noise Integral* Infrared Noise * Used by this paper 7
8 Uniform White Noise Generator Mersenne twister generator have a period of (2^ ) there is negligible serial correlation Have good statistical randomness Source code available 8
9 Normal White Noise Generator Central limit theorem Box-Muller algorithm Generate Gaussian random variable from uniform distribution Simple to implement 9
10 Normal White Noise Generator 10
11 Correlated Pink Noise Generator* Stochastic Voss-McCartney variant Popular in the music industry Each data needs no more than 2 random numbers generation operations It is very efficient * 11
12 Correlated Pink Noise Generator* 12
13 Higher Order Noise Generators Similar il to the noise shaping theory developed from Sigma-Delta modulator Differentiation (+20dB/dec) Σ Integration (- 20dB/dec) Σ White noise Red (-20dB/dec) Σ Pink noise Infrared (-30dB/dec) 13
14 Higher Order Noise Generators 14
15 ADPLL Architecture module adpll (fref, M, fdiv, fout, rst_n); input fref, rst_n, fdiv; input [`div_width-1:0] M; output fout; pfd PFD (.fref(fref),.fdiv(fdiv),.up(up),.dn(dn),.rst_n(rst_n)); dco DCO (.up(up),.dn(dn),.fdiv(fdiv),.fout(fout)); div DIV (.fin(fout1),.m(m),.fdiv(fdiv),.rst_n(rst_n)); n)); endmodule 15
16 Phase Frequency Detector i n c l u d e a d p l l. vh module pfd ( f r e f, f d i v, up, dn, r s t n ) ; output up, dn ; input f r e f, f d i v, r s t n ; reg up, dn ; wire p f d r s t ; posedge frefor f posedge pfdrst) begin i f ( p f d r s t ) up <= 0 ; e l s e up <= 1 ; end posedge fdi v or posedge p fd r s t)b begin i f ( p f d r s t ) dn <= 0 ; e l s e dn <= 1 ; end a s s i g n p f d r s t = r s t n ( up & dn ) ; endmodule 16
17 DCO with Integrated LPF 17
18 DCO with Integrated LPF up or dn ) begin case ({ up, dn }) 2 b01 : I = I 1 ; 2 b10 : I = I + 1 ; d e f a u l t : ; endcase P [ 0 ] = up ˆ dn ; P [ 1 ] = up & dn ; end posedge fdiv) Ctrl<=( Kp P ) + ( Ki I ) ; always begin p e r i o d = 1. 0 / ( f 0 d c o + Kdco C t r l ); p e r i o d = p e r i o d + f l i c k e r (s t d d e v, p f l i c k e r ) ; #( p e r i o d / 1 e 12/2) f o u t = f o u t ; end 18
19 Step Response without Noise 19
20 Step Response with Noise 20
21 Step Response with Noise 21
22 Simulated Phase Noise 22
23 Conclusions Mersenne-Twister Uniform white noise Box-Muller Normal white noise Stochastic V-M 1/f pink noise Integral operation higher order noises SystemVerilog DPI to integrate with the noise generator functions written in C language Phase noise simulation techniques successfully applied to a new ADPLL architecture Event-driven runs less than 1 minute while Spice runs by hours or by days Design parameters extracted for future transistor level circuit design 23
24 References [1] K. Kundert. (2006, Aug.) Predicting the phase noise and jitter of pll based frequency synthesizers. [Online]. Available: [2] J. Zhuang, Q. Du, and T. Kwasniewski, Event-driven modeling and simulation of an digital PLL, Behavioral Modeling and Simulation Workshop, Proceedings of the 2006 IEEE International, pp , Sept [3] S. Huang, H. Ma, and Z. Wang, Modeling and simulation to the design of fractional-n n frequency synthesizer, in DATE 07: Proceedings of the conference on Design, automation and test in Europe. San Jose, CA, USA: EDA Consortium, 2007, pp [4] R. Staszewski, C. Fernando, and P. Balsara, Event-driven simulation and modeling of phase noise of an rf oscillator, Circuits and Systems I: Regular Papers, IEEE Transactions on [Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on], vol. 52, no. 4, pp , April [5] M. Matsumoto and T. Nishimura, Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator, ACM Trans. Model. Comput. Simul., vol. 8, no. 1, pp. 3 30, [6] L. Tammell. (2006, Jan.) Improvements in the correlated pink noise generator evaluation. [Online]. Available: [7] J. Zhuang, Q. Du, and T. Kwasniewski, A 3.3 ghz lc-based digitally controlled oscillator with 5khz frequency resolution, Solid-State State Circuits Conference, ASSCC 07. IEEE Asian, pp , Nov
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