ECE 416/516 IC Technologies

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1 ECE 46/56 IC Technologies Professor James E. Morris Spring 0 Chapter 4 Thermal Oxidation

2 THERMAL OXIDATION Basic Concepts SiO and the Si/SiO interface are the principal reasons for silicon s dominance in the IC industry. Oxide Thickness µm 0. µm 0 nm nm Thermally Grown Oxides Field Oxides Masking Oxides Pad Oxides Gate Oxides Tunneling Oxides Chemical Oxides from Cleaning Native Oxides Deposited Oxides Backend Insulators Between Metal Layers Masking Oxides SiO : Easily selectively etched using lithography. Masks most common impurities (B, P, As, Sb). Excellent insulator ( 0 6 cm, E ). g 9 ev High breakdown field ( 0 7 Vcm - ) Excellent junction passivation. Stable bulk electrical properties. Stable and reproducible interface with Si. No other known semiconductor/insulator combination has properties that approach the Si/SiO interface. 3 Figure 4.4 Horizontal tube oxidation/diffusion system includes computer controller, load station, and four tubes (photo courtesy of ASM International).

3 Figure 4.6 Vertical oxidation system showing carousel, robot arm, and wafers about to be raised into the furnace (photo courtesy of ASM International). Figure 4.5 Plan view of vertical furnace. Cassettes with 5 wafers are loaded into the carousel and transferred to the process stage, where they are raised into the furnace (courtesy of ASM International). 3

4 Oxidation systems are conceptually very simple. In practice today, vertical furnaces, RTO systems and fast ramp furnaces all find use. Quartz Tube Wafers Quartz Carrier Resistance Heating O H Thermal oxidation can potentially be used in many places in chip fabrication. In practice, deposited SiO layers are increasingly being used (lower Dt). 7 Si H SiO H O Non-bridging -OH Si-OH Overall Reaction is: Si+H O-->SiO +H In SiO : H 0+Si-0-Si --> Si-OH Si-OH+Si-Si --> Si-O-Si +H <---- Reaction builds SiO at Si surface Final Si/SiO interface inside original Si Interface clean & well characterized Si Bridging -OH e.g. in Si-O- Diffusion process important D=D 0 exp-e a /kt 4

5 Si(solid) + O (gas) SiO OR: Si (solid) + H O (steam) SiO + H Figure 4. Schematic diagram of the oxidant flows during oxidation. Could write J J gas O but more commonly J D h ( C C g C C, where ), where g t g sgl s s C g h g n Pg V kt mass transport coefficient Co Ci So J hg ( Cg Cs ), J DO, & J3 ksci, where ks chemical rate constant t ox Continuity : J J J J3 gives equations in 3 unknowns :Cs, Co, Ci Co Ci hg ( Cg Cs ) DO ksc i t ox Add Henry's Law : Co Hpg HkTCs, where H is a segregation coefficient, Hpg hg then solving gives Ci where h ks kstox HkT h D J k Hk p sci dtox s g and growth rate R N N dt ks kst N h D where N oxidant molecule density in grown oxide O.x0 /cc for O and 4.4x0 ox O /cc for H O 4/0/0 ECE 46/56 Spring

6 dt dt ox Hks pg ks kst N h D N with solution Hk p s g ox O gives N ks h t t t t ti ks kst h D k s t t t t ox tox i D ox i ox i tox tox t t B / A B B B / A t i Ati where ti and acount for any initial oxide thickness. B A t The quadratic solution is t ox with two limiting solutions : A / 4B B tox t for smalltox, and tox Bt for large tox A B/A and B are referred to as the linear and parabolic rate constants O ox O ox dt ox i Hk s t p g t 0 dt 4/0/0 ECE 46/56 Spring 00 CG CS SiO Growth Kinetics Models A. Deal Grove Model µm µm x O The basic model for oxidation was developed in 965 by Deal and Grove. Gas CO Oxide CIC I Silicon Si O SiO Si H O SiO H () (3) F F F 3 F h G C G C S F D N x D C O C I F 3 k S C I x O (4) (5) (6) 6

7 Under steady state conditions, F = F = F 3 so C I C * k S h k S x O D C * k S x O D (7) C * k S x O D C O k S h k S x C * (8) O D Note that the simplifications are made by neglecting F which is a very good approximation. Combining (6) and (7), we have dx dt F N N k S C * k S h k S x O D (9) Integrating this equation, results in the linear parabolic model. 3 where and x O x i B x O x i B/A t (0) B DC * (parabolic rate constant) () N B () A C * N C* k S (linear rate constant) N k S h (0) can also be written with oxide thickness as a function of time. x O A t A /4B (3) and where dx dt B A x i Ax i B B Ce A x x0 0 x o L (4) for simulations (Massoud et al) 4 7

8 If t small, t << DN /k s C o :- x (D/k s ) [ (+(/)( k s C o t /DN )) -] = (k s C O /N )t If t large, t >> DN /k s C o :- x (D/k s ) [k s C o t) / DN ] ½ 0 Thickness () = (DC O /N ) / t / Slope = / 00C wet log (thickness x) Xc Slope = Reaction rate limited Mass Transport limited Slope = / t c log t 00C dry 850C wet 00 At t c =DN /k s C o :- x(t c ) small = (k s C o / N )(D N /k s C o ) = D/k s..0 Slope =. 850C dry 00 0 time hours x(t c ) large = (DC o / N ) / (D N /k s C o ) / = D/k s Transition at thickness x C D/k s x + (D/k s ) x - (DC o t / N ) = 0 Usually write as x + Ax = Bt ---> x (B/A)t for linear, rate limited region, x << A ---> x B / t / for parabolic, transport limited region, x >> A where A = D/k s x c 0 B/A (/hr) H O B ( /hr).78 ev Ea =.05 ev H O Dry O Ea = ev T -..0 Dry O.3 ev T -.6. x x 0-3 Note: c. ev to break Si Si bonds 8

9 J Cg Cs J J 3 Co SiO x Require: F = h G (C G C S ) = F = F 3 i.e. Add F requirement to basic treatment Ci Si Henry s Law C O = Hp s C * = Hp G Where p s is partial pressure at surface p G is partial pressure in gas C * is equilib bulk conc n in SiO at p G And C G =p G /kt, C S =p S /kt F =h G (p G -p s )/kt =(h G /Hkt)(C*-C O ) = h (C*-C O ) by definition of h F = F = F 3 Manipulate: h(c*-c O ) = D(C O -C i )/x = k s h(c*-c O ) = (D/x) (C O -(h/k s )(C*-C O ) ) i.e. C* (h + Dh/k s x) = C O (D/x + h + Dh/k s x) --> C O =C*(+k s x/d) / ( + k s x/d + k s /h) C i =k s h (C*-C O ) = k s h C* ( - C O /C*) --> C*/(+k s x/d + k s /h) It is more useful to have constants A & B in terms of C* than C O, i.e. related to p G Also C 0 not constant - depends on x Redo basic theory: dx/dt = F 3 /N = (DC O /N ) /(x+d/k s ) ( = k s C i /N ) =(D/N )(+k s x/d)c*/(d/k s )(+k s x/d)(+k s x/d+k s /h) = k s (C*/N ) / (+k s x/d +k s /h) (k s /D) xdx + (+k s /h) dx = (k s C*/N ) dt (k s /D)x + (+k s /h)x = (k s C*/N )t + constant Boundary condition at t=0: constant = (k s x i / D) + ( + k s /h)x i = k s C* /N as definition of i.e. = (N /C*) [x i /D + x i (/k s + /h) ] x + D(/k s + /h)x - (DC*/N )(t+ ) = 0 giving x= D (/k s + /h) x [ {+C*(t+ ) / N D (/k s + /h) } / - ] 9

10 If t small: If t large: x=d(/k s +/h) [C*(t+ )/N D(/k s + /h) ] = C*(t+ ) / N (/k s + /h) = (B/A)(t+ ) defining B/A x [DC*(t+ )/N ] / = B / (t+ ) / defining B where B=DC*/N (compare DC O /N ) and A=DC*/N / C*/N (/k s + /h) = D(/k s + /h) (compare D/k s ) and = (x i +Ax i ) / B Theory above assumes diffusion through oxide What if there is no oxide?? If extrapolate experimental data based on theory above to t=0, get initial film intercept at c.0nm Early growth processes not clear Initial accelerated growth: to 3±3nm in dry O negligible effect in wet O /steam 0

11 Figure 4. Arrhenius plot of the B oxidation coefficient. The wet parameters depend on the H O concentration and therefore on the gas flows and pyrolysis conditions (after Deal and Grove). Figure 4.3 Arrhenius plot of the ratio (B/A) of the oxidation parameters (after Deal and Grove).

12 The rate constants B and B/A have physical meaning (oxidant diffusion and interface reaction rate respectively). (5) Ambient B B/A B C expe /kt Dry O C = 7.7 x 0 µ hr - E =.3 ev Wet O C =.4 x 0 µ hr - E = 0.7 ev H O C = 3.86 x 0 µ hr - E = 0.78 ev T (ÞC) C = 6.3 x 0 6 µ hr - E =.0 ev C = 8.95 x 0 7 µ hr - E =.05 ev C =.63 x 0 8 µ hr - E =.05 ev 800 B A C exp E /kt (6) Numbers are for () silicon, for (00) divide C by B/A H O B µm hr - B/A µm hr B Dry O B/A Dry O B H O Plots of B, B/A using the values in the above Table /T (Kelvin) a) 00ÞC c) 900ÞC 00ÞC 000ÞC 800ÞC Time - hours Calculated (00) silicon dry O oxidation rates using Deal Grove b) 00 ÞC 000 ÞC 900 ÞC 800 ÞC 700 ÞC Time - hours Calculated (00) silicon H O oxidation rates using Deal Grove. Example: Problem 6.3 in the text: a) 3 hrs in 00 C = 0. µm + b) hrs in H 900 C = 0.4 µm + c) hrs in 00 C = 0.5 µm total oxide thickness. 4

13 Figure 4.0 The oxidation of undoped polysilicon in (A) wet and (B) dry ambients (after Wang et al., reprinted by permission, The Electrochemical Society) Figure 4.4 The effect of chlorine on the oxidation rate (after Hess and Deal, reprinted by permission, The Electrochemical Society). 3

14 Figure 4.5 High pressure studies of the parabolic and linear rate coefficients in steam (after Razouk et al., reprinted by permission, The Electrochemical Society). Figure 4.6 Oxide thickness dependence of the growth rate for very thin oxides oxidized in dry O. The substrates are lightly doped (00) silicon (from Massoud et al., reprinted by permission, The Electrochemical Society). 4

15 B. Thin Oxide Growth Kinetics A major problem with the Deal Grove model was recognized when it was first proposed - it does not correctly model thin O growth kinetics. Experimentally O oxides grow much faster for 0 nm than Deal Grove predicts MANY models have been suggested in the literature.. Reisman et. al. Model b x O at t i b or x O at x b i a (7) Power law fits the data for all oxide thicknesses. a and b are experimentally extracted parameters. Physically - interface reaction controlled, volume expansion and viscous flow of SiO control growth.. Han and Helms Model dx O dt B B x O A x O A (8) Second parallel reaction added - fits the data for all oxide thicknesses. Three parameters (one of the A values is 0). Second process may be outdiffusion of O V and reaction at the gas/sio interface Massoud et. al. Model dx O B dt x O A Cexp x O (9) L Second term added to Deal Grove model - higher dx/dt during initial growth. L 7 nm, second term disappears for thicker oxides. Easy to implement along with the DG model, used in process simulators. Data agrees with the Reisman, Han and Massoud models. (800 C dry O model comparison below.) See Campbell : equations 4.6 & 4.7/8 for other models Oxide Thickness - microns Deal Grove Model ( = 8 hrs) Reisman et. al. Model Han & Helms Model Deal Grove Model ( = 0) Time - hours 30 5

16 Structure Figure 4.7 The physical structure of SiO consists of silicon atoms sitting at the center of oxygen polyhedra. Figure 4.8 Schematic of impurities and imperfections in SiO. 6

17 Ellipsometry; Interference t ox n ox variable λ constructive interference Color SiO thickness (nm) Si 3 N 4 thickness (nm) Silver <7 <0 Brown <53 <40 Yellow brown <73 <55 Red <97 <73 Deep blue <00 <77 Blue <0 <93 Pale blue <30 <00 Very pale blue <50 <0 Silver <60 <0 Light yellow <70 <30 Yellow <00 <50 Orange red <40 <80 Red <50 <90 Dark red <80 <0 Blue <30 <30 Blue green <330 <50 Light green <370 <80 Orange yellow <400 <300 Red <440 <330 4/0/0 ECE 46/56 Spring Estimated thickness for breakdown defects Figure 4.9 Typical breakdown histogram for an oxide. 7

18 SiO is amorphous even though it grows on a crystalline substrate. Q K+ m SiO Na Q ot Transition Region Silicon x x x x x x Q it Q f Four charges are associated with insulators and insulator/semiconductor interfaces. Q f - fixed oxide charge Q it - interface trapped charge Q m - mobile oxide charge Q ot - oxide trapped charge 35 Figure 4.4 Silicon silicon dioxide structure with mobile, fixed charge, and interface states ( 980, IEEE, after Deal). 8

19 electron trapping Breakdown due to positive trapped charge at interface Figure 4.0 Constant voltage stress measurements of a 00 Å oxide film. The sharp increase in current near the end of the trace indicates that irreversible breakdown has occurred. Thin oxide: no trapping Figure 4. Plot similar to Figure 4.0 for a 6 Å oxide. Note the lack of charge trapping and the low voltage required for stressing. 9

20 Figure 4. The Deal triangle showing the effects of a high temperature inert (nitrogen or argon) postoxidation anneal on interface states and fixed charge density (after Deal et al., reprinted by permission, The Electrochemical Society). a) e - + VG N Silicon Doping = N D CO - C + CO V G C-V Measurements Powerful technique for characterizing semiconductor/ insulator structures. a) Accumulation b) - VG C xd CO CD CO b) Depletion e V G c) Q G -- VG C CO c) Inversion Q I Q D + + x DMax + + e - Holes CO C DMin - V TH + V G DC bias + small AC high frequency signal applied. 40 0

21 C Ideal LF Cox CMin Ideal HF Deep Depletion DC Gate Voltage Electric field lines pass through the perfect insulator and Si/SiO interface, into the substrate where they control charge carriers. Accumulation, depletion and inversion result. HF curve - inversion layer carriers cannot be generated fast enough to follow the AC signal so C inv is C ox + C D. LF curve - inversion layer carriers can be created and recombine at AC signal frequency so C inv is just C ox. Deep depletion - DC voltage is applied fast enough that inversion layer carriers cannot follow it, so C D must expand to balance the charge on the gate. C-V measurements can be used to extract quantitative values for: t ox - oxide thickness N A - the substrate doping profile Q f, Q it, Q m, Q ot - oxide, interface charges VTH 4 Figure 4.3 Typical C V traces from temperature bias stress measurements of an oxide contaminated with a positive ion impurity.

22 Figure 4.5 High frequency C V traces showing the effects of interface states and fixed charge. Oxidation consumes (doped) Si Redistribution due to: - Segregation Coefficient (abrupt discontinuity at interface) -Diffusion (depends on relative diffusion rates & rate of interface movement) Segregation coefficient m= - i.e. diffusion only -- impurity depletion from Si at interface - Si approx. doubles in volume -- Dopant density approx halved in SiO - diffusion from Si --> SiO due to concentration gradient

23 Segregation coefficient m< Dopant ejected into SiO SiO SiO Si Si e.g. B mn /3 e.g. B in H ambient Segregation coefficient m> SiO ejects dopant back into Si SiO SiO D << D SiO Si, Dopant in SiO : does not move much Dopant in oxide can diffuse rapidly away Si e.g. P mn 0 Si e.g. Ga Oxide diffusion slow Oxide diffusion fast Oxidation effects on doping m 0 for P, As, Sb Figure 4.6 The effect of thermal oxidation on the impurity distribution in silicon and silicon dioxide. (A) Slow diffusion in oxide, m < (boron in neutral or oxidizing ambient); (B) fast diffusion in oxide, m < (boron in hydrogen ambient); (C) slow diffuser in oxide, m > (phosphorus, arsenic); (D) fast diffuser in oxide, m > (gallium) (after Grove et al.). Impurity segregation coefficient: m= (concentration in Si)/(concentration in SiO ) m> oxide rejects impurity/dopant; m> oxide takes up impurity/dopant 3

24 Figure 4.7 Temperature dependence of boron segregation coefficient for various types of oxidations (reprinted by permission, McGraw Hill, after Katz). SiO growth rates increased by doping of Si Figure 4.8 Silicon dioxide thickness versus wet oxidation time for three different surface concentrations of boron (after Deal et al., reprinted by permission, The Electrochemical Society). 4

25 Dopants affect rate constants Figure 4.9 Oxidation rate coefficients for dry oxygen at 900 C as functions of the surface concentration of phosphorus (after Ho et al., reprinted by permission, The Electrochemical Society). Oxynitride: NH 3 anneal SiO SiO x N y growth in NO Figure 4. Growth of oxynitride in nitric oxide. Reprinted by permission from Journal of Applied Physics. Copyright 003, American Institute of Physics. 5

26 Silicia glass: unstable at < 70ºC returns to crystalline, but very slowly < 000ºC Basic Unit: tetrahedron O links to next ( bridging O ) Can replace bridging O by: All O s bridging --> cryst SiO non bridging O (no link) (Campbell Fig 4.7) OH - ( H O + Si-O-Si = Si-OH ) makes porous Substitutional impurities: B 3+ /P 5+ replace Si + ( network formers) charge defects Si Interstitial impurities: Na +, K +, Pb +, Ba + (network modifiers) Na O + Si-O-Si = Si-O + Na makes structure more porous See Campbell Fig. 4.8 For Si to move break 4 Si-O bonds For O to move break Si-O bonds O moves more easily, Si relatively fixed (for ideal crystal) 6

27 Leakage Figure 4. Measured leakage current at V supply for different physical oxide thicknesses. SiO HfO Figure 4.3 Leakage current density as a function of equivalent oxide thickness (EOT) HfO and SiO. 7

28 C. D SiO Growth Kinetics a) Etched Si Ring Si Substrate These effects were investigated in detail experimentally by Kao et. al. about 5 years ago. Typical experimental results below. Side Views Top Views b) c) Polysilicon SiO Si d) (Kao et.al) 55 Year of Production Technology N ode (half pitch) 50 nm 80 nm 30 nm 90 nm 65 nm 45 nm 3 nm nm 8 nm MPU Printed Gate Leng th 00 nm 70 nm 53 nm 35 nm 5 nm 8 nm 3 nm 0 nm DRAM Bits/Chip (Sampling) 56M 5M G 4G 6G 3G 64G 8G 8G MPU Transistors/Chip (x0 6 ) ,000 Gate Oxid e T ox Equiv ale nt (nm) MPU Gate Oxid e T ox Equiv ale nt (nm) Low Operating Po we r Gate Dielectric Leakage ÞC) MPU Thickness Control (% 3 ) < ±4 < ±4 < ±4 < ±4 < ±4 < ±4 Min Supply Voltage (volts) Deposited Polysilicon Si substrate.3.3 Si substrate Oxidation involves a volume expansion (.X). Especially in D and 3D structures, stress effects play a dominant role. Volume Expansion SiO Original Si Surface Location of Si 3 N 4 Mask Si Substrate 56 8

29 . 4/0/0 Normalized Oxide Thickness ÞC 000 ÞC 900 ÞC 800 ÞC 00 ÞC 900 ÞC Convex Radii Concave Radii ÞC 000 ÞC µm 0. µm 0.5 µm Several physical mechanisms seem to be important: Crystal orientation D oxidant diffusion Stress due to volume expansion To model the stress effects, Kao et. al. suggested modifying the Deal Grove parameters. k S (stress) k S exp n V R exp tv T (0) kt kt V D D(stress ) D exp P kt C * (stress) C * exp P () kt /r µm - where n and t are the normal and (Kao et.al) tangential stresses at the interface. V R, V T and V S are reaction volumes and are fitting parameters. V S () 57 In addition, the flow properties of the SiO need to be described by a stress dependent viscosity (stress) (T) S V C /kt (3) sinh S V C /kt Where S is the shear stress in the oxide and V C is again a fitting parameter Parameter Value V R 0.05 nm 3 V D nm 3 V S, V T 0 V C 0.3 nm 850ÞC 0.7 nm 050ÞC (T) (T) Microns SiO Si 3 N 4 Silicon Microns These models have been implemented in modern process simulators and allow them to predict shapes and stress levels for VLSI structures (above right). ATHENA simulation: Left - no stress dependent parameters, Right - including stress dependence Microns 58 9

30 D. Point Defect Based Models The oxidation models we have considered to this point are macroscopic models (diffusion coefficients, chemical reactions etc.). O H O Diffusion I * * I V There is also an atomistic picture of oxidation that has emerged in recent years. Most of these ideas are driven by the volume expansion occurring during oxidation and the need for free volume. Oxide Silicon Surface oxidation can be thought of as Si Si O I V SiO I stress (4) 59 The connection between oxidation and other processes can then be modeled as shown below. O Surface Recombination G R 0 Si 3 N 4 SiO Inert Diffusion Bulk Recombination * I Microns 0.5 OED Inert Diffusion Buried Dopant Marker Layer OED Microns Example - ATHENA simulation of OED. Oxidation injects interstitials to create free volume for the oxidation process. Oxidation can also consume vacancies for the same reason. These processes increase I concentrations and decrease V concentrations in nearby silicon regions. Any process (diffusion etc) which occurs via I and V will be affected

31 . 4/0/0 E. Complete Process Simulation of Oxidation Many of these models (and others), have been implemented in programs like SUPREM. Microns Microns Microns Simulation of an advanced isolation structure (the SWAMI process originally developed by Hewlett-Packard), using SSUPREM IV. The structure prior to oxidation is on the top left. A 450 min H O oxidation at 000 C is then performed which results in the structure on the top right. An experimental structure fabricated with a similar process flow is shown on the bottom right. The stress levels in the growing SiO are shown at the end of the oxidation on the bottom left. 6 Normally used for GaAs - Low T, avoids dissociation due to As - No impurity redistribution - Not good for Si --> porous films Use to remove accurate amounts of Si - semiconductor analysis - anodize <---> dissolve Electrolyte must contain OH - ions H O: H O <---> H + + OH - - equilibrium constant K - K=[H + ][OH - ]=0-4 at 4º C - [H + ] = [OH - ] =0-7, ph=7 - Use acid/base ph modifiers: H PO 4 acid / NH 4 OH base / (NH 4 ) HPO 4 neutral Non-aqueous: ethylene/propylene glycol At Pt cathode: H + + e - ---> H At Si anode: Si + h + ---> Si + Holes from Si bulk continually supplied by battery --> positive surface charge -Si + + (OH - ) --> Si(OH) -Si(OH) --> SiO + H Overall: Si + + (OH - ) + H + --> SiO + H 3

32 Assume field in oxide approx. constant E OX - x 0 7 v/cm for Si Then V OX x OX E OX & x OX = 0 t idt = Q delivered where = formation rate = f d /I d = thickness / A.sec.unit area f d = dissolution rate in electrolyte V=0 I d = equivalent current to stop dissolution Formation: V a -V r = i (R s +R a ) + V OX = i (R S +R a + E OX 0 t i dt) Vr = rest potential of cell i.e. reverse emf of cell used by battery Growth Rate i Compare capacitor: dv c /dt i c, i c =I 0 e -t/, v c (t)=v(- e -t/ ) x = x (- exp - t / ) Final film thickness x when no net growth i.e. growth rate = dissolution rate, i=0 x = ( - I d /I 0 ) (V A -V r ) / E OX 0.3nm/volt for Si i.e. control final thickness with voltage Try solution: i = I 0 exp - t / Note: if I d =0, no dissolution --> x E OX =V A -V r So 0 t i dt = - I 0 [exp - t / -] if I d =I 0, no growth --> x = 0 & V A -V R = (I 0 exp - t/)(r S +R a ) + E OX (- exp - t / ] I 0 At t=0, I 0 =(V A -V r )/(R S +R a ) & at t-->, V A -V r = E OX I 0 = (V A -V r ) / I 0 E OX = (R S +R a ) / E OX W (gms Si consumed/c) = W e / qn -W e = electrochemical equivalent weight = gm molec wt / valence charge in reaction -qn =.6x0-9 x 6.03x0 3 C/mole Current efficiency = experimental W / theoretical W 95% for GaAs, -3% for Si Can oxidize with constant current --> dx/dt constant -for E OX const, V OX x and increases linearly - monitor V OX and stop at desired thickness Anodized SiO - porous, etches 5x faster than thermal oxide - trapped H O can be reduced by heating - interface charge states 0x thermal oxide (no good for MOS) 3

33 See later for plasmas High energy in plasma (electron temperature 0 4 K) But low temperature in Si minimal dopant redistribution SiO not as good as thermal Summary of Key Ideas Thermal oxidation has been a key element of silicon technology since its inception. Thermally, chemically, mechanically and electrically stable SiO layers on silicon distinguish silicon from other possible semiconductors. The basic growth kinetics of SiO on silicon are controlled by oxidant diffusion and Si/SiO interface chemical reaction. This simple Deal-Grove model has been extended to include D effects, high dopant concentrations, mixed ambients and thin oxides. Oxidation can also have long range effects on dopant diffusion (OED or ORD) which are modeled through point defect interactions. Process simulators today include all these physical effects (and more) and are quite powerful in predicting oxidation geometry and properties. Anodization is also possible

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