NTP85N03, NTB85N03. Power MOSFET 85 Amps, 28 Volts. N Channel TO 220 and D 2 PAK. 85 AMPERES, 28 VOLTS R DS(on) = 6.1 m (Typ)
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1 NTP85N, NTB85N Power OSET 85 Amps, 8 Volts NChannel TO and D PAK Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. eatures Pbree Packages are Available Typical Applications Power Supplies Converters Power otor Controls Bridge Circuits 85 APERES, 8 VOLTS R DS(on) =. m (Typ) NChannel D S AXIU RATINS ( unless otherwise noted) Rating Symbol Value Unit tosource Voltage V DSS 8 Vdc atetosource Voltage Continuous V S Vdc Current T C = 5 C Single Pulse (t p = s) Total Power T C = 5 C Derate above 5 C I D 85* I D 9 P D 8. Adc Apk W W/ C TOAB CASE A STYLE 5 D PAK CASE 8AA STYLE Operating and Storage Temperature Range T J, T stg 55 to +5 Single Pulse tosource Avalanche Energy Starting (V DD = 8 Vdc, V S = Vdc, L = 5. mh, I L(pk) = 7 A, R = 5 ) Thermal Resistance, JunctiontoCase JunctiontoAmbient (Note ) aximum Lead Temperature for Soldering Purposes, /8 in from case for seconds C E AS 7 mj R JC.55 R JA 7 C/W T L C aximum ratings are those values beyond which device damage can occur. aximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. *Chip current capability limited by package.. When surface mounted to an R board using in pad size, (Cu Area.7 in ). ate NTx85N AYWW ARKIN DIARAS & PIN ASSINENTS Source NTx85N x A Y WW ate NTx 85N AYWW = Device Code = B or P = Assembly Location = Year = Work Week = Pbree Package Source ORDERIN INORATION See detailed ordering and shipping information in the package dimensions section on page of this data sheet. Semiconductor Components Industries, LLC, 5 August, 5 Rev. Publication Order Number: NTP85N/D
2 NTP85N, NTB85N ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol in Typ ax Unit O CHARACTERISTICS tosource Breakdown Voltage (Note ) (V S = Vdc, I D = 5 Adc) Temperature Coefficient (Positive) Zero ate Voltage Current (V DS = 8 Vdc, V S = Vdc) (V DS = 8 Vdc, V S = Vdc, T J = 5 C) V (BR)DSS 8 atebody Leakage Current (V S = ± Vdc, V DS = Vdc) I SS ± nadc ON CHARACTERISTICS (Note ) ate Threshold Voltage (Note ) (V DS = V S, I D = 5 Adc) Threshold Temperature Coefficient (Negative) Static tosource OnResistance (Note ) (V S = Vdc, I D = Adc) (V S =.5 Vdc, I D = Adc) (V S = Vdc, I D = Adc) I DSS V S(th). R DS(on) orward Transconductance (Note ) (V DS = 5 Vdc, I D = Adc) g S mhos DYNAIC CHARACTERISTICS Input Capacitance C iss 5 p Output Capacitance (V DS = Vdc, V S = Vdc, f =. Hz) C oss 8 Transfer Capacitance C rss SWITCHIN CHARACTERISTICS (Note ) TurnOn Delay Time t d(on) ns Rise Time (V DD = 5 Vdc, I D = 5 Adc, t r TurnOff Delay Time V S = Vdc, R =. ) t d(off) all Time t f ate Charge Q T 9 nc (V DS = Vdc, I D = Adc, V S =.5 Vdc) (Note ) Q 8. Q 8 SOURCEDRAIN DIODE CHARACTERISTICS orward OnVoltage (I S =. Adc, V S = Vdc) (I S = Adc, V S = Vdc) (Note ) (I S =. Adc, V S = Vdc, T J = 5 C) V SD Vdc Reverse Recovery Time (I S =. Adc, V S = Vdc, di S /dt = A/ s) (Note ) Vdc mv/ C Adc Vdc mv/ C m t rr 9 ns t a t b 8 Reverse Recovery Stored Charge Q RR. C. Pulse Test: Pulse Width s, Duty Cycle %.. Switching characteristics are independent of operating junction temperatures. ORDERIN INORATION Device Package Shipping NTP85N TOAB 5 Units / Rail NTP85N TOAB 5 Units / Rail (Pbree) NTB85N D PAK 5 Units / Rail NTB85N D PAK 5 Units / Rail (Pbree) NTB85NT D PAK 8 Units / Tape & Reel NTB85NT D PAK (Pbree) 8 Units / Tape & Reel or information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D.
3 NTP85N, NTB85N I D, DRAIN CURRENT (APS) 5.8 V V S = V 8 V V 5 V.5 V V.8 V V. V. V. V I D, DRAIN CURRENT (APS) V DS V T J = C T J = 55 C V DS, DRAINTOSOURCE VOLTAE (VOLTS) 5 5 V S, ATETOSOURCE VOLTAE (VOLTS) igure. OnRegion Characteristics igure. Transfer Characteristics R DS(on), DRAINTOSOURCE RESISTANCE ( ) I D = A 8 V S, ATETOSOURCE VOLTAE (VOLTS) R DS(on), DRAINTOSOURCE RESISTANCE ( ).5..5 V S =.5 V V S = V 5 5 I D, DRAIN CURRENT (APS) R DS(on), DRAINTOSOURCE RESISTANCE (NORALIZED) igure. OnResistance versus atetosource Voltage I D = A V DS = V T J, JUNCTION TEPERATURE ( C) igure 5. OnResistance Variation with Temperature 5 I DSS, LEAKAE (na) igure. OnResistance versus Current and ate Voltage V S = V T J = 5 C T J = C 8 V DS, DRAINTOSOURCE VOLTAE (VOLTS) igure. tosource Leakage Current versus Voltage
4 NTP85N, NTB85N POWER OSET SWITCHIN Switching behavior is most easily modeled and predicted by recognizing that the power OSET is charge controlled. The lengths of various switching intervals ( t) are determined by how fast the ET input capacitance can be charged by current from the generator. The published capacitance data is difficult to use for calculating rise and fall because draingate capacitance varies greatly with applied voltage. Accordingly, gate charge data is used. In most cases, a satisfactory estimate of average input current (I (AV) ) can be made from a rudimentary analysis of the drive circuit so that t = Q/I (AV) During the rise and fall time interval when switching a resistive load, V S remains virtually constant at a level known as the plateau voltage, V SP. Therefore, rise and fall times may be approximated by the following: t r = Q x R /(V V SP ) t f = Q x R /V SP where V = the gate drive voltage, which varies from zero to V R = the gate drive resistance and Q and V SP are read from the gate charge curve. During the turnon and turnoff delay times, gate current is not constant. The simplest calculation uses appropriate values from the capacitance curves in a standard equation for voltage change in an RC network. The equations are: t d(on) = R C iss In [V /(V V SP )] t d(off) = R C iss In (V /V SP ) The capacitance (C iss ) is read from the capacitance curve at a voltage corresponding to the offstate condition when calculating t d(on) and is read at a voltage corresponding to the onstate when calculating t d(off). At high switching speeds, parasitic circuit elements complicate the analysis. The inductance of the OSET source lead, inside the package and in the circuit wiring which is common to both the drain and gate current paths, produces a voltage at the source which reduces the gate drive current. The voltage is determined by Ldi/dt, but since di/dt is a function of drain current, the mathematical solution is complex. The OSET output capacitance also complicates the mathematics. And finally, OSETs have finite internal gate resistance which effectively adds to the resistance of the driving source, but the internal resistance is difficult to measure and, consequently, is not specified. The resistive switching time variation versus gate resistance (igure 9) shows how typical switching performance is affected by the parasitic circuit elements. If the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. The circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. ost power electronic loads are inductive; the data in the figure is taken with a resistive load, which approximates an optimally snubbed inductive load. Power OSETs may be safely operated into an inductive load; however, snubbing reduces switching losses. C, CAPACITANCE (p) V S = C iss C oss C rss ATETOSOURCE OR DRAINTOSOURCE VOLTAE (VOLTS) igure 7. Capacitance Variation 5
5 NTP85N, NTB85N V S, ATETOSOURCE VOLTAE (V) 8 V DS Q gs Q T Q gd Q g, TOTAL ATE CHARE (nc) igure 8. atetosource and tosource Voltage versus Total Charge I S, SOURCE CURRENT (APS) 5 9 V S I D = 5 V S = V 8 V DS, DRAINTOSOURCE VOLTAE (V) t, TIE (ns) V SD, SOURCETODRAIN VOLTAE (VOLTS) igure. Diode orward Voltage versus Current V DD = V I D = A V S = V R, ATE RESISTANCE ( ) t d(off) t f igure 9. Resistive Switching Time Variation versus ate Resistance t r t d(on) SAE OPERATIN AREA The orward Biased Safe Operating Area curves define the maximum simultaneous draintosource voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (T C ) of 5 C. Peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in AN59, Transient Thermal Resistance eneral Data and Its Use. Switching between the offstate and the onstate may traverse any load line provided neither rated peak current (I D ) nor rated voltage (V DSS ) is exceeded and the transition time (t r,t f ) do not exceed s. In addition the total power averaged over a complete switching cycle must not exceed (T J(AX) T C )/(R JC ). A Power OSET designated EET can be safely used in switching circuits with unclamped inductive loads. or reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and adjusted for operating conditions differing from those specified. Although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. The energy rating decreases nonlinearly with an increase of peak current in avalanche and peak junction temperature. Although many EETs can withstand the stress of draintosource avalanche at currents up to rated pulsed current (I D ), the energy rating is specified at rated continuous current (I D ), in accordance with industry custom. The energy rating must be derated for temperature as shown in the accompanying graph (igure ). aximum energy at currents below rated continuous I D can safely be assumed to equal the values indicated. 5
6 NTP85N, NTB85N PACKAE DIENSIONS D PAK CASE 8AA ISSUE O T SEATIN PLANE B S K C E V W A W J NOTES:. DIENSIONIN AND TOLERANCIN PER ANSI Y.5, 98.. CONTROLLIN DIENSION: INCH. INCHES ILLIETERS DI IN AX IN AX A B C D E BSC.5 BSC J K S V VARIABLE CONIURATION ZONE D PL. (.5) T B U STYLE : PIN. ATE. DRAIN. SOURCE. DRAIN VIEW WW VIEW WW VIEW WW SOLDERIN OOTPRINT* SCALE : mm inches *or additional information on our Pbree strategy and soldering details, please download the ON Semiconductor Soldering and ounting Techniques Reference anual, SOLDERR/D.
7 NTP85N, NTB85N PACKAE DIENSIONS TO CASE A9 ISSUE AA H Q Z L V B N D A K T U S R J C T SEATIN PLANE NOTES:. DIENSIONIN AND TOLERANCIN PER ANSI Y.5, 98.. CONTROLLIN DIENSION: INCH.. DIENSION Z DEINES A ZONE WHERE ALL BODY AND LEAD IRREULARITIES ARE ALLOWED. INCHES ILLIETERS DI IN AX IN AX A B C D H J K L N Q...5. R S T U V.5.5 Z.8. STYLE 5: PIN. ATE. DRAIN. SOURCE. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERIN INORATION LITERATURE ULILLENT: Literature Distribution Center for ON Semiconductor P.O. Box, Phoenix, Arizona 858 USA Phone: or 88 Toll ree USA/Canada ax: or 887 Toll ree USA/Canada orderlit@onsemi.com N. American Technical Support: Toll ree USA/Canada Japan: ON Semiconductor, Japan Customer ocus Center 9 Kamimeguro, eguroku, Tokyo, Japan 55 Phone: ON Semiconductor Website: Order Literature: or additional information, please contact your local Sales Representative. NTP85N/D
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