SC1408. Low Voltage, Boost DC-DC Controller. POWER MANAGEMENT Description. Features. Applications. Typical Application Circuit

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1 Descriptin The S0 is a lw vltage bst cntrller that perates frm a. t.5 input range. The S0 was designed fr tw cell lkaline r single cell Lithium In battery applicatins. With the prper external cmpnents it can be used as a bst cnverter r a buck/bst cnverter. Shutdwn pin allws the user t turn the cntrller ff, reducing supply current t less than µ typical. utput vltage can be preset t 5 r is adjustable frm t.5 with a resistr divider. The cntrller changes frequency in light lad cnditins t imprve efficiency. S0 Lw ltage, Bst D-D ntrller Features. t.5 input range Preset (5) r adjustable utput Grund referenced current limit n chip precisin reference Up t 00kHz switching frequency 0µ max shutdwn current Industrial temperature range S- and MSP- packages. Lead free packages available are fully WEEE and RHS cmpliant pplicatins PD Pwer supplies Battery pwered applicatins Psitive LD Bias generatr Prtable cmmunicatins (cellular phnes) Peripheral card supplies Industrial pwer supplies Typical pplicatin ircuit in (. t.5) L D ut ( t.5) U BST GTE Q R 5 7 SHDN REF GND ISENSE FB GND R R S0 Revisin: Nvember, 005

2 S0 bslute Maximum Ratings Exceeding the specificatins belw may result in permanent damage t the device, r device malfunctin. peratin utside f the parameters specified in the Electrical haracteristics sectin is nt implied. Expsure t bslute Maximum rated cnditins fr extended perids f time may affect device reliability. Parameter Symbl Maximum Units Input Small ltage Signal Grund t Pwer Grund BST t GND -0. t G ND t GND 0. GTE t GND -0. t BST 0. r 5 FB, SHDN, REF, ISENSE t GND -0. t min. f BST 0. r 5 perating Temperature -0 t 5 Junctin Temperature Range T J -0 t 50 Strage Temperature Range T STG 5 t 0 - Lead Temperature (Sldering) 0 Sec. T L 00 Thermal Resistance, Junctin t mbient S- MSP- Thermal Resistance, Junctin t ase S- MSP- Electrical haracteristics Unless specified: UT = 5; I LD = 0m; = 5 θ J θ J /W /W Parameter Sym nditins Min Typ Max Units Input ltage I = N = -0 t Supply urrent UT =.5,SHD N < 0. = -0 t µ utput ltage UT Lad Line Regulatin Regulatin Minimum Start Up ltage UT = 0,. < S HDN< 5 = -0 t 5 0 IN IN IN =.0 t 5.0 = -0 t 5, =.0, U T =.7 t.0, U T = 5, I = 0m t 500m 0 m/ LD = 5, IL D = 500m 7 m/ N lad. Minimum Switch n Time t N(Max) Minimum Switch ff Time t FF(Min) Efficiency Reference ltage EF Reference Lad Regulatin Reference Line Regulatin.. IN =, U T R IR EF 9. µ s.. µ s = 5, I = 0m t 500m 7 % LD = 0µ -0 = t µ < I < 00µ - 0 m R EF 5 < UT < µ/ 005 Semtech rp.

3 S0 Electrical haracteristics (nt.) Unless specified: UT = 5; I LD = 0m; = 5 Parameter Sym nditins Min Typ Max Units FB Trip Pint ltage B F = 5 = -0 t FB Input urrent I M F = 5 = -0 t 5 - ±0 n SHDN Input SHDN Input High ltage Lw ltage IN UT IL UT =.7 t.5. =.7 t.5 0. SHDN Input urrent UT =.5, SHDN = 0 r 5 ± µ urrent Limit Trip Level S UT = t.5 = 5 = -0 t ISENSE Input urrent 0.0 ± µ GTE Rise Time UT = 5, InF frm GTE t GND 50 ns GTE Fall Time UT = 5, InF frm GTE t GND 50 GTE n Resistance GTE = high r lw 5 0 Ω NTE: () This device is ESD sensitive. Use f standard ESD handling precautins is required. m 005 Semtech rp.

4 S0 Pin nfiguratin Pin Descriptins Pin # GTE BST FB SHDN Pin Name TP IEW 7 5 (S-/MSP-) ISENSE GND GND REF rdering Infrmatin Part Number S0IS.TR () S 0ISTRT S0IMS.TR () S 0IMSTRT ) P ackage S- () M SP- ( emp Range ( T T ) -0 t 5 Ntes: () nly available in tape and reel packaging. reel cntains 500 devices. () Lead free prduct. This prduct is fully WEEE and RHS cmpliant. () ntact factry fr MSP availability Pin Functin G TE Gate drive utput. B ST Supply vltage. FB ltage feedback S HDN Lgic high shuts dwn the cnverter. 5 R EF Reference utput pin. GND Small signal analg and digital grund. 7 G ND Pwer grund. I SENSE urrent sense pin. Blck Diagram REF FB.0 REFERENE ERRR MP - MDE DETET - 50m DD BIS SHDN MIN FF TIME NE SHT Q TRIG.uS STRT UP MP - BST TRIG Q us S R Q.5 GTE MX N TIME NE SHT LW LTGE SILLTR GND URRENT SENSE MP - 0. ISENSE GND 005 Semtech rp.

5 S0 pplicatins Infrmatin Thery f peratin The S0 is a mdified hysteretic bst cnverter cntrller. The pwer switch is turned n when the utput vltage falls slightly belw it s setpint. It remains n fr apprximately µs, r until the inductr current reaches limit, whichever ccurs first. The pwer switch is then turned ff fr. µs, r until the utput vltage nce again falls belw setpint, whichever ccurs last. The S0 is nrmally pwered frm the utput vltage. Internal circuitry, such as the bandgap, cmparatrs and ne shts, will nt functin prperly until the BST pin vltage reaches.5. T ensure start-up at lw input vltages, the nrmal cntrl circuitry is disabled and a special, lw vltage start up scillatr generates an apprximate square wave at the GTE pin, initiating bst actin. When the utput vltage reaches.5, the nrmal cntrl circuitry is enabled and the start up scillatr shuts dwn. T cnserve pwer, a SHDN pin is prvided which, when pulled high, shuts dwn mst internal circuitry. The utput vltage will then be dide drp belw the input. MPNENT SELETIN Bst nverter RSENSE The value f the sense resistr is the primary determining factr fr maximum utput current. The S0 has a fixed current limit vltage threshld, which is develped by the peak inductr current flwing thrugh RSENSE. RSENSE may be determined either frm the maximum utput current curves r frm the equatin belw: I (MX ) t ff L Where : F FET = R S SENSE ( )( ) IN FET F FET = utput Dide Frward ltage Drp = ltage acrss FET, R F F IN FET F SENSE IN and Inductr DR In the equatin abve, the use f. s fr t ff may lead t slightly ptimistic current values fr lw / IN ratis. The theretical curves use the actual value f t ff, F =0.5, FET =0. and S =0.0 and are generated fr L=µH. utput ltage utput vltage can be set t 5 by cnnecting the FB pin t GND, r t any vltage in the.0 t.5 range using external divider resistrs. The bttm resistr in the divider chain (R in the typical applicatin circuits) shuld be 00kΩ r less and the tp resistr (R in the applicatin circuits) can be calculated frm R = R REF Inductr The S0 will wrk with a wide range f inductr values. gd chice fr mst applicatins is µh. Smaller inductr values result in higher peak currents and increase utput ripple, while larger values will result in slwer lp respnse. Transistr selectin Nrmally the pwer switch will be an N-channel MSFET, althugh in certain circumstances an NPN biplar may be substituted. The chice f FET can be critical, especially in battery pwered applicatins where the cnverter must be able t use all f the available energy in the battery. This requires that the cnverter be capable f starting up frm very lw input vltages. Fr example a tw cell alkaline system s terminal vltage will drp t. as it appraches full discharge. Fr these demanding applicatins, a FET with lw GS(th) is required. gd rule f thumb is that GS(th) shuld be at least 0.5 less than the minimum input vltage. Dide Fr mst applicatins, a Schttky dide shuld be used as the utput rectifier. It will be subjected t reverse vltages f at least, and average current will be smewhat less than the Inductr peak current. Industry standard N57 series r an equivalent surface munt part wuld be suitable. utput apacitrs utput capacitrs shuld be lw ESR t minimize ripple vltage and maximize efficiency. Lw ESR tantalum r SN capacitrs shuld be used. Ripple vltage will be apprximately: Input apacitrs Input capacitrs n a bst cnverter are less critical than the utput capacitrs, since there are n fast current pulses drawn frm the input supply. 00µF tantalum will be adequate fr mst applicatins. 005 Semtech rp. 5

6 S0 pplicatins Infrmatin (nt.) MPNENT SELETIN SEPI nverter RSENSE gain, with the SEPI tplgy, the value f the sense resistr is the primary determining factr fr maximum utput current. The simplest apprach t select RSENSE is t add in t and use this value as the utput vltage in the utput current curves r in the equatin fr Bst cnverter. utput ltage utput vltage setting wrks exactly the same in SEPI tplgy as in Bst, including the ability t set t 5 by cnnecting the FB pin t GND. are must be taken t ensure that the I supply (pin; BST) des nt exceed its.5 rating. In the circuit f Fig.: This requires maximum utput vltage t be limited t.5-in. Higher utput vltages are pssible with different I supply strategies. Inductr The SEPI tplgy requires a cupled inductr. gain gd chice fr mst applicatins is µh. Smaller inductr values result in higher peak currents and increase utput ripple, while larger values will result in slwer lp respnse. Transistr selectin The chice f FET can be critical, especially in battery pwered applicatins where the cnverter must be able t use all f the available energy in the battery. This requires that the cnverter be capable f starting up frm very lw input vltages. Fr example a tw cell alkaline system s terminal vltage will drp t. as it appraches full discharge. Fr these demanding applicatins, a FET with lw GS(th) is required. gd rule f thumb is that GS(th) shuld be at least 0.5 less than the minimum input vltage. Dide Fr mst applicatins, a Schttky dide shuld be used as the utput rectifier. It will be subjected t reverse vltages f at least IN and average current will be smewhat less than the Inductr peak current. Industry standard N57 series r an equivalent surface munt part wuld be suitable. utput apacitrs utput capacitrs shuld be lw ESR t minimize ripple vltage and maximize efficiency. Lw ESR tantalums, SNs r the newer Plymer capacitrs shuld be used. Input apacitrs Input capacitrs n a SEPI cnverter are less critical than the utput capacitrs, since there are n fast current pulses drawn frm the input supply. 00µF tantalum will be adequate fr mst applicatins. Series apacitrs The Series capacitr(s) must be capable f handling an RMS current given by:- I RMS = I 0.5 IN 005 Semtech rp.

7 S0 Typical haracteristics I () Figs.5 - : Maximum utput current vs. input vltage and sense resistr value. (Bst Mde).5 =..0 L=uH mhm 5mhm 5mhm I ().5 =5.0 L=uH mhm 5mhm 5mhm.0 50mhm.0 50mhm I () mhm in () = L=uH 0mhm 5mhm 5mhm 50mhm 00mhm in () I () mhm in () =5 L=uH 0mhm 5mhm 5mhm 50mhm 00mhm in () Figs.9-:Efficiency in the Bst pplicatin circuit f Fig. 00% =5 00% = 90% 90% Efficiency (%) 0% 70% in=5.0 in=.0 in=. in=.0 Efficiency (%) 0% 70% in=5.0 in=.0 in=. 0% I (m) 0% I (m) 00% =5 90% Efficiency (%) 0% 70% in= in=9.0 in=5.0 in=.0 in=. 0% I (m) 005 Semtech rp. 7

S0 Typical haracteristics utput Ripple ltage; in=, =5, I=70m h = utput Ripple h = ltage at GTE pin utput Ripple ltage; in=, =5, I=0m h = utput Ripple h = ltage at GTE pin Lad

8 S0 Typical haracteristics utput Ripple ltage; in=, =5, I=70m h = utput Ripple h = ltage at GTE pin utput Ripple ltage; in=, =5, I=0m h = utput Ripple h = ltage at GTE pin Lad Transient; in=, =5, I=0 t 500m h = utput ltage h = Lad urrent (0.5/div) Lad Transient; in=, =5, I=0 t 500m h = utput ltage h = Lad urrent (0.5/div) 005 Semtech rp.

9 S0 Typical pplicatin ircuit (nt.) Fig.: Typical pplicatin - Bst nfiguratin.-.5 IN L uh D in t.5 UT ilcraft DP- B0T 5 0.uF 5 7 U BST GTE EN ISENSE REF FB GND GND S0S R See Table Q IRLR0N R 0.hm R 0.0k 9 See Text Fig.: Typical pplicatin - Buck/Bst (SEPI) nfiguratin D N. T 5 IN L uh D B0T 0 T (.5-in) UT 0.uF 5 0.uF 5 7 U BST GTE EN ISENSE REF FB GND GND S0S Q IRLL0 R 0.hm R See Table LB uh R 0.0k 9 See Text L/LB IS UPLED INDUTR PULSE PE-57 R EQUILENT 005 Semtech rp. 9

10 S0 Typical pplicatin ircuit (nt.) Fig.: chieving utput vltages greater than.5 D R 70. IN N L uh D 5 UT B0T D 0.uF 5 0.uF 5 7 U BST GTE EN ISENSE REF FB GND GND S0S R 00k Q IRL0S R 0.05hm R 0.0k Fig.: Implementing shutdwn with input/utput islatin. IN Q Si0DS L uh D UT SHRT = RUN PEN = SHUTDWN R5 5.k J 0.uF 5 0.uF 5 7 U BST GTE EN ISENSE REF FB GND GND S0S B0T R 90k Q IRLL0 R 0.05hm R 0.0k 005 Semtech rp. 0

11 S0 utline Drawing - S- X E/ ccc X N/ TIPS aaa SETING PLNE N D e D E E e/ B bxn bbb -B D DIMENSINS DIM INHES MILLIMETERS MIN NM MX MIN NM MX b c D E E. BS.00 BS e.050 BS.7 BS h L L (.0) (.0) N aaa bbb ccc GGE PLNE H h h c SIDE IEW SEE DETIL 0.5 L (L) DETIL 0 NTES:. NTRLLING DIMENSINS RE IN MILLIMETERS (NGLES IN DEGREES).. DTUMS -- ND -B- T BE DETERMINED T DTUM PLNE -H-. DIMENSINS "E" ND "D" D NT INLUDE MLD FLSH, PRTRUSINS R GTE BURRS.. REFERENE JEDE STD MS-0, RITIN. Minimum Land Pattern - S- X DIMENSINS DIM INHES MILLIMETERS (.05) (5.0) () G Z G..00 P X Y Y.07.0 Z P NTES:. THIS LND PTTERN IS FR REFERENE PURPSES NLY. NSULT YUR MNUFTURING GRUP T ENSURE YUR MPNY'S MNUFTURING GUIDELINES RE MET.. REFERENE IP-SM-7, RLP N Semtech rp.

12 S0 utline Drawing - MSP- X E/ PIN INDITR ccc X N/ TIPS N e/ E e B D E DIMENSINS INHES MILLIMETERS DIM MIN NM MX MIN NM MX b c D E E.9 BS.90 BS e.0 BS 0.5 BS L L.0.0 (.07) (.95) 0.0 N aaa bbb ccc aaa D H SETING PLNE bxn bbb -B D GGE PLNE 0.5 L (L) c 0 DETIL SIDE IEW SEE DETIL Land Pattern - MSP- NTES:. NTRLLING DIMENSINS RE IN MILLIMETERS (NGLES IN DEGREES).. DTUMS -- ND -B- T BE DETERMINED T DTUM PLNE -H-. DIMENSINS "E" ND "D" D NT INLUDE MLD FLSH, PRTRUSINS R GTE BURRS.. REFERENE JEDE STD M-7, RITIN. X () G Y Z DIM G P X Y Z DIMENSINS INHES MILLIMETERS (.).09 (.0) P NTES:. THIS LND PTTERN IS FR REFERENE PURPSES NLY. NSULT YUR MNUFTURING GRUP T ENSURE YUR MPNY'S MNUFTURING GUIDELINES RE MET. ntact Infrmatin Semtech rpratin Pwer Management Prducts Divisin 00 Flynn Rad, amarill, 90 Phne: (05)9- FX (05) Semtech rp.

SFDMB3638F. Specifications and Applications Information. orce LED Driver. Mass: 7 grams typ. 10/15/08 Preliminary. Package Configuration

SFDMB3638F. Specifications and Applications Information. orce LED Driver. Mass: 7 grams typ. 10/15/08 Preliminary. Package Configuration Specificatins and Applicatins Infrmatin 1/1/8 Prelimary Smart Fr rce LED Driver The ERG Smart Frce Series f LED Drivers are specifically designed fr applicatins which require high efficiency, small ftprt