TOSHIBA Bi-CMOS Processor IC Silicon Monolithic TB62201AF. Dual-Stepping Motor Driver IC for OA Equipment Using PWM Chopper Type

Transcription

1 TOSIBA Bi-CMOS Processor IC Silicon Monolithic TB62201AF Dual-Stepping Motor Driver IC for OA Equipment Using PWM Chopper Type The TB62201AF is a dual-stepping motor driver driven by chopper micro-step pseudo sine wave. To drive two-phase stepping motors, Two pairs of 16-bit latch and shift registers are built in the IC. The IC is optimal for driving stepping motors at high efficiency and with low-torque ripple. The IC supports Mixed Decay mode for switching the attenuation ratio at chopping. The switching time for the attenuation ratio can be switched in four stages according to the load. Features Two stepping motors driven by micro-step pseudo sine wave Weight: 0.79 g (typ.) are controlled by a single driver IC Monolithic Bi-CMOS IC ow ON-resistance of Ron = 0.5 Ω (T j = A: typ.) ESD protection Exceeds 200, MI-STD-883D Two pairs of built-in 16-bit shift and latch registers Two pairs of built-in 4-bit DA converters for micro steps Built-in ISD, TSD, &V M power monitor (reset) circuit for protection Built-in charge pump circuit (two external capacitors) 36-pin power flat package (SOP36-P ) Output voltage: 4 max Output current: 1.5 A/phase max Built-in Mixed Decay mode enables specification of four-stage attenuation ratio. (The attenuation ratio table can be overwritten externally.) Chopping frequency can be set by external resistors and capacitors. igh-speed chopping possible at 100 kz or higher. Note: When using the IC, pay attention to thermal conditions. These devices are easy damage by high static voltage. In regards to this, please handle with care. 1

2 Block Diagram 1. Overview (Power lines: A/B unit (C/D unit is the same as A/B unit)) RESET Mixed decay timing, table logic circuit 16-bit shift register 16-bit latch Mixed decay timing table selector SETUP DATA CK STROBE DATA input selector Current control data logic circuit 16-bit shift register 16-bit latch Chopping reference circuit Chopping waveform generator circuit CR V ref Current Setting Torque control 4-bit D/A (angle control) Waveform shaping circuit Current feedback circuit R S V RS circuit 1 R S COMP circuit 1 Output control circuit V M V RS circuit 2 R S COMP circuit 2 Ccp1 Ccp2 Charge pump circuit Output circuit (-bridge) V M ISD circuit R /V MR circuit Protected circuit TSD circuit Out X igh-voltage Wiring (V M ) ogic data Analog data Stepping motor IC Terminal 2

3 2. ogic Unit A/B (C/D unit is the same as A/B unit) Function TB62201AF This circuit is used to input from the DATA pins micro-step current setting data and to transfer them to the subsequent stage. By switching the SETUP pin, the data in the mixed decay timing table can be overwritten. Mixed decay timing table logic circuit Initial setup circuit Mixed decay timing table 1 Mixed decay timing table 2 Mixed decay timing table 3 Mixed decay timing table 4 Mixed decay timing table selector 16-bit latch Mixed decay timing Output control circuit 16-bit shift register SETUP DATA CK Micro-step current setting data logic circuit 16-bit shift register STROBE 16-bit latch A unit side Data input selector RESET Torque 2 bits Decay 2 bits B unit side Current 4 bits B unit side Phase 1 bit B unit side Current feedback circuit D/A circuit Output control circuit Note: The RESET and SETUP pins are pulled down in the IC by 10 kω resistor. When not using these pins, connect them to GND. Otherwise, malfunction may occur. 3

4 3. Current Feedback Circuit and Current Setting Circuit (A/B unit (C/D unit is the same as A/B unit)) Function TB62201AF The current setting circuit is used to set the reference voltage of the output current using the micro-step current setting data input from the DATA pins. The current feedback circuit is used to output to the output control circuit the relation between the set current value and output current. This is done by comparing the reference voltage output to the current setting circuit with the potential difference generated when current flows through the current sense resistor connected between RS and V M. The chopping waveform generator circuit to which CR is connected is used to generate clock used as reference for the chopping frequency. TORQUE 0, 1 ogic unit CURRENT 0 to 3 V ref 100% 85% 70% 50% TORQUE control circuit Current setting circuit Micro-step current setting selector circuit 4-bit D/A circuit ng wavefor m generat or circuit Waveform shaping circuit Chopping reference circuit Output stop signal (A OFF) CR Mixed decay timing circuit Use in Charge mode R S V RS circuit 1 (detects potential difference between R S and V M ) R S COMP circuit 1 (Note 1) NF (set current reached signal) Output control circuit V M V RS circuit 2 (detects potential difference between V M and R S ) R S COMP circuit 2 (Note 2) RNF (set current monitor signal) Use in Fast mode Current feedback circuit Note 1: RS COMP 1: Compares the set current with the output current and outputs a signal when the output current reaches the set current. Note 2: RS COMP 2: Compares the set current with the output current at the end of Fast mode during chopping. Outputs a signal when the set current is below the output current. 4

5 4. Output Control Circuit, Current Feedback Circuit and Current Setting Circuit (A/B unit (C/D unit is the same as A/B unit)) TB62201AF Micro-step current setting data logic circuit Chopping reference circuit Current feedback circuit Current setting circuit Output control circuit NF set current reached signal RNF set current monitor signal Output stop signal Output control circuit Phase Mixed decay timing charge start U 1 U Decay mode CR counter CR counter Mixed decay timing circuit Output circuit Output reset signal V M RESET Output pin ISD (current shutdown) circuit Charge pump halt signal Power supply for upper output MOS transistors V Output circuit V M V MR circuit Reset signal selector circuit Charge pump circuit Ccp A R circuit Ccp B Thermal shut down (TSD) circuit Protection circuit Charge pump circuit Ccp C Micro-step current setup latch clear signal ogic Mixed decay timing table clear signal R : power on Reset V MR : V M power on Reset ISD: Current shutdown circuit TSD: Thermal shutdown circuit Note: The RESET pins is pulled down in the IC by 10-kΩ resistor. When not using the pin, connect it to GND. Otherwise, malfunction may occur. 5

6 5. Output Equivalent Circuit (A/B unit (C/D unit is the same as A/B unit)) Output driver circuit R S A R RS A To V M U 1 U 2 U 1 U 2 From output control circuit 1 2 Power supply for upper output MOS transistors (V ) 1 2 Output A Output A Phase A V M B Output driver circuit R S B R RS B U 1 U 2 U 1 U 2 From output control circuit 1 2 Power supply for upper output MOS transistors (V ) 1 2 Output B Output B M Phase B PGND 6

7 6. Input Equivalent Circuit (1) ogic input circuit (CK, DATA, STROBE) 27 IN 30/29/31 25/26/24 GND F IN 150 Ω To logic IC (2) Input circuit (SETUP, RESET ) 27 IN 6/28 GND 10 kω 150 Ω To logic IC F IN (3) Vref input circuit 27 IN 9/10 4 To D/A circuit GND F IN Note: The SETUP and RESET pins are pulled down. Do not use them open. When not using these pins, connect them to GND. 7

8 Pin Assignment (Top view) V M B 1 36 V M A OUT B 2 35 OUT A R S B 3 34 R S A PGND 4 33 PGND OUT B 5 32 OUT A SETUP 6 31 STROBE AB Ccp A 7 30 CK AB CR 8 29 DATA AB V REF AB 9 28 RESET V SS (F IN ) TB62201AF V SS (F IN ) V REF CD NC DATA CD Ccp B CK CD Ccp C STROBE CD OUT D OUT C PGND PGND R S D R S C OUT D OUT C V MD V MC Note: [Important] If this IC is inserted reverse, voltages exceeding the voltages of standard may be applied to some pins, causing damage. Please confirm the pin assignment before mounting and using the IC. 8

9 Pin Description Pin No. Pin Symbol Description 1 V M B Voltage major for output B block 2 OUT B Output B pin 3 R S B Channel B current pin 4 PGND Power GND pin 5 OUT B Output B pin 6 SETUP CR setup switching pin (: normal, : setup) 7 C cp A Capacitor pin for charge pump (Ccp1) 8 CR External C/R (osc) pin (sets chopping frequency) 9 V REF AB V ref input pin AB F IN V SS F IN (V SS ): ogic GND pin 1 REF CD Vref input pin CD 11 NC Non conection 12 C cp B Capacitor pin for charge pump (Ccp2) 13 C cp C Capacitor pin for charge pump (Ccp2) 14 OUT D Output D pin 15 PGND Power GND pin 16 R S D Channel D current pin 17 OUT D Output D pin 18 V M D Voltage major for output D block 19 V M C Voltage major for output C block 20 OUT C Output C pin 21 R S C Channel C current pin 22 PGND Power GND pin 23 OUT C Output C pin 24 STROBE CD CD STROBE (latch) signal input pin ( : ATC) 25 CK CD CD clock input pin 26 DATA CD CD serial data signal input pin 27 Power pin for logic block F IN V SS F IN (V SS ) : ogic GND pin 28 RESET Output reset signal input pin (: RESET) 29 DATA AB AB serial data signal input pin 30 CK AB AB clock input pin 31 STROBE AB AB STROBE (latch) signal input pin ( : ATC) 32 OUT A Output A pin 33 PGND Power GND pin 34 R S A Channel A current pin 35 OUT A Output A pin 36 V M A Voltage major for output A block Note: ow to handle GND pins All power GND pins and FIN (V SS : signal GND) pins must be grounded. Since FIN also functions as a heat sink, take the heat dissipation into consideration when designing the board. 9

10 Signal Functions 1. Serial Input Signals (for A/B. C/D is the same as A/B) Data No. Name Functions 0 SB TORQUE 0 1 TORQUE 1 2 DECAY MODE B 0 3 DECAY MODE B 1 DATA No.0, 1 = : 100%, : 85% : 70%, : 50% 00: DECAY MODE 0, 01: DECAY MODE 1 10: DECAY MODE 2, 11: DECAY MODE 3 4 Current B 0 5 Current B 1 6 Current B 2 7 Current B 3 Used for setting current. ( = Output A OFF MODE) 4-bit current B data (Steps can be divided into 16 by 4-bit data) 8 PASE B Phase information (: OUT A:, OUT A: ) (Note 1) 9 DECAY MODE A 0 10 DECAY MODE A 1 00: DECAY MODE 0, 01: DECAY MODE 1 10: DECAY MODE 2, 11: DECAY MODE 3 11 Current A 0 12 Current A 1 13 Current A 2 14 Current A 3 Used for setting current. ( = Output A OFF MODE) 4-bit current A data (Steps can be divided into 16 by 4-bit data) 15 MSB PASE A Phase information (: OUT A:, OUT A : ) Note 1: Serial data input order Serial data are input in the order SB (DATA 0) MSB (DATA 15) Role of Data Data Name Number of Bits Functions TORQUE 2 DECAY MODE 2 2 phases CURRENT 4 2 phases PASE 1 2 phases Roughly regulates the current (four stages). Common to A and B units. Selects Decay mode. A and B units are set separately. Sets a 4 bit micro step electrical angle. A and B units are set separately. Determines polarity (+ or ). A and B units are set separately. 10

11 2. Serial Input Signal Functions Input CK STROBE DATA RESET VDDR (Note 2) or V MR Operation of TSD/ISD (Note 2) Action No change in shift register. level is input to shift register. level is input to shift register. Shift register data are latched. Qn Output off, charge pump halted (S/R DATA CR) Output off (S/R DATA CR) Charge pump halted Mixed decay timing table cleared (only R ) Output off (S/R DATA OD) Charge pump halted Restored when RESET goes from ow to igh : Don t Care Qn: atched output level when STROBE is. Note 1: R and V MR when the operable range (3 V typical) or higher and when lower. When one of R or V MR is operating, the system resets (OR relationship). Note 2: igh when TSD is in operation. When one of TSD or ISD is operating, the system resets (OR relationship). Note: Function of overcurrent protection circuit Until the RESET signal is input after ISD is triggered, the overcurrent protection circuit remains in operation. During ISD, the charge pump stays halted. When TSD and ISD are operating, the charge pump halts. 3. PASE Functions Input Function Positive polarity (A:, Α : ) Negative polarity (A:, Α : ) 11

12 4. DECAY Mode X0, X1 Functions DECAY MODE X1 DECAY MODE X0 Function Decay mode 0 (Initial value: SOW DECAY MODE) Decay mode 1 (Initial value: MIXED DECAY MODE: 37.5%) Decay mode 2 (Initial value: MIXED DECAY MODE: 75%) Decay mode 3 (Initial value: FAST DECAY MODE) 5. TORQUE Functions TORQUE 0 TORQUE 1 Comparator Reference Voltage Ratio 100% 85% 70% 50% 6. Current AX (BX) Functions Step Set Angle A 3 A 2 A 1 A 0 B 3 B 2 B 1 B By inputting the above current data (A: 4-bit, B: 4-bit), 17-microstep drive is possible. For 1 step fixed to 90 degrees, see the section on output current vector line (83 page). 12

13 7. SETUP Functions Input Function Decay timing data input mode Normal operating mode Note: The SETUP pin is pulled down in the IC by 10-kΩ resistor. 8. Serial Data Input Setting (Normal operation) SETUP pin: DATA CK STROBE Note: Data input to the DATA pin are 16-bit serial data. Data are transferred from DATA 0 (Torque 0) to DATA 15 (Phase A). Data are input and transferred at the following timings. At CK falling edge: data input At CK rising edge: data transfer After data are transferred, all data are latched on the rising edge of the STROBE signal. As long as STROBE is not rising, the signal can be either ow or igh during data transfer. 9. Serial Data Input Setting (Decay timing setup) SETUP pin: DATA CK STROBE Note: Data input to the DATA pin are 16-bit serial data. Data are transferred from DATA 0 (Current Mode 1) to DATA 15 (DECAY MODE X-4). Data are input and transferred at the following timings. At CK falling edge: data input At CK rising edge: data transfer After data are transferred, all data are latched on the rising edge of the STROBE signal. As long as STROBE is not rising, the signal can be either ow or igh during data transfer. 13

14 10. Conditions on Overwriting MIXED DECAY TIMING Table If the following conditions are satisfied, the table can be overwritten. When RESET = (when RESET =, the shift register is cleared, thus data cannot be input) When an internal reset is not triggered. 1) When the temperature is such that TSD is not triggered (or not reset by TSD). 2) Under a condition where ISD is not triggered (or not reset by ISD). 3) Both and V M are within the operating voltage. TB62201AF Note 1: While the output transistors are operating, do not rewrite the values in the mixed decay timing table. Note 2: The SETUP pins is pulled down in the IC by 10-kΩ resistor When not using the pin, connect it to GND. Otherwise, malfunction may occur. 11. Data Input Signal at Setting Mixed Decay Timing Table Data No. Name Function Initial Value 15 MSB Current Mode 3 Selects Slow or Mixed Decay mode 1 : MIXED DECAY MODE 14 DECAY MODE 3-2 Sets decay 3 ratio (decay 3 raito) 1 13 DECAY MODE DECAY MODE : 100% : FAST DECAY MODE 11 Current Mode 2 Selects Slow or Mixed Decay mode 1 : MIXED DECAY MODE 10 DECAY MODE 2-2 Sets decay 2 ratio 1 9 DECAY MODE DECAY MODE : 75% MIXED DECAY 7 Current Mode 1 Selects Slow or Mixed Decay mode 1 : MIXED DECAY MODE 6 DECAY MODE 1-2 Sets decay 1 ratio 0 5 DECAY MODE DECAY MODE : 37.5% MIXED DECAY 3 Current Mode 0 Selects Slow or Mixed Decay mode 0 : SOW DECAY MODE 2 DECAY MODE 0-2 Sets decay 0 ratio 0 1 DECAY MODE SB DECAY MODE (SOW DECAY MODE) Note 1: Input order of serial data When setting decay timing, first input to the SETUP pin, the same as for ordinary data, then input data from SB (DATA 0) to MSB (DATA 15). When power is first turned on, the initial values in the table above are set as defaults. Once latched, data are not cleared except by VDDR (power-on and power-off reset). Next, after the mode changes to SETUP, the data are retained until mixed decay timing data are input and latched. 14

15 12. Function of Setting Mixed Decay Timing CURRENT MODE X DECAY MODE X-2 DECAY MODE X-1 DECAY MODE X-0 MIXED DECAY TIMING Don t care Don t care Don t care 0% (SOW DECAY MODE) 12.5% 25.0% 37.5% 50.0% 62.5% 75.0% 87.5% 100% (FAST DECAY MODE) Mixed decay timing means the time for switching Slow mode to Fast mode in MIXED DECAY MODE. In Mixed Decay mode, the Fast mode time at the end of chopping Cycle (T chop ) is fixed by data. The IC is switched from Slow to Fast mode according to the percentage representing mode time in the table above. (For example, 12.5% means that 12.5% of the time is in Fast mode and the rest of the time, 87.5%, in Charge and Slow modes.) Only when the value is maximum (100%), the mode is Fast Decay mode. 15

16 Maximum Ratings (Ta = 25 C) Characteristics Symbol Rating Unit ogic supply voltage 7 V Output voltage V M 4 Output current I OUT 1.5 A/phase (Note 1) Current detect pin voltage V RS V M ± 4. Charge pump pin maximum voltage (CCP1 pin) V V M + 7. ogic input voltage V IN to V Power dissipation P D 1.4 W (Note 2) 3.2 W (Note 3) Operating temperature T opr 40 to 85 C Storage temperature T stg 50 to 150 C Junction temperature T j 150 C Note 1: Perform thermal calculations for the maximum current value under normal conditions. Use the IC at 1.2 A or less per phase. Note 2: Input 7 V or less as V IN. Note 3: Measured for the IC only. (Ta = 25 C) Note 4: Measured when mounted on the board. (Ta = 25 C) Ta: IC ambient temperature T opr : IC ambient temperature when starting operation T j : IC chip temperature during operation T j (max) is controlled by TSD (thermal shut down circuit) Recommended Operating Conditions (Ta = 0 to 85 C) Characteristics Symbol Test Condition Min Typ. Max Unit Power supply voltage Output voltage V M = V Output current I OUT (1) I OUT (2) Ta = 25 C, per phase (when one motor is driven) Ta = 25 C, per phase (when two motors are driven) A A ogic input voltage V IN GND V Clock frequency f CK = Mz Chopping frequency f chop = kz Reference voltage V ref V M = 24 V, T orque = 100% DD V Current detect pin voltage V RS = 5. 0 ±1.0 ±1. Note: Use the Maximum Junction Temperature (T j ) at 120 C or less 16

17 Electrical Characteristics 1 (unless otherwise specified, Ta = 25 C, =, V M = 24 V) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Input voltage Input current 1 Input current 2 Power dissipation ( pin) Power dissipation (V M pin) V igh V IN () 2. DD DD CK, RESET, STROBE, DATA pins GND ow V IN () GND I IN1 () CK, STROBE, DATA pins 1.0 I IN1 () I IN2 () RESET, SETUP pins 700 I IN2 () 700 I DD1 I DD2 I M1 I M2 2 3 I M3 4 = (STROBE, RESET, DATA = ), RESET =, ogic, output all off Output OPEN, f CK = 6.25 Mz OGIC ACTIVE, =, Charge Pump = charged Output OPEN (STROBE, RESET, DATA = ), RESET =, ogic, output all off Charge Pump = no operation Output OPEN, f CK = 6.25 Mz OGIC ACTIVE, =, V M = 24 V, Output off Charge Pump = charged Output OPEN, f CK = 6.25 Mz OGIC ACTIVE, 100 kz chopping (emulation), Output OPEN, Charge Pump = charged Ccp1 = 0.22 µf, Ccp2 = 0.01µf V µa µa ma ma Output standby current Upper I O V RS = V M = 24 V, V out =, RESET =, DATA = A 400 Output bias current Upper I OB 5 V RS = V M = 24 V, V out = 24 V, RESET =, DATA = A 200 µa Output leakage current ower I O V RS = V M = CcpA = V out =24 V, RESET = 1.0 igh (reference) V RS () V ref = 3., V ref (Gain) = 1/5.0 TORQUE = (.) = 100% set 100 Comparator reference voltage ratio Mid high Mid low ow V RS (M) V RS (M) V RS () Output current differential I out1 7 6 V ref = 3., V ref (Gain) = 1/5.0 TORQUE = (.) = 85% set V ref = 3., V ref (Gain) = 1/5.0 TORQUE = (.) = 70% set V ref = 3., V ref (Gain) = 1/5.0 TORQUE = (.) = 50% set Differences between output current channels I out = 1000 ma % 5 5 % Output current setting differential I out2 7 I out = 1000 ma 5 5 % RS pin current IRS 8 VRS = 24 V, V M = 24 V, RESET = (RESET status) 10 µa 17

18 Characteristics Output transistor drain-source on-resistance Symbol R ON (D-S) 1 Test Circuit Test Condition Min Typ. Max Unit I out = 1.0 A, = 5. T j = 25 C, Drain-Source I R out = 1.0 A, = 5. ON (D-S) 1 T j = 25 C, Source-Drain 9 I R out = 1.0 A, =, ON (D-S) 2 T j = 105 C, Drain-Source R ON (D-S) 2 I out = 1.0 A, =, T j = 105 C, Source-Drain Ω Electrical Characteristics 2 (unless otherwise specified, Ta = 25 C, =, V M = 24 V) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit V ref input voltage V ref 10 V ref input current I ref 10 V ref attenuation ratio V ref (GAIN) 6 V M = 24 V, =, RESET =, Output on RESET =, Output off V M = 24 V, =, V ref = 3. V M = 24 V, =, RESET =, Output on, V ref = 2.0 to V A 1/4.8 1/ 5.0 1/5.2 TSD temperature T j TSD (Note 1) 11 =, V M = 24 V C TSD return temperature difference T j TSD 11 T j TSD = 130 to 170 C T j TSD 35 C return voltage R 12 V M return voltage V MR 13 Over current protected circuit operation current I SD (Note 2) 14 V M = 24 V, RESET =, STROBE = =, RESET =, STROBE = =, V M = 24 V, fchop = 100 kz set A Note 1: Thermal shut down (TSD) circuit When the IC junction temperature reaches the specified value and the TSD circuit is activated, the internal reset circuit is activated switching the outputs of both motors to off. When the temperature is set between 130 (min) to 170 C (max), the TSD circuit operates. When the TSD circuit is activated, the function data latched at that time are cleared. Output is halted until the reset is released. While the TSD circuit is in operation, the charge pump is halted. Even if the TSD circuit is activated and RESET goes instantaneously, the IC is not reset until the IC junction temperature drops 35 C (typ.) below the TSD operating temperature (hysteresis function). Note 2: Overcurrent protection circuit When current exceeding the specified value flows to the output, the internal reset circuit is activated switching the outputs of both shafts to off. When the ISD circuit is activated, the function data latched at that time are cleared. Until the RESET signal is input, the overcurrent protection circuit remains activated. During ISD, the charge pump halts. For failsafe operation, be sure to add a fuse to the power supply. 18

19 Electrical Characteristics 3 (Ta = 25 C, =, V M = 24 V, I out = 1.0 A) Characteristics Symbol Test Circuit Chopper current Vector 15 Test Condition Min Typ. Max Unit θa = 90 (θ16) 100 θa = 84 (θ15) 100 θa = 79 (θ14) θa = 73 (θ13) θa = 68 (θ12) θa = 62 (θ11) θa = 56 (θ10) θa = 51 (θ9) θa = 45 (θ8) θa = 40 (θ7) θa = 34 (θ6) θa = 28 (θ5) θa = 23 (θ4) θa = 17 (θ3) θa = 11 (θ2) θa = 6 (θ1) θa = 0 (θ0) 0 % 19

20 AC Characteristics (Ta = 25 C, V M = 24 V, =, 6.8 m/5.7 Ω) Characteristics Symbol Test Circuit Test Condition Min Typ. Max Unit Clock frequency f CK Mz Minimum clock pulse width Minimum STROBE pulse width Data setup time Data hold time Output transistor switching characteristic t w (CK) 40 t wp (CK) t wn (CK) 20 t STROBE 40 t STROBE () t STROBE () 20 t susin-ck t sust-ck 20 t sin-ck t hck-st 20 t r Output oad; 6.8 m/5.7 Ω 0.1 t f 0.1 t p (ST) STROBE ( ) to VOUT t Output oad; 6.8 m/5.7 Ω p (ST) 10 t p (CR) CR to VOUT 1.2 t p (CR) Output oad; 6.8 m/5.7 Ω 2.5 Noise rejection dead band time t BNK 19 I out = 1.0 A ns CR reference signal oscillation frequency Chopping frequency range Chopping frequency f CR 20 C osc = 560 pf, R osc = 3.6 kω 736 kz f chop (min) f chop (typ.) f chop (max) f chop 20 Output active (I out = 1.0 A) Step fixed, Ccp1 = 0.22 µf, Ccp2 = 0.01 µf Output active (I out = 1.0 A) CR CK = 800 kz ns ns ns ns µs kz 100 kz Charge pump rise time t ONG 21 Ccp2 = 0.22 µf, Ccp = 0.01 µf V M = 24 V, =, RESET = 2 4 ms 20

21 Test Waveforms (Timing waveforms and names) t w (CK) CK 50% t sust-ck t hck-st twn twp STROBE 50% t STROBE () t STROBE () t STROBE t susin-ck t hsin-ck DATA 50% DATA15 50% DATA0 CR waveform (reference) t p (CR) t p (ST) Output voltage A 90% 50% 10% t p (CR) t p (ST) OUTPUT Voltage A 90% 50% 10% t r 90% 50% 10% t f 21

22 Test Waveforms (Timing waveforms and names) OSC-charge delay OSC-fast delay OSC (CR) T chop Output voltage A Output voltage A 50% 50% 50% Set current Output current Charge Slow Fast 22

23 Calculation of Set Current Determining R RS and V ref determines the set current value. I out (max) = 1 V ref (V) Vref (GAIN) Torque (Torque = 100, 85, 70, 50% : input serial data) RRS ( Ω) 1/5.0 is V ref (gain): V ref attenuation ratio (typ.). For example, to input V ref = 3 V and Torque = 100% and to output I out = 0.8 A, R RS = 0.75 Ω (0.5 W or more) is required. Formulas for Calculating CR Oscillation Frequency (Chopping reference frequency) The CR oscillation frequency and f chop can be calculated by the following formulas: 1 f CR = [z] KA (C R KB C) KA (constant): KB (constant): 600 f f chop = CR 8 [z] Example: When Cosc = 1,000 pf and Rosc = 2.0 kω are connected, f CR = 735 kz. At this time, the chopping frequency f chop is: f chop = f CR /8 = 92 kz. 1 Note: f CR = t CR t CR = t (Charge) + t (Dis - Charge) CR oscillation CR charge CR distance cycle time time At this time, t (CR discharge) is subject to the following condition : 600 ns > t (CR discharge) > 400 ns. Be sure to set the CR value in accordance with this condition. 23

24 CR Circuit Constants OSC circuit oscillation waveform t (CR charge) t (CR dis-charge) E1 E2 t = 0 t = 1 t = 2 The OSC circuit generates the chopping reference signal by charging and discharging the external capacitor Cosc through current supplied from the external resistor Rosc in the OSC block. Voltages E1 and E2 in the diagram are set by dividing the by approximately 3/5 (E1) and 2/5 (E2). The actual current chopping time is 1/8 the CR frequency. [Important: Setting the cr circuit constants] The CR oscillation waveform is converted in the IC to the CK waveform (CR-CK signal) and used for control. If the CR waveform discharge time is set outside the range shown below, the operation of the IC is not guaranteed. Be sure to set the CR waveform discharge time within the following range. 600 ns > t (CR discharge) > 400 ns 24

25 IC Power Dissipation IC power dissipation is classified into two: power consumed by transistors in the output block and power consumed by the logic block and the charge pump circuit. (1) Power consumed by the Power Transistor (calculated with Ron = 0.6 Ω) In Charge mode, Fast Decay mode, or Slow Decay mode, power is consumed by the upper and lower transistors of the bridges. The following expression expresses the power consumed by the transistors of a bridge. P (out) = 2 (T r ) I out (A) V DS (V) = 2 I out^2 R on...(1) The average power dissipation for output under 4 bit micro step operation (phase difference between phases A and B is 90 ) is determined by expression (1). Thus, power dissipation for output per unit is determined as follows (2) under the conditions below. R on = 0.6 Ω (@ 1.0 A) I out (Peak: max) = 1.0 A V M = 24 V = P (out) = 2 (T r ) 1.0 (A)^ (Ω)... (2) =1.20 (W) (2) Power consumed by the logic block and IM The following standard values are used as power dissipation of the logic block and IM at operation. I (OGIC) = 2 ma (typ.): /unit I (IM3) = 12.5 ma (typ.): operation/unit I (IM1) = 6.0 ma (typ.): stop/unit The logic block is connected to (). IM (total of current consumed by the circuits connected to V M and current consumed by output switching) is connected to V M (24 V). Power dissipation is calculated as follows : P (ogic & IM) = 5 (V) (A) + 24 (V) (A)... (3) = 0.31 (W) (3) Thus, power dissipation for 1 unit (P) is determined as follows by (2) and (3) above. P = P (out) + P (ogic & IM) = 1.51 (W) Power dissipation for 1 unit at standby is determined as follows: P (standby) = 24 (V) (A) + 5 (V) (A) = (W) When one motor driving = 100 %, power dissipation is determined as follows: P (all) = 1.51 (W) (W) = 1.66 (W) For thermal design on the board, evaluate by mounting the IC. 25

26 Mixed Decay Mode Waveforms (concept of mixed decay mode) f chop CR pin input waveform DECAY MODE 0 NF Slow Set current value SOW DECAY MODE Charge DECAY MODE 1 NF Slow Set current value 37.5% MIXED DECAY MODE Charge MDT Fast Monitoring set current value RNF DECAY MODE 2 NF Charge 75% MIXED DECAY MODE MDT Fast Set current value Monitoring set current value RNF DECAY MODE 3 NF FAST DECAY MODE Charge Fast Set current value Monitoring set current value RNF 100% 87.5% 75% 62.5% 50% 37.5% 25% 12.5% 0 A B C D E F G I In Decay modes 1 to 4, any point from A to can be set using 3-bit + 1-bit serial data 4. (Slow Decay mode for Decay mode 0 in the above figure can be set by setting current Decay mode X to 0.) NF is the point where the output current reaches the set current value. RNF is the timing for monitoring the set current. In Mixed Decay and Fast Decay modes, where the condition RNF (set current monitor signal) < (output current) applies, Charge mode is cancelled at the next chopping cycle (charge cancel circuit). Therefore, at the next chopping cycle, the IC enters Slow + Fast modes (Slow Fast at MDT). 26

27 Mixed Decay Timing which can be Set Internal CR waveform NF f chop Defaults for Decay mode 0 0% CURRENT MODE (X) = 0 DECAY MODE (X 2, X 1, X 0) = (,, ) X: arbitrary value 12.5% NF MDT CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (0, 0, 0) RNF 25% NF MDT CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (0, 0, 1) RNF 37.5% NF MDT RNF Defaults for Decay mode 1 CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (0, 1, 0) 50% NF MDT CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (0, 1, 1) RNF 62.5% NF MDT CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (1, 0, 0) RNF 75% NF MDT RNF Defaults for Decay mode 2 CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (1, 0, 1) 87.5% NF MDT CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (1, 1, 0) RNF FAST DECAY MODE NF FAST MODE RNF: CURRENT MONITOR (WEN SET CURRENT VAUE > OUTPUT CURRENT) CARGE MODE FAST MODE RNF Defaults for Decay mode 3 CURRENT MODE (X) = 1 DECAY MODE (X 2, X 1, X 0) = (1, 1, 1) 27

28 Test Circuit (A/B unit only. C/D unit conforms to A/B unit.) TB62201AF 1. V IN (), V IN () Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR V ref AB 9 V M A 36 3 V A IDD1, I DD2 27 R RS A 34 A 32 R RS A Vary V in STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 I IN (), I IN () to No reset at testing RESET = 5 [V] A A 28 RESET V SS (F IN ) Ccp C 13 Ccp B µf Ccp 2 24 V 6 SETUP P-GND Ccp A µf Ccp 1 : PGND : (V SS ) Test Method V IN () : Set RESET to igh and vary the logic input voltage from 0 to 7 V. Monitor I DD and measure the change point (V M = 24 V). V IN () : Set RESET to igh and vary the logic input voltage from 5 to. Monitor I DD and measure the change point. Setup Data DATA CK STROBE

29 2. I IN (), I IN (), I DD1, I DD2 (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR V ref AB 9 V M A 36 3 V A IDD1, I DD2 27 R RS A 34 A 32 R RS A Vary V in STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 I IN (), I IN () to No reset at testing RESET = 5 [V] A A 28 RESET V SS (F IN ) Ccp C 13 Ccp B µf Ccp 2 24 V 6 SETUP P-GND Ccp A µf Ccp 1 : PGND : (V SS ) Test Method I IN () : Set RESET to igh, set the the logic input voltage to, and measure the input current. I IN () : Set RESET to igh, set the the logic input voltage to, and measure the input current. I DD1 : Apply, input RESET, and measure I DD. I DD2 : Input 6.25 Mz clock and measure the current when the logic is operating. Set output to OPEN. Setup Data DATA CK STROBE

30 3. IM1, IM2 (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 V M B 1 At IM1 testing: RESET = () At IM2 testing: RESET = () 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 IM A 24 V : PGND : (V SS ) Test Method IM1: Set the logic block to non-active (DATA = all 0), =, V M = 24 V, and output to open. Measure the current input from V M supply. RESET = IM2: Set the logic block only to active (CK = 6.25 Mz), V M = 24 V, and output to open. Measure the current input from V M supply. RESET = Setup Data DATA CK STROBE

31 4. IM3 (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 A IM 24 V : PGND : (V SS ) This is the IM current when all of the circuits, including the output transistors, in the IC are operating. The IM current includes the current dissipation in the charge pump circuit, output gate loss, and output predriver. Because the IM current (IM3) is input from the RS pin, which is also used for the output current, IM3 cannot be measured by the normal testing methods. Use the method shown below. Setup Data The serial data PASE signal (both A and B) switch over to high or low. DATA CK STROBE Test Method Set output to open, change phase data from and perform switching. When testing, input phase data at double the chopping frequency (if f chop = 100 kz, fdata = 200 kz) and measure the current value of V M supply. fdata = 200 kz means that the phase switches at 200 kz. 31

32 Number of Switchings at Phase Switching Number of Switchings at Actual Operation Mode changes three times in one chopping cycle. RRS To V M One phase switching (16-bit data input) Four transistors switching RRS To V M Chopping cycle U 1 ON U 2 OFF U 1 U 2 OFF ON ON OFF OFF OFF 1 OFF oad Switches by phase data 2 ON oad 1 2 ON OFF OFF Charge Two transistors switching ON ON ON Slow Two transistors switching PGND Four transistors switching One phase switching (16-bit data input) Four transistors are switched at one phase switching PGND Four transistors switching Eight transistors switching in one chopping cycle OFF ON Fast ON OFF Number of switchings at actual operation = 2 number of switchings at phase switching. Therefore, switching the phase at 2 chopping cycle matches the number of switchings at actual operation with the number of switchings at phase switching, and allows the actual current dissipation, IM3, to be measured. 32

33 5. I OB, I O, I O (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A STROBE AB CK AB DATA AB A 32 A 35 B 2 B 5 A A I OB I O, I O R RS B 3 V M B 1 No reset at testing RESET = 5 [V] 28 I O RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) Test Method I O : With V M = 24 V, =, and logic input all = 0 applied, set RESET =, connect the output pins to GND, and measure the supply current. I OB : With V M = 24 V, =, and logic input all = 0 applied, set RESET =, connect the output pins to V M, and measure the supply current. I O : With V M = 24 V, =, and logic input all = 0 applied, set RESET =, connect the output pins to GND, and measure the supply current. Setup Data DATA CK STROBE

34 6. V RS ( to ), V ref (GAIN) (when measuring phase A) after Measurement (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A A STROBE AB CK AB DATA AB A 35 B 2 B 5 Oscilloscope V R RS B 3 V M B 1 Vary between 0 and 1 V. No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) V RS ( to ): Input torque data = 100% () and vary the voltage between V M and R S pins. Measure the voltage (V RS ) when output changes from fixed Charge mode to another mode. Also measure V RS when torque data = 85% (), 70% (), or 50% () as above and calculate the ratio using V RS value at 100% as reference. V V ref (GAIN) : V ref (GAIN) = RS (*) Vref ((*) V RS : when torque data = 100%) Setup Data DATA CK STROBE

35 7. I out1, I out2 (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR V ref AB 9 V M A 36 3 V STROBE AB CK AB DATA AB R RS A 34 A 32 A 35 B 2 B 5 R RS A Monitors current waveform. R RS B 3 R RS B V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 : PGND : (V SS ) 24 V With load, perform chopping in Mixed Decay mode. Monitor the output current waveform and measure the various output currents at constant current operation. Setup Data DATA CK STROBE Set to 100% MDT MDT Current waveform Output current value (set current value) 0% Charge Slow 100% Fast 0% Slow Fast Measurement of peak current Charge 35

36 8. IRS (when measuring phase A) (A/B unit only. C/D unit conforms to A/B unit) TB62201AF Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A 34 A STROBE AB CK AB DATA AB A 32 A 35 B 2 B 5 R RS B 3 V M B 1 RESET = 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) With input to RESET, connect V M and R RS to the power supply, and measure the current input to the R S pin. (Either drop all the input pins to GND level or input all ow data to the DATA pin, then perform measurement. At that time, leave all other output pins open.) Setup Data DATA CK STROBE

37 9. R ON (D-S), R ON (S-D) when Measuring Output A (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A A STROBE AB CK AB DATA AB A 35 B 2 B 5 Curve tracer R RS B 3 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V M B V SS (F IN ) 1 Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Curve tracer Ccp 2 Ccp 1 24 V : PGND : (V SS ) Input the current setting data ( signal) to the DATA pin and measure the voltage between V M and OUT when I out = 1000 ma or the voltage between OUT and GND. Then, change the phase and repeat measurement. At that time, leave the output pins which are not measured open. Setup Data (Vary the phase data during testing.) DATA CK STROBE

38 10. V ref, I ref (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR AB V ref AB 9 V M A 36 Oscilloscope Monitor A I ref (*) (*) When measuring I ref, fix V ref = 3 V and measure. Vary V ref = 2 to 1. R RS A 34 R RS A 27 A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) V ref : Vary V ref = 2 to 1 V and confirm that output is on. I ref : When V M = 24 V and =, apply the specified voltage of 3 V to the V ref and monitor the current flow value. 38

39 11. T j TSD, T j TSD (Measure in an environment such as an constant temperature chamber where the temperature for the IC can be freely changed) (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A A STROBE AB CK AB DATA AB A 35 B 2 B 5 Curve tracer R RS B 3 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V M B V SS (F IN ) 1 Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Curve tracer Ccp 2 Ccp 1 24 V : PGND : (V SS ) T j TSD : Increase the ambient temperature. Measure the temperature when output stops. T j TSD : Gradually lower the temperature from the level when the TSD circuit was operating (output off). At that time, control the RESET input thus :. Output will begin at a certain temperature level. T j TSD is the difference between the temperature at which output begins and the temperature at which TSD is triggered. Setup Data DATA CK STROBE

40 12. R (A/B unit only. C/D unit conforms to A/B unit.) Oscilloscope Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V 27 R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 No reset at testing RESET = 5 [V] Vary from. 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 V M 24 V : PGND : (V SS ) Monitor the output pins. Increase the voltage from 0. Measure the value when output starts. Next, decrease the voltage and measure the value when output stops. Setup Data DATA CK STROBE

41 13. V MR (A/B unit only. C/D unit conforms to A/B unit.) Oscilloscope Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V 27 R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B V M B 3 1 R RS B No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 Vary from. : PGND : (V SS ) With the CK signal and DATA (all igh) input, increase the V M voltage from 0. Measure the V M value when output starts. Next, decrease the V M voltage and measure the V M value when output stops. Setup data DATA CK STROBE

42 14. Overcurrent Protector Circuit (ISD) (To measure output A: ) (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A A STROBE AB CK AB DATA AB A 35 B 2 B 5 Curve tracer R RS B 3 At measuring, non-reset RESET = 5 [V] 28 RESET P-GND SETUP 6 V M B V SS (F IN ) 1 Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Curve tracer Ccp 2 Ccp 1 24 V : PGND : (V SS ) Test method: To monitor operating current of the overcurrent protector circuit when output A is short-circuited to the power supply Input the current setting data ( signal) to the DATA pin. If short-circuited to the supply, measure the lower output transistors. If short-circuited to ground, measure the upper output transistors (see how to measure R ON ). When measuring R ON, increase the current flow. There is a current value at which output is switched off and R ON cannot be measured. This value is the set current value for the overcurrent protector circuit. Make sure to leave open the output pins not being measured. Note that if the temperature changes, the value may fluctuate. Try to avoid applying power to the IC by one-shot measuring. Setup Data (Example: The phase signal must be changed depending on the pin.) DATA CK STROBE

43 15. Current Vector (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR V ref AB 9 V M A 36 3 V STROBE AB CK AB DATA AB R RS A 34 A 32 A 35 B 2 B 5 R RS A Monitor current waveform R RS B 3 R RS B V M B 1 At measuring, non-reset RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 : PGND : (V SS ) 24 V Perform chopping in Mixed Decay mode with load. Monitor the output current waveform and measure the output current at constant current operation. At this time, vary the 4-bit data for current setting and measure the current values. Using the set output current as 100%, calculate the output current ratio. 100% Output current (example) 71% 100% 0% 43

44 16. f CK, t w (CK), t wp (CK), t wn (CK), t STROBE, t STROBE (), t STOBE (), t susin-ck, t sust-ck, t hsin-ck, t hck-st (A/B unit only. C/D unit conforms to A / B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V 27 R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) Input any data at f CK (max), perform chopping, and monitor the output waveform. For the measuring points, see the timing chart below. Setup Data DATA CK STROBE Measuring Points tw (CK) CK 50% STROBE tsust-ck 50% thst-ck twn (CK) twp (CK) tsusin-ck tstrobe () tstrobe () tstrobe thin-ck DATA 50% DATA15 50% DATA0 44

45 17. OSC-fast Delay, OSC-charge Delay (A/B unit only. C/D unit conforms to A / B unit.) TB62201AF Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V 27 R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) Fix the output current value in Mixed Decay mode and turn the output on. Measure the time until the output switches from the CR pin waveform and the output voltage waveform. Setup Data DATA CK STROBE Top CR Bottom Osc-fast delay Osc-charge delay V out A 50% 50% 50% V out A (Mode) 50% Charge Slow Fast Charge 45 50% 50%

46 18. t p (ST), t p (ST), t r, t f (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 Monitor 3 V 27 R RS A 34 A 32 R RS A R = 5.7 Ω STROBE AB CK AB DATA AB A 35 B 2 B 5 = 6.8 m R RS B 3 R RS B V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) Setup Data DATA CK STROBE Switch PASE every 130 µs and measure the output pin voltage and the STROBE signal. [Oscilloscope Waveform (example)] STROBE 50% t p (ST) 130 µs 50% Output voltage A 50% t p (ST) Output voltage A 90% 90% 50% 10% 10% t r t f 46

47 19. t BRANK (A/B unit only. C/D unit conforms to A/B unit.) Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V 27 AB R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 No reset at testing RESET = 5 [V] 28 RESET P-GND SETUP 6 t BRANK is the dead time band for avoiding malfunction caused by noise. Apply sufficient differential voltage (when V ref = 3 V, 0.6 V or higher) to V M -R S and apply duty. When the pulse width reaches a certain value, triggering feedback and changing the output. Check the value. V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.22 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) V M Measure the pulse width where output changes. R S pin voltage Output operation Apply pulse to the R S pin so that the R S pin = V M voltage 1.. Setup Data DATA CK STROBE

48 20. f chop (f chop (min), fc hop (max)) (A/B unit only. C/D unit conforms to A/B unit.) TB62201AF Oscilloscope Cosc AB = 560 pf Rosc AB = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V R RS A 34 R RS A 27 A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B V M B 3 1 R RS B 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A Change the R osc and C osc values and measure the frequency on the CR pin using the oscilloscope. At this time, 1/8 of the frequency of the measured CR waveform is f chop µf 0.22 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) Oscilloscope Waveform (example) 1/8 f chop (SYNC) = f CR t = 0 t = 1 48

49 21. t ONG (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR AB V ref AB 9 V M A 36 3 V 27 R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 At measuring, change from reset to non-reset. 28 RESET P-GND SETUP 6 V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) Apply V M and and change RESET from to. Measure the time until the CcpA pin becomes V M + 90%. + V M (V M + ) 90% V M RESET 50% t ONG 49

50 22. Mixed Decay Timing (A/B unit only. C/D unit conforms to A/B unit.) Cosc = 560 pf Rosc = 3.6 kω 8 CR V ref AB 9 V M A 36 3 V 27 R RS A 34 A 32 R RS A STROBE AB CK AB DATA AB A 35 B 2 B 5 R RS B 3 R RS B V M B 1 When overwriting the mixed decay timing table, set to. When the motors are operating, set to GND level. At measuring, non-reset RESET = 5 [V] 28 6 RESET SETUP P-GND V SS (F IN ) Ccp C 13 Ccp B 12 Ccp A µf 0.01 µf Ccp 2 Ccp 1 24 V : PGND : (V SS ) With V M = 24 V, =, RESET =, change the SETUP pin from to and overwrite the MIXED DECAY TIMING TABE. Then change the SETUP pin from to. With load, perform chopping and monitor the output current waveform at that time. Confirm that the switching timing from Slow Decay Mode to Fast Decay Mode within an fchop cycle is the specified MIXED DECAY TIMING. (Depending on the load value and the test environment, chopping may be performed every two cycles or there may be no Slow Decay Mode. If so, conditions, for example, load condition, may need to be changed. Output current value (set current value) 0% Charge Slow MDT MDT 100% 0% MDT Fast Slow Charge MDT Fast Current waveform 50

51 Waveforms in Various Current Modes (Ideal waveform) Normal MIXED DECAY MODE Waveform NF is the point at which the output current reaches the set current value. CR CK signal f chop f chop I out Set current value NF Set current value NF 12.5% MIXED DECAY MODE RNF MDT (MIXED DECAY TIMING) point When NF is after MIXED DECAY TIMING Fast Decay mode after Charge mode. I out Set current value MDT (MIXED DECAY TIMING) point NF Set current value NF 37.5% MIXED DECAY MODE RNF RNF STROBE signal input 51

52 In MIXED DECAY MODE, when the Output Current > the Set Current Value f chop f chop f chop f chop Set current value NF RNF CARGE MODE for one fchop cycle after STROBE signal input Because the set current value > the output current, no CARGE MODE in the next cycle. I out NF 12.5% MIXED DECAY MODE Set current value RNF NF MDT (MIXED DECAY TIMING) point RNF STROBE signal input FAST DECAY MODE Waveform f chop NF is the point at which the output current reaches the set current value. Set current value I out FAST DECAY MODE (0% MIXED DECAY MODE) RNF Because the set current value > the output current, FAST DECAY MODE in the next cycle, too Set current value NF RNF Because the set current value > the output current, CARGE MODE NF FAST DECAY MODE in the next cycle, too RNF STROBE signal input Response delay time 52