Micropower, Rail to Rail Input Current Sense Amplifier with Voltage Output

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1 Micropower, Rail to Rail Input Current Sense Amplifier with Voltage Output ISL86 The ISL86 is a micropower, uni-directional high-side and low-side current sense amplifier featuring a proprietary rail-to-rail input current sensing amplifier. The ISL86 is ideal for high-side current sense applications where the sense voltage is usually much higher than the amplifier supply voltage. The device can be used to sense voltages as high as 8V when operating from a supply voltage as low as.7v. The micropower ISL86 consumes only 5µA of supply current when operating from a.7v to 8V supply. The ISL86 features a common-mode input voltage range from V to 8V. The proprietary architecture extends the input voltage sensing range down to V, making it an excellent choice for low-side ground sensing applications. The benefit of this architecture is that a high degree of total output accuracy is maintained over the entire V to 8V common mode input voltage range. The ISL86 is available in fixed (1V/V, 5V/V, V/V and Adjustable) gains in the space saving 5 Ld SOT-3 package and the 6 Ld SOT-3 package for the adjustable gain part. The parts operate over the extended temperature range from -4 C to. Features Low Power Consumption µA, Typ Supply Range V to 8V Wide Common Mode Input V to 8V Gain Versions - ISL V/V - ISL V/V - ISL V/V - ISL86-ADJ ADJ (Min Gain = V/V) Operating Temperature Range C to Packages Ld SOT-3, 6 Ld SOT-3 Applications Power Management/Monitors Power Distribution and Safety DC/DC, AC/DC Converters Battery Management/Charging Automotive Power Distribution Related Literature See AN153 for ISL86 Evaluation Board User s Guide SENSE 1VDC SENSE 5VDC SENSE 1.VDC MULTIPLE PUT POWER SUPPLY R SENSE R SENSE R SENSE - 5VDC ISL86-5VDC ISL86-5VDC ISL86 1VDC PUT I SENSE 1VDC 5VDC PUT I SENSE 5VDC 1.VDC PUT I SENSE 1.VDC C -4 C GAIN FIGURE 1. TYPICAL APPLICATION FIGURE. GAIN ACCURACY vs V RS = V TO 8V May 3, 11 FN CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures INTERSIL or Copyright Intersil Americas Inc. 1, 11. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners.

2 ISL86 Block Diagram I =.86µA I =.86µA R S V SENSE R 1 gm HI HIGH-SIDE AND LOW-SIDE SENSING R S V SENSE R 1 gm HI HIGH-SIDE AND LOW-SIDE SENSING R S- R S- R 1.35V - R f R 1.35V - R f R 3 gm LO R 5 R g R 3 gm LO R 5 F B R g R 4 I MIRROR V SENSE R 4 I MIRROR V SENSE FIXED GAIN PARTS ADJUSTABLE GAIN PART Pin Configurations ISL86-1, 5, (5 LD SOT-3) TOP VIEW ISL86-ADJ (6 LD SOT-3) TOP VIEW 1 5 R S- FB 1 6 FIXED GAIN ADJ. GAIN 5 R S- 3 4 R S 3 4 R S Pin Descriptions ISL86-1, 5, (5 LD SOT-3) ISL86-ADJ (6 LD SOT-3) PIN NAME DESCRIPTION 1 6 Power Ground 1 FB Input Pin for External Resistors Amplifier Output 3 3 Positive Power Supply 4 4 R S Sense Voltage Non-inverting Input 5 5 R S- Sense Voltage Inverting Input FB R S- R S CAPACITIVELY COUPLED ESD CLAMP FN May 3, 11

3 ISL86 Ordering Information PART NUMBER (Notes 1,, 3) GAIN PART MARKING (Note 4) PACKAGE Tape & Reel (Pb-Free) PKG. DWG. # ISL86FH1Z-T7 1V/V BDJA 5 Ld SOT-3 P5.64A ISL86FH1Z-T7A 1V/V BDJA 5 Ld SOT-3 P5.64A ISL86FH5Z-T7 5V/V BDHA 5 Ld SOT-3 P5.64A ISL86FH5Z-T7A 5V/V BDHA 5 Ld SOT-3 P5.64A ISL86FHZ-T7 V/V BDGA 5 Ld SOT-3 P5.64A ISL86FHZ-T7A V/V BDGA 5 Ld SOT-3 P5.64A ISL86FHADJZ-T7 ADJ BDFA 6 Ld SOT-3 P6.64 ISL86FHADJZ-T7A ADJ BDFA 6 Ld SOT-3 P6.64 ISL86FH-1EVAL1Z ISL86FH-5EVAL1Z ISL86FH-EVAL1Z ISL86FH-ADJEVAL1Z 1V/V Evaluation Board 5V/V Evaluation Board V/V Evaluation Board Adjustable Evaluation Board NOTES: 1. Please refer to TB347 for details on reel specifications.. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 1% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL86. For more information on MSL please see techbrief TB The part marking is located on the bottom of the part. 3 FN May 3, 11

4 ISL86 Absolute Maximum Ratings Max Supply Voltage V Max Differential Input Current ma Max Differential Input Voltage ±.5V Max Input Voltage (R S, R S-, FB) V to 3V Max Input Current for Input Voltage < -.5V ±ma Output Short-Circuit Duration Indefinite Di-Electrically Isolated PR4 Process Latch-up free ESD Rating Human Body Model (Tested per JESD-A114F) kV Machine Model (Tested per EIA/JESD-A115-A) V Charged Device Model (Tested per JESD-C11D) kV Thermal Information Thermal Resistance (Typical) θ JA ( C/W) θ JC ( C/W) 5 Ld SOT-3 (Notes 5, 6) Ld SOT-3 (Notes 5, 6) Maximum Storage Temperature Range C to 15 C Maximum Junction Temperature (T JMAX ) C Pb-Free Reflow Profile see link below Recommended Operating Conditions Ambient Temperature Range (T A ) C to CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 5. θ JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. For θ JC, the case temp location is taken at the package top center. Electrical Specifications = 1V, V RS = V to 8V, V SENSE = V, R LOAD = 1MΩ, T A = unless otherwise specified. Boldface limits apply over the operating temperature range, -4 C to. Temperature data established by characterization. PARAMETER DESCRIPTION CONDITIONS V OS (Input Offset Voltage) Gain = 1 (Notes 8, 9) Gain = 5, Gain = (Notes 8, 9) MIN (Note 7) TYP MAX (Note 7) = V RS = 1V, V SENSE = mv to 1mV µv -3 3 µv = 1V, V RS =.V, V SENSE = mv to 1mV mv mv = V RS = 1V, V SENSE = mv to 1mV µv µv = 1V, V RS =.V, V SENSE = mv to 1mV mv mv Adjustable, Gain = 1 = V RS = 1V, V SENSE = mv to 1mV µv R f = 1kΩ, R g = 5kΩ (Notes 8, 9) µv = 1V, V RS =.V, V SENSE = mv to 1mV mv mv I RS, I RS - Leakage Current = V, V RS = 8V µa 1.5 µa I RS Gain = 1 V RS = V, V SENSE = 5mV µa ( Input Bias Current) 7 µa V RS = V, V SENSE = 5mV na -6 na Gain = 5, Gain = V RS = V, V SENSE = 5mV µa 8 µa V RS = V, V SENSE = 5mV na -84 na ADJ Gain = 11 V RS = V, V SENSE = 5mV µa R f = 1kΩ, R g = 1kΩ 7 µa V RS = V, V SENSE = 5mV na -6 na UNIT 4 FN May 3, 11

5 ISL86 Electrical Specifications = 1V, V RS = V to 8V, V SENSE = V, R LOAD = 1MΩ, T A = unless otherwise specified. Boldface limits apply over the operating temperature range, -4 C to. Temperature data established by characterization. (Continued) I RS - G = 1, 5,, ADJ V RS = V, V SENSE = 5mV 5 5 na (- Input Bias Current) 75 na V RS = V, V SENSE = 5mV na -13 na CMRR Common Mode Rejection Ratio V RS = V to 8V db PSRR Power Supply Rejection Ratio =.7V to 8V, V RS =V 9 15 db V FS Full-scale Sense Voltage = 8V, V RS =.V, 1V mv G (Note 8) ISL V/V (Gain) ISL V/V ISL86- V/V ISL86-ADJ V/V G A (Gain Accuracy) V OA (Total Output Accuracy) V OH V OL PARAMETER DESCRIPTION CONDITIONS Gain = 1 (Note 1) Gain = 5, Gain = (Note 1) ADJ Gain = 1 R f = 1kΩ, R g = 5kΩ (Note 1) Gain = 1 (Note 11) Gain = 5, Gain = (Note 11) ADJ Gain = 1 R f = 1kΩ, R g = 5kΩ (Note 11) = V RS = 1V, V SENSE = mv to 1mV -..7 % -1 1 % = 1V, V RS =.1V, V SENSE = mv to 1mV -.5 % = V RS = 1V, V SENSE = mv to 1mV % -1 1 % = 1V, V RS =.1V, V SENSE = mv to 1mV % % = V RS = 1V, V SENSE = mv to 1mV % % = 1V, V RS =.1V, V SENSE = mv to 1mV % = V RS = 1V, V SENSE = 1mV % % = 1V, V RS =.1V, V SENSE = 1mV -1.5 % = V RS = 1V, V SENSE = 1mV % % = 1V, V RS =.1V, V SENSE = 1mV % % = V RS = 1V, V SENSE = 1mV % % = 1V, V RS =.1V, V SENSE = 1mV % % Output Voltage Swing, High I O = -5µA, =.7V, V SENSE = 1mV, V RS = V 39 5 mv - V Output Voltage Swing, Low I O = 5µA, =.7V, V SENSE = V, V RS = V 3 5 mv V R Output Resistance = V RS = 1V, V SENSE = 1mV, I = 1µA to 1mA MIN (Note 7) 6.5 Ω I SC Short Circuit Sourcing Current = V RS = 5V, R L = 1Ω 4.8 ma I SC- Short Circuit Sinking Current = V RS = 5V, R L = 1Ω 8.7 ma TYP MAX (Note 7) UNIT 5 FN May 3, 11

6 ISL86 Electrical Specifications = 1V, V RS = V to 8V, V SENSE = V, R LOAD = 1MΩ, T A = unless otherwise specified. Boldface limits apply over the operating temperature range, -4 C to. Temperature data established by characterization. (Continued) PARAMETER DESCRIPTION CONDITIONS I S Gain = 1 V RS > V, V SENSE = 5mV 5 59 µa 6 µa Gain = 5,, V RS > V, V SENSE = 5mV 5 6 µa 63 µa ADJ Gain = 1 V RS > V, V SENSE = 5mV 5 6 µa R f = 1kΩ, R g = 5kΩ 63 µa Supply Voltage Guaranteed by PSRR.7 8 V Slew Rate Gain = 1 Pulse on R S pin, V = 8V P-P (Figure 67) V/µs Gain = 5 Pulse on R S pin, V = 8V P-P (Figure 67) V/µs Gain = Pulse on R S pin, V = 3.5V P-P (Figure 67).5.67 V/µs ADJ Gain = 1 R f = 1kΩ, R g = 5kΩ Pulse on R S pin, V = 3.5V P-P (Figure 67).5.67 V/µs BW -3dB Gain = 1 V RS = 1V,.1V, V SENSE = 1mV 11 khz Gain = 5 V RS = 1V,.1V, V SENSE = 1mV 16 khz Gain = V RS = 1V,.1V, V SENSE = 1mV 18 khz ADJ, Gain = 11 (Figure 59) V RS = 1V,.1V, V SENSE = 1mV, R f = 1kΩ, R g =1kΩ 4 khz ADJ, Gain = 51 (Figure 59) V RS = 1V, V SENSE = 1mV, R f = 1kΩ, R g = kω 78 khz V RS =.1V, V SENSE = 1mV, R f = 1kΩ, R g = kω 1 khz ADJ, Gain = 1 (Figure 59) V RS = 1V, V SENSE = 1mV, R f = 1kΩ, R g = 5kΩ 131 khz V RS =.1V, V SENSE = 1mV, R f = 1kΩ, R g = 5kΩ 37 khz t S Output Settling Time to 1% of Final = V RS = 1V, V =1V step, V SENSE > 7mV 15 µs Value = V RS =.V, V = 1V step, V SENSE > 7mV µs Capacitive-Load Stability No sustained oscillations 3 pf t S Power-up Power-Up Time to 1% of Final Value = V RS = 1V, V SENSE = 1mV 15 µs = 1V, V RS =.V, V SENSE = 1mV 5 µs Saturation Recovery Time = V RS = 1V, V SENSE = 1mV, overdrive 1 µs NOTES: 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 8. DEFINITION OF TERMS: V SENSE A = V 1mV V SENSE B = V mv V A = V SENSE A = 1mV V B = V SENSE B = mv V A V B G = GAIN = V SENSE A V SENSE B 9. V OS is extrapolated from the gain measurement. V OS V SENSE A V = A G G MEASURED G EXPECTED 1. % Gain Accuracy = G A = G EXPECTED MIN (Note 7) V MEASURED V EXPECTED 11. Output Accuracy % VOA = , where V = V SENSE X GAIN and V SENSE = 1mV V EXPECTED TYP MAX (Note 7) UNIT 6 FN May 3, 11

7 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. VOLTS (V) V RS V TH(L-H) = 1.5V V TH(H-L) = 1.3V V (G = 1) G1, V = 1V G5, V = 5mV G, V = mv TIME (ms) FIGURE 3. HIGH-SIDE and LOW-SIDE THRESHOLD VOLTAGE V RS(L-H) and V RS(H-L), V SENSE = 1mV V RS R L = 1MΩ VCC = 1V V (G = 1) G1, V = V G5, V = 1V G, V = 4mV TIME (ms) FIGURE 4. V vs V RS, V SENSE = mv TRANSIENT RESPONSE V (V) 1 1 GAIN GAIN V (V) 6 V (V) TIME (µs) TIME (µs) FIGURE 5. LARGE SIGNAL TRANSIENT RESPONSE V RS =.V, V SENSE = 1mV FIGURE 6. LARGE SIGNAL TRANSIENT RESPONSE V RS = 1V, V SENSE = 1mV UNITS GAIN 1 V SENSE = mv, 1mV C GAIN 1 V SENSE = mv, 1mV 1 C FIGURE 7. DISTRIBUTION AT, V RS =1V, QUANTITY: 1 FIGURE 8. V OS vs V RS 7 FN May 3, 11

8 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) C 1 C FIGURE 9. V OS vs V RS GAIN 1 V SENSE = mv, 1mV C -4 C GAIN 1 V SENSE = mv, mv FIGURE 1. V OS vs, V RS = 1V C -4 C GAIN 1 V SENSE = mv, mv FIGURE 11. V OS vs, V RS =.1V C -4 C -1. GAIN 1-1. V SENSE = mv, 1mV FIGURE 1. GAIN ACCURACY vs V RS = V TO 8V C -4 C -1. GAIN 1-1. V SENSE = mv, 1mV FIGURE 13. GAIN ACCURACY vs V RS = V TO V C -4 C GAIN 1 V SENSE = mv, mv FIGURE 14. GAIN ACCURACY vs, V RS = 1V 8 FN May 3, 11

9 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) GAIN 1-18 V SENSE = mv, mv C FIGURE 15. GAIN ACCURACY vs, V RS =.1V -4 C V OA PERCENT..1 GAIN C C µ 1µ 1µ 1m 1m I (A) FIGURE 16. NORMALIZED V OA vs I GAIN (db) GAIN 1 V RS = 1mV -5 V RS = 1V = 1V -15 V SENSE = 1mV -5 A V = 1 R L = 1MΩ k 1k 1k 1M FREQUENCY (Hz) FIGURE 17. GAIN vs FREQUENCY V RS = 1mV/1V, V SENSE = 1mV, V = 5mV P-P GAIN 1 V SENSE = mv, 1mV V RS = 1V TEMPERATURE ( C) FIGURE 18. vs TEMPERATURE GAIN GAIN 1 V SENSE = mv, 1mV V RS = 1V V ERROR (%) GAIN 1 V RS = 1V TEMPERATURE ( C) FIGURE 19. GAIN vs TEMPERATURE TEMPERATURE ( C) FIGURE. V ERROR (%) vs TEMPERATURE 9 FN May 3, 11

10 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) UNITS GAIN 5 V SENSE = mv, 1mV C GAIN 5 V SENSE = mv, 1mV 1 C FIGURE 1. DISTRIBUTION AT, V RS = 1V, QUANTITY: 1 FIGURE. V OS vs V RS C 1 C FIGURE 3. V OS vs V RS GAIN 5 V SENSE = mv, 1mV C -4 C GAIN 5 V SENSE = mv, mv FIGURE 4. V OS vs, V RS = 1V C -4 C GAIN 5 V SENSE = mv, mv FIGURE 5. V OS vs, V RS = V RS =.1V C -4 C -1. GAIN 5-1. V SENSE = mv, 1mV FIGURE 6. GAIN ACCURACY vs V RS = V TO 8V 1 FN May 3, 11

11 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) C C -1. GAIN 5 V SENSE = mv, 1mV FIGURE 7. GAIN ACCURACY vs V RS = V TO V C -4 C GAIN 5 V SENSE = mv, mv FIGURE 8. GAIN ACCURACY vs, HIGH-SIDE GAIN 5-18 V SENSE = mv, mv C FIGURE 9. GAIN ACCURACY vs, LOW-SIDE -4 C V OA PERCENT C 1 C µ 1µ 1µ 1m 1m I (A) FIGURE 3. NORMALIZED V OA vs I GAIN GAIN GAIN 5 V SENSE = mv, 1mV V RS = 1V GAIN (db) 15 5 V RS = 1mV -5 V RS = 1V = 1V -15 V SENSE = 1mV -5 A V = 1 R L = 1MΩ k 1k 1k 1M FREQUENCY (Hz) FIGURE 31. GAIN vs FREQUENCY V RS = 1mV/1V, V SENSE = 1mV, V = 5mV P-P TEMPERATURE ( C) FIGURE 3. vs TEMPERATURE 11 FN May 3, 11

12 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) GAIN GAIN 5 V SENSE = mv, 1mV V RS = 1V V ERROR (%) GAIN 5 V RS = 1V TEMPERATURE ( C) TEMPERATURE ( C) FIGURE 33. GAIN vs TEMPERATURE FIGURE 34. V ERROR (%) vs TEMPERATURE UNITS GAIN V SENSE = mv, 1mV C GAIN V SENSE = mv, 1mV 1 C FIGURE 35. DISTRIBUTION AT, V RS = 1V, QUANTITY: 1 FIGURE 36. V OS vs V RS C -4 C FIGURE 37. V OS vs V RS GAIN V SENSE = mv, 1mV C -4 C GAIN V SENSE = mv, mv FIGURE 38. V OS vs, V RS = 1V 1 FN May 3, 11

13 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) C -4 C GAIN V SENSE = mv, mv FIGURE 39. V OS vs, V RS =.1V C 1 C GAIN V SENSE = mv, 1mV FIGURE 4. GAIN ACCURACY vs V RS = V TO 8V C 1 C GAIN V SENSE = mv, 1mV FIGURE 41. GAIN ACCURACY vs V RS = V TO V C -4 C GAIN V SENSE = mv, mv FIGURE 4. GAIN ACCURACY vs, HIGH-SIDE C -16 GAIN -18 V SENSE = mv, mv C V OA PERCENT C -4 C GAIN -1. 1µ 1µ 1µ 1m 1m I (A) FIGURE 43. GAIN ACCURACY vs, LOW-SIDE FIGURE 44. NORMALIZED V OA vs I 13 FN May 3, 11

14 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) GAIN (db) V RS = 1mV GAIN -5 V RS = 1V = 1V -15 V SENSE = 1mV -5 A V = 1 R L = 1MΩ k 1k 1k 1M FREQUENCY (Hz) FIGURE 45. GAIN vs FREQUENCY V RS = 1mV/1V, V SENSE = 1mV, V = 5mV P-P GAIN V SENSE = mv, 1mV V RS = 1V TEMPERATURE ( C) FIGURE 46. vs TEMPERATURE GAIN GAIN V SENSE = mv, 1mV V RS = 1V V ERROR (%) GAIN V RS = 1V TEMPERATURE ( C) FIGURE 47. GAIN vs TEMPERATURE TEMPERATURE ( C) FIGURE 48. V ERROR (%) vs TEMPERATURE UNITS 6 GAIN 11 ADJ 4 R f = 1k, R g = 1k V SENSE = mv, 1mV FIGURE 49. DISTRIBUTION AT, V RS = 1V, QUANTITY: GAIN 11 ADJ 4 R f = 1k, R g = 1k V SENSE = mv, 1mV C C FIGURE 5. V OS vs V RS 14 FN May 3, 11

15 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) C FIGURE 51. V OS vs V RS GAIN 11 ADJ R f = 1k, R g = 1k V SENSE = mv, 1mV 1 C GAIN 11 ADJ R f = 1k, R g = 1k V SENSE = mv, mv 1 C FIGURE 5. V OS vs, HIGH-SIDE -4 C C -4 C FIGURE 53. V OS vs, LOW-SIDE GAIN 11 ADJ R f = 1k, R g = 1k V SENSE = mv, mv C GAIN 11 ADJ R f = 1k, R g = 1k V SENSE = mv, 1mV -4 C FIGURE 54. GAIN ACCURACY vs V RS = V TO 8V C -4 C GAIN 11 ADJ R f = 1k, R g = 1k V SENSE = mv, 1mV FIGURE 55. GAIN ACCURACY vs V RS = V TO V C 1 C GAIN 11 ADJ R f = 1k, R g = 1k V SENSE = mv, mv FIGURE 56. GAIN ACCURACY vs, V RS = 1V 15 FN May 3, 11

16 ISL86 Typical Performance Curves = 1V, R L = 1MΩ, unless otherwise specified. (Continued) GAIN 11 ADJ -18 R f = 1k, R g = 1k V SENSE = mv, mv C -4 C V OA PERCENT GAIN 11 ADJ R f = 1k R g = 1k GAIN 1 ADJ R f = 1k R g = 5k -4 C 1 C 1 C -4 C 1µ 1µ 1µ 1m 1m I (A) FIGURE 57. GAIN ACCURACY vs, V RS =.1V FIGURE 58. NORMALIZED V OA vs I GAIN (db) V RS =.1V GAIN = 11 V RS = 1V GAIN = 51 V RS =.1V GAIN = 1 = 1V V SENSE = 1mV V RS = 1V GAIN = 1 V RS = 1V GAIN = 11 1 GAIN = 1, 51, 11 R f = 1k 5 R g = 1k, k, 5k V R L = 1MΩ RS = 1V GAIN = k 1k 1k 1M FREQUENCY (Hz) FIGURE 59. GAIN vs FREQUENCY V RS = 1mV/1V, V SENSE = 1mV, V = 5mV P-P GAIN = 1 GAIN = 11 V SENSE = mv, 1mV V RS = 1V GAIN = 1, 11 R f = 1k R g = 1k, 5k R L = 1MΩ TEMPERATURE ( C) FIGURE 6. vs TEMPERATURE.4.6 GAIN.35 GAIN = V SENSE = mv, 1mV.15 V RS = 1V GAIN = 1.1 GAIN = 1, 11 R f = 1k.5 R g = 1k, 5k R L = 1MΩ TEMPERATURE ( C) FIGURE 61. GAIN vs TEMPERATURE V ERROR (%).5.4 GAIN = V SENSE = mv, 1mV V RS = 1V GAIN = 1, 11 R f = 1k GAIN = R g = 1k, 5k R L = 1MΩ TEMPERATURE ( C) FIGURE 6. V ERROR (%) vs TEMPERATURE 16 FN May 3, 11

17 ISL86 Test Circuits and Waveforms V R1 R 1 V RS - V SENSE - R S R S- 1MΩ R L V V RS - V SENSE - R R S R S- 1MΩ R L V V R FIGURE 63. I S, V OS, V OA, CMRR, PSRR, GAIN ACCURACY FIGURE 64. INPUT BIAS CURRENT, LEAKAGE CURRENT SIGNAL GENERATOR V RS V RS- R S R S- 1MΩ R L V V RS V SENSE R S R S- 1MΩ R L V PULSE GENERATOR FIGURE 65. t s, SATURATION RECOVERY TIME FIGURE 66. GAIN vs FREQUENCY R S V RS R S- 1MΩ V R L PULSE GENERATOR FIGURE 67. SLEW RATE Applications Information Functional Description The ISL86-, ISL86-5 and ISL86-1 are single supply, uni-directional current sense amplifiers with fixed gains of V/V, 5V/V and 1V/V respectively. The ISL86-ADJ is single supply, uni-directional current sense amplifier with an adjustable gain via external resistors (see Figure 7). The ISL86-ADJ is stable for gains of and higher. The ISL86 is a -stage amplifier. Figure 68 shows the active circuitry for high-side current sense applications where the sense voltage is between 1.35V to 8V. Figure 69 shows the active circuitry for ground sense applications where the sense voltage is between V to 1.35V. The first stage is a bi-level trans-conductance amp and level translator. The gm stage converts the low voltage drop (V SENSE ) sensed across an external milli-ohm sense resistor, to a current (@ gm = 1.3µA/V). The trans-conductance amplifier forces a current through R 1 resulting to a voltage drop across R 1 that is equal to the sense voltage (V SENSE ). The current through R 1 is mirrored across R 5 creating a ground-referenced voltage at the input of the second amplifier equal to V SENSE. The second stage is responsible for the overall gain and frequency response performance of the device. The fixed gains (, 5, 1) are set with internal resistors R f and R g. The variable gain (ADJ) has an additional FB pin and uses external gain resistors to set the gain of the output. For the fixed gain amps the only external component needed is a current sense resistor (typically.1ω to.1ω, 1W to W). The transfer function for the fixed gain parts is given in Equation 1. V = GAIN ( I S R S V OS ) (EQ. 1) The transfer function for the adjustable gain part is given in Equation. V 1 R F = ( IS R R S V OS ) (EQ. ) G The input gm stage derives its ~.86µA supply current from the input source through the R S terminal as long as the sensed voltage at the R S pin is >1.35V and the gm HI amplifier is selected. When the sense voltage at R S drops below the 1.35V threshold, the gm LO amplifier kicks in and the gm LO output current reverses, flowing out of the R S- pin. 17 FN May 3, 11

18 ISL86 OPTIONAL FILTER CAPACITOR I =.86µA I S - R S V SENSE R S R S- V SENSE R 1 gm HI HIGH-SIDE SENSING VRS = V TO 8V = V to 8V R OPTIONAL TRANSIENT PROTECTION 1.35V R 3 gm LO V SENSE R 5 - R f R g F B ADJ OPTION ONLY LOAD I MIRROR R 4 FIGURE 68. HIGH-SIDE CURRENT DETECTION OPTIONAL FILTER CAPACITOR I =.86µA V SENSE I S - R S V SENSE R S R S- R 1 gm HI LOW-SIDE SENSING V RS = V TO V = V TO 8V R LOAD OPTIONAL TRANSIENT PROTECTION 1.35V R 3 gm LO R 5 - R f R g F B ADJ OPTION ONLY I MIRROR V SENSE R 4 FIGURE 69. LOW-SIDE CURRENT DETECTION 18 FN May 3, 11

19 ISL86 Hysteretic Comparator The input trans-conductance amps are under control of a hysteretic comparator operating from the incoming source voltage on the R S pin (Figure 68). The comparator monitors the voltage on R S and switches the sense amplifier from the low-side gm amp to the high-side gm amplifier whenever the input voltage at R S increases above the 1.35V threshold. Conversely, a decreasing voltage on the R S pin, causes the hysteric comparator to switch from the high-side gm amp to the low-side gm amp as the voltage decreases below 1.35V. It is that low-side sense gm amplifier that gives the ISL86 the proprietary ability to sense current all the way to V. Negative voltages on the R S or R S- are beyond the sensing voltage range of this amplifier FIGURE 7. GAIN ACCURACY vs V RS = V TO V Typical Application Circuit Figure 7 shows the basic application circuit and optional protection components for switched-load applications. For applications where the load and the power source is permanently connected, only an external sense resistor is needed. For applications where fast transients are caused by hot plugging the source or load, external protection components may be needed. The external current limiting resistor (R P ) in Figure 7 may be required to limit the peak current through the internal ESD diodes to <ma. This condition can occur in applications that experience high levels of in-rush current causing high peak voltages that can damage the internal ESD diodes. An R P resistor value of 1Ω will provide protection for a V transient with the maximum of ma flowing through the input while adding only an additional 13µV (worse case over-temperature) of V OS. Refer to Equation 3: (( R P I RS- ) = ( 1Ω 13nA) = 13μV) Switching applications can generate voltage spikes that can overdrive the amplifier input and drive the output of the amplifier into the rails, resulting in a long overload recover time. Capacitors C M and C D filter the common mode and differential voltage spikes. Error Sources There are 3 dominant error sources: gain error, input offset voltage error and Kelvin voltage error (see Figure 71). The gain error is dominated by the internal resistance matching tolerances. The remaining errors appear as sense voltage errors at the input to the amplifier. They are V OS of the amplifier and Kelvin voltage errors. If the transient protection resistor is added, an additional V OS error can result from the IxR voltage due to input bias current. The limiting resistor should only be added to the R S- input, due to the high-side gm amplifier (gm HI ) sinking several micro amps of current through the R S pin. Layout Guidelines The Kelvin Connected Sense Resistor (EQ. 3) The source of Kelvin voltage errors is illustrated in Figure 71. The resistance of 1/ Oz copper is ~1mΩ per square with a TC of ~39ppm/ C (.39%/ C). When you compare this unwanted parasitic resistance with the total 1mΩ to 1mΩ resistance of the sense resistor, it is easy to see why the sense connection must be chosen very carefully. For example, consider a maximum current of A through a.5ω sense resistor, generating a V SENSE =.1 and a full scale output voltage of 1V (G = 1). Two side contacts of only.5 square per contact puts the V SENSE input about.5 x 1mΩ away from the resistor end capacitor. If only 1A the A total current flows through the kelvin path to the resistor, you get an error voltage of 1mV (1A x.5sq x.1ω/sq. = 1mV) added to the 1mV sense voltage for a sense voltage error of 1% (.11V-.1)/.1V) x 1. NON-UNIFORM Non-uniform CURRENT Current Flow FLOW CURRENT Current InIN CURRENT Current SENSE Sense Resistor RESISTOR 1mΩ 1 to TO 1mO 1mΩ 1/ Copper Oz COPPER Trace TRACE 3mO/Sq. 1mΩ /SQ CURRENT Current Out KELVIN V S CONTACTS Kelvin V S Contacts PC BOARD Board FIGURE 71. PC BOARD CURRENT SENSE KELVIN CONNECTION 19 FN May 3, 11

20 ISL86.7VDC TO 8VDC I =.86µA R S (1mΩ TO.1Ω) C D R S gm HI FIXED GAIN OPTION ONLY R S- C M -.1VDC TO 8VDC R P 1.35V - F B ADJ OPTION ONLY gm LO LOAD FIGURE 7. TYPICAL APPLICATION CIRCUIT Overall Accuracy (V OA %) V OA is defined as the total output accuracy Referred-to-Output (RTO). The output accuracy contains all offset and gain errors, at a single output voltage. Equation 4 is used to calculate the % total output accuracy. V actual V expected V OA = (EQ. 4) V expected where V Actual = V SENSE x GAIN Example: Gain = 1, For 1mV V SENSE input we measure 1.1V. The overall accuracy (V OA ) is 1% as shown in Equation V OA = = 1% 1 Power Dissipation (EQ. 5) It is possible to exceed the 15 C maximum junction temperatures under certain load and power supply conditions. It is therefore important to calculate the maximum junction temperature (T JMAX ) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related using Equation 6: where: P DMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PD MAX ) PD MAX for each amplifier can be calculated using Equation 7: V MAX PD MAX = V S I qmax ( V S - V MAX ) (EQ. 7) R L where: T MAX = Maximum ambient temperature θ JA = Thermal resistance of the package PD MAX = Maximum power dissipation of 1 amplifier = Total supply voltage I qmax = Maximum quiescent supply current of 1 amplifier V MAX = Maximum output voltage swing of the application R L = Load resistance T JMAX = T MAX θ JA xpd (EQ. 6) MAXTOTAL FN May 3, 11

21 Revision History ISL86 The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE 4/1/11 FN Converted to new template Page 1 - Changed headings for Typical Application and Gain Accuracy vs VRS = V to 8V to Figure titles (Figures 1 and ). Page 1 - Updated Intersil Trademark statement at bottom of page 1 per directive from Legal. Page 7 - Updated over temp note in Min Max column of spec tables from "Parameters with MIN and/or MAX limits are 1% tested at, unless otherwise specified. Temperature limits established by characterization and are not production tested." to new standard "Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design." Page 19 - Figure 69, Low side current detection schematic: Moved the LOAD from the ground side of the power side circuit to the high side. 9//1 FN Added -T7A tape and reel options to Ordering Information Table for all packages. 5/1/1 FN Added Note 4 to Part Marking Column in Ordering Information on page 3. Corrected hyperlinks in Notes 1 and 3 in Ordering Information on page 3. 4/8/1 Removed Coming Soon from evaluation boards in Ordering Information on page 3. 4/7/1 Added Related Literature on page 1 Updated Package Drawing Number in the Ordering Information on page 3 for the V, 5V and 1V options from MDP38 to P5.64A. Revised package outline drawing from MDP38 to P5.64A on page 4. MDP38 package contained packages for both the 5 and 6 Ld SOT-3. MDP38 was obsoleted and the packages were separated and made into separate package outline drawings; P5.64A and P6.64A. Changes to the 5 Ld SOT-3 were to move dimensions from table onto drawing, add land pattern and add JEDEC reference number. 3/1/1 FN6548. Releasing adjustable gain option. Added adjustable block diagram (Page ), Added adjustable gain limits to electrical spec table, added Figures 47 through 6, Added 85 C curves to Figures 6 thru 14, thru 8, 34 thru 4, and Figures 48 thru 56. Modified Figure 7. /4/1 FN Page 1: Edited last sentence of paragraph. Moved order of GAIN listings from, 5, 1 to 1, 5, in the 3rd paragraph. Under Features...removed "Low Input Offset Voltage 5µV, max" Under Features... moved order of parts listing from, 5, 1 (from top to bottom) to 1, 5,. -Page 3: Removed coming soon on ISL86FH5Z and ISL86FHZ and changes the order or listing them to 1, 5,. -Page 5: VOA test. Under conditions column...deleted mv to. It now reads... Vsense = 1mV SR test. Under conditions column..deleted what was there. It now reads... Pulse on RSpin, See Figure 51 -Page 6: ts test. Removed Gain = 1 and Gain = 1V/V in both description and conditions columns respectively. -Page 9: Added VRS= 1V to Figures 16, 17, 18. -Page 11: Added VRS= 1V to Figures 3, 31, 3. -Page 13 & 14: Added VRS= 1V to Figures 44, 45, 46. -Page 14 Added Figure 51 and adjusted figure numbers to account for the added figure. -Figs 8, 6, and 4 change "HIGH SIDE" to "VRS = 1V", where RS is subscript. -Figs 9, 7, and 41 change "LOW SIDE" to "VRS =.1V", where RS is subscript. 1/14/9 FN6548. Initial Release 1 FN May 3, 11

22 Products ISL86 Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL86 To report errors or suggestions for this datasheet, please go to FITs are available from our website at For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN May 3, 11

23 ISL86 Package Outline Drawing P5.64A 5 LEAD SMALL LINE TRANSISTOR PLASTIC PACKAGE Rev, /1 A 1.9 D PIN 1 INDEX AREA.15 C D x C x (.6) B.4 ±.5 3. M C A-B D SEE DETAIL X END VIEW TOP VIEW 1 TYP ( PLCS) C x A-B H C 1.45 MAX 1.14 ±.15.1 C SEATING PLANE (.5) GAUGE PLANE SIDE VIEW ±.1 4 DETAIL "X" (.6) (1.) NOTES: (.4) 1.. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to ASME Y14.5M (.95) (1.9) TYPICAL RECOMMENDED LAND PATTERN Dimension is exclusive of mold flash, protrusions or gate burrs. Foot length is measured at reference to guage plane. This dimension is measured at Datum H. Package conforms to JEDEC MO-178AA. 3 FN May 3, 11

24 Package Outline Drawing P LEAD SMALL LINE TRANSISTOR PLASTIC PACKAGE Rev 4, /1 ISL A.95 D /-.1 3 PIN 1 INDEX AREA 1 3. C x (.6) B TOP VIEW.4 ±.1 3. M C A-B D SEE DETAIL X END VIEW.9 ± TYP ( PLCS) /-.5 C 1.45 MAX (.5) GAUGE PLANE.1 C SEATING PLANE SIDE VIEW.-.15 DETAIL "X".45±.1 4 (.95) (.6) (1.) NOTES: (.4) Dimensions are in millimeters. Dimensions in ( ) for Reference Only. Dimensioning and tolerancing conform to ASME Y14.5M Dimension is exclusive of mold flash, protrusions or gate burrs. Foot length is measured at reference to guage plane. Package conforms to JEDEC MO-178AB. TYPICAL RECOMMENDED LAND PATTERN 4 FN May 3, 11

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