Theoretical models and simulation of optoelectronic properties of a-si-h PIN photosensors

Transcription

1 Proceedigs of the 8th Iteratioal Coferece o Sesig Techology, Se. 2-4, 214, iverool, UK Theoretical models ad simulatio of otoelectroic roerties of a-si-h PIN hotosesors Wagah F. Mohammed 1, Muther N. Al-Tikriti 3, Faculty of gieerig, Philadelhia Uiversity, Amma, Jorda. 1- wagahfaljubori@yahoo.com, 3- muther_baker44@yahoo.co.uk Alha M. Aldabag 2 College of gieerig, Mosul Uiversity, Mosul, Iraq Abstract this research aims to study ad discuss the theoretical models ad simulatio of otoelectroic roerties of a-si-h PIN hotosesors based o Shockley Read-Hall assumtios. The variatio of carrier life time, recombiatio ad geeratio rates as a fuctio of the itrisic layer (I-layer) thickess will be simulated usig MATAB rogram. The effects of itrisic layer thickess o electros ad holes cocetratio, collectio efficiecy ad short circuit curret desity have bee studied ad aalyzed. It has bee foud that as the thickess icreased, the arameters: recombiatio rate, geeratio rate, iteral electric field, electros ad holes cocetratio, carriers life times, ad short circuit curret desity, were subjected to some variatios. Keywords-Silico hotosesors; PIN hotodiode; amorhous Si; otoelectroic roerties. I. INTRODUCTION Amorhous silico (a-si) has bee favored for its good characteristics comared to crystallie silico ad olysilico, such as higher absortio coefficiet, better resose i low light eviromet ad lower cost material for hotosesors. The disorder iheret i the material creates may charge defect states that imede carrier trasort. The resece of charged defects i the otically active material, which is the itrisic layer (I-layer) i the a-si:h PIN hotodiode reduces the built i electric field [1, 2] ad cosequetly icreases the local otical absortio coefficiet [3], also reduces the free carriers mea lifetime, ad decreases the resose time, while o the other had imroves the resosivity ad sesitivity. High resosivity ad sesitivity of hotosesors with low dark curret are required icreasigly for short distace otical commuicatios, otical storage systems, active ixel sesors ad imagig sesors [4, 5]. The usual way of oeratig a amorhous silico PIN diode to detect hotos is to aly a reverse bias o the diode ad to measure the sigal which is iduced by the motio of the hoto-geerated charge carriers; i.e., the radiatio-iduced iformatio is acquired by comarig the leakage curret before irradiatio ad sigal curret after irradiatio. Thus, the leakage curret limits the sesitivity of the PIN diode ad the trasiet behavior of the leakage curret is modeled by usig two differet comoets of the thermal geeratio ad the ijectio currets [6]. The mai idea is the time-deedet variatio of the electric field at iterface, which origiates from the variatio of the ioized daglig bod desity due to emissio of traed charge; this determies the behavior of the trasiet leakage curret. The bias-deedet trasiet ad steady-state behavior of dark curret i hydrogeated amorhous silico (a-si:h) PIN hotodiode have bee develoed by cosiderig the deletio of electros from the I-layer ad carrier ijectio through P I iterface. For hotodiodes that have very good juctio roerties, the high iitial dark curret decreases with time mootoously ad reaches a lateau. However, i case of oor juctios, the ijectio curret ca be the domiatig mechaism for trasiet leakage curret at relatively high biases, the dark curret decays iitially ad the rises to a steady-state value [7]. The mid-ga states eergy levels ad their satial distributio i I-layer ad at P-I iterface ca be obtaied [8, 9] from the trasiet dark curret ad steady-state thermal geeratio curret. missio of carriers from the P-I ad N-I iterface ad thermal geeratio i I-layer, which is a voltage deedet at low biases, maily cotributes to the dark curret. The otical ad electroic roerties of a-si:h PIN determie trasiet curret relevace for device alicatio. The recombiatio via daglig bods as the mai recombiatio ceters ad trasort through localized states cotributes to the trasiet curret as described [1, 2]. The ifluece of deely-traed charge o the trasiet hotocurret has bee studied by various authors usig the trasiet hotocurret method ad the costat hotocurret method [6, 7]. It is foud that the daglig bod states eergy levels distributed i rage from shallow to dee levels ad activated at low bias voltages ad visible ulses illumiatio, are resosible for the characteristic hotodiode resose shae [8]. The advatages of PIN hotodiode ad MOS structure have bee combied together to roduce lateral PIN hotosesors with maximum hotocurret ad low dark curret ad achieved high sesitivity ad resosivity with low voltage bias [9]. PIN hotodiode fabricated i CMOS rocesses [1] achieved badwidth comatible with 1 Gb/sec ad eve higher data rate [11]. This research aims to study ad aalyze the a-si-h PIN hotosesor based o Shockley-Read Hall assumtios. The variatio of carrier life time, recombiatio ad geeratio rates as a fuctio of I-layer thickess will be simulated usig MATAB rogram. The effect of I-layer thickess o electro ad holes cocetratio, collectio efficiecy ad short circuit curret desity will be discussed. II. STRUCTUR AND PHYSICA MOD The basic structure of a thi-film PIN hotodetector is show i Fig. 1. The hotodetector built of a P - -tye silico film (which is kow the itrisic- layer) ito which a P + regio 578

2 Proceedigs of the 8th Iteratioal Coferece o Sesig Techology, Se. 2-4, 214, iverool, UK ad N + regio are usually formed by io imlatatio. A ITO deosited o the to P + layer which is used as trasaret gate electrode. The silico-film thickess should be sufficietly thick to allow a large fractio of the icidet light to be absorbed. The silico-film thickess, P -, is 5 m with low carrier cocetratio of 1 14 cm 3. Thickess of the cotacts N + ad P + regios is 1 m each, with doig cocetratio of 1 18 cm 3. TAB1: PIN hotosesor arameters used i the aalysis Parameters Value M - (e+d D - ) (cm -1 v -1 ) M + (h+d D + )(cm -1 v -1 ) α i (cm -1 ) 6x1 4 µ (cm 2 /v.sec) 2 µ (cm 2 /v.sec) 4 V bi (Volts) 1.2 J o (A/cm 2 ) 1-12 η (ideality factor) d G R = J (2) e Figure 1 Schematic diagram of thi-film PIN hotodetector III. MATHMATICA MOD BASD ON SHOCKY RAD HA (SRH) ASSUMPTIONS The structure model is cosidered a sigle juctio cell with structure of glass/ito/pin/metal cotact, ad with the followig assumtios:- 1- Istead of assumig a costat geeratio rate of charge carriers through I-layer as [12], it is cosider that the geeratio rate deeds o the ositio withi I-layer. 2- For desigig a PIN tye sigle juctio device, I- layer is cosidered to be the oly active layer. 3- To calculate the carrier cocetratio, it must be assumed that the cature time at the daglig bod desities is variable. 4- All results are achieved at AM1.5 illumiatio, the wavelegth λ is selected to 4 m ad imlicitly assumed the reflectio coefficiet Ʀ=. Whe icidet light falls o the device surface (P + ), light absortio i the chael roduces electro hole airs. Pairs roduced withi the diffusio legth will evetually be searated by the electric field, leadig to curret flow i the exteral circuit. I PN reverse-biased juctio, there is drift curret uder the iteral reverse-biased electric field, directly cotributig to the exteral curret. Diffusio ad drift coexist i carrier-trasort rocesses throughout the chael. The umber of absorbed hotos that roduce electro hole airs ca be calculated [13]: = α ( ) (1) Where i umber of absorbed hotos at the itrisic layer, f( ) illumiatio itesity at AM1.5, α i (λ) the absortio coefficiet, h lak costat ad c is the light velocity. SRH assumtios suggest that recombiatio may occur by four mechaisms through the eergy ga: recombiatio with sigle level tra, recombiatio at the ed of the ga, recombiatio at the surfaces ad recombiatio at the daglig bods. Followig the above assumtios; free carrier cocetratio, the electric field across the itrisic layer, recombiatio rate, carrier life time, ca be calculated usig the arameters give i table 1 ad solvig the steady state cotiuity ad trasort equatios [12] 1 d G R = J (3) e J = eµ ( ο (4) J = eµ ( ο (5) Where: G(: geeratio rate, R(: recombiatio rate, e: electroic charge, J (: electros curret desity, J (: holes curret desity, µ : electros mobility, µ : holes mobility ad o is the iteral electric field. Usig SRH assumtios, the recombiatio rates that occur through egative ad ositive defects ca be calculated as: = [ ( ) ( ) 1 ] { + + ( ) } (6) Where ta, ta, td, td are the accetor ad door defect levels for electros ad holes resectively, C ad C are the cross sectio of otical emissio for electros ad holes resectively, ν frequecy of icidet light ad C=( σ c /σ ) where σ c ad σ are the cross sectio of otical emissio for free ad eutral charges resectively. Usig the boudary coditio x = ad x= =, qs. (2) ad (3) ca be solved aalytically to get:- 1- lectros cocetratio (() bx x bx e bx [ 1 e ] e G( 1 ( = C 2 + G() (7) µ ο µ ο 2- Holes cocetratios (() ( C 2 ( d ( = G( + µ (8) ο ο ex( b ) ex( bx ) G G ( ) = µ ο (1 ) b Where ad are drift legths give by:- = µ = µ ad o = V o / (11) = (1), ο ο (9) 579

3 Proceedigs of the 8th Iteratioal Coferece o Sesig Techology, Se. 2-4, 214, iverool, UK, : electro ad hole life times resectively, V o the built i voltage ad is I-layer thickess. ad ca be calculated [14] as a fuctio of the defect desity: N d =(M/µ). Where: M is costat arameter give i table 1 for egative ad ositive charge defects. Figure 2 shows the simulatio result of carrier cocetratios as a fuctio of I-layer thickess. From figure 2-a ; it is clear that there is o electros accumulatio at P + -I iterface, while they accumulate at the N + -I iterface (more tha 1 16 cm -3 ) which yields high charge gradiet. This charge gradiet will setu diffusio curret that is balaced by drift curret build u by the field gradiet. The holes accumulatio (figure 2-b) is ot liear. It falls dow to zero at 4 m legth due to recombiatio. The differece betwee electros ad holes cocetratios comes from the dissimilarity of amorhous silico. level. Figure 4 shows the recombiatio rates as a fuctio of distace as the same coditios give before. Most of the recombiatio haes ear P + -I ad N + -I iterfaces where the holes ad electros cocetratios are maximum. Maximum loss of hotogeerated carriers haes there. Figure 3: Variatio of electric field with thickess. Figure 2: Variatio Carriers cocetratio with thickess: a- lectros b- Holes Figure 3 shows the electric field itesity as a fuctio of distace through I-layer. The iteral electric field itesity is high at iterfaces (>1 5 V/cm) due to high sace charge desities at these regios. Icreasig the electric field itesity will ehace the drift curret at the iterfaces. O the other had icreasig the drift curret will cause the diffusio curret to be icreased, the total curret will be costat. The miimum electric field falls dow less tha 1 4 V/cm at 4m legth; this is called the critical electric field ( c ) ad ca be calculated as: c = (KT/q ) ad defied as the miimum electric field that ehace the drift curret. Most of the defect states ca be foud at the bottom of the eergy ga. For this reaso the diffusio curret of holes is less tha of electros. The iitial recombiatio rocess occurs from electros defect levels to holes defect levels ear Fermi Figure 4: variatio of recombiatio rate with thickess Kowig the recombiatio rates ad the carriers cocetratios, the carriers life times ca be calculated as: =(/R( ad =(/R(. It has bee cosidered before [15] that the carrier life time is costat, but It has bee roved i this research that the carriers life times are variable ad are a fuctio of device thickess as show i figure 5. It is oticed that at the doed layers (P + ad N + ) the majority carriers have log life times while the miority carriers have a very short life times. Due to the dissimilarity of amorhous silico the variatio of carriers life times are differet. The life times of holes carriers is almost costat, while life times of electros carriers varies almost liearly with distace. Figure 6 shows the variatio of simulated hotogeerated short circuit curret desity with distace. The hotogeerated curret desity icreases as the distace icreases ad saturated at maximum value (18 ma / cm 2 ) startig at 5 m. The light is alied from the P + side whe the miority carriers are the electros that move to the other side where there are o holes carriers that cause the hotogeerated curret to be costat ad maximum. The collectio efficiecy (χ) of a PIN hotodiode is defied as the ratio of the umber of charge carriers cotributed from the hotovoltaic curret to the total umber of hotogeerated charge carriers. The collectio efficiecy 58

4 Proceedigs of the 8th Iteratioal Coferece o Sesig Techology, Se. 2-4, 214, iverool, UK lays a imortat role i the PIN hotodiode erformace ad it is calculated as followed [15]. χ { G R } = G (12) whe the defect desity is icreased articularly whe the layer thickess is less tha 15 m. Where, : is the distace iside the I- layer ad ( ( R = + (13) Figure 7: Collectio efficiecy (χ) as a fuctio of I-layer thickess for five differet defect desities. life times with thickess: a- lectros, b- Holes Figure 5: Variatios of carriers IV. CONCUSIONS The disorder iheret i amorhous silico creates may charge defect states that imede carrier trasort. It is foud that the daglig bod states eergy levels distributed i a rage from shallow to dee levels are resosible for characteristic hotodiode resose shae. Shockley-Read-Hall assumtios were emloyed to derive a mathematical model for a-si-h PIN hotodiode sesors. The mathematical model was formulated aalytically usig MATAB comuter rogram ad foud that: 1- The cocetratio of hotogeerated electros ad its life times icreased as I-layer thickess icreased. The cocetratio of hotogeerated holes gradually decreased to miimum at thickess 4 m while the life times remaied almost costat over a wide rage of I-layer thickess. 2- The recombiatio rates decreased as the thickess icreased ad exhibited miimum value for thickess aroud 425 m. 3- The simulated hotogeerated short circuit curret desity icreased as the thickess icreased ad it is saturated beyod 5 m. 4- The collectio efficiecy decreased as the I-layer thickess icreased articularly whe the layer thickess is less tha 15 m. The decrease is a fuctio of the defect desity ad is steeer at higher values of the defect desity. Figure 6: Variatio of curret desity with thickess The collectio efficiecy has bee calculated as a fuctio of I-layer thickess for differet values of defect desity (N d ) usig equatio (12), as show i figure 7. It is clear that as the I-layer thickess icreased the collectio efficiecy decreased. It ca be oticed that the decrease i the efficiecy is steeer with higher values of N d. This ca be exlaied that the reductio i the collectio efficiecy becomes more coutable RFRNCS [1] W. Fuhs Recombiatio ad trasort through localized states i hydrogeated amorhous ad microcrystallie silico J. No-Cryst. Solids, Vol. 354, 28, [2] S.R. Dhariwal, M. Smirty O the sesitivity of oecircuit voltage ad fill factor o daglig bod desity ad Fermi level ositio i amorhous silico -i- solar cell Sol. ergy Mater. Sol. Cells, Vol. 9, 26, [3]. A. Schiff, H. T. Grah, R. I. Devle, J. Tauc, S. Guha Picosecod hotocarrier trasort i hydrogeated 581

5 Proceedigs of the 8th Iteratioal Coferece o Sesig Techology, Se. 2-4, 214, iverool, UK amorhous-silico PIN diodes I Tras. lectro Devices, Vol. D-36, 1989, [4] G.F. Della Betta, S. Rochi, A. Zoboli, N. Zorzi Higherformace PIN hotodiodes o TMAH thied silico wafers Microelectroics J. Vol. 39, 28, [5] S.M. Csutak, J.D. Schaub, W.. Wu, J.C. Cambell Highseed moolithically itegrated silico receiver fabricated i 13 m CMOS techology I Photoics Techol. ett. 14, 22, [6] H. J. Kim ad G. Cho Aalysis of the trasiet leakage curret of a a-si:h PIN diode Joural of the Korea Physical Society, Vol. 4, No. 5, 22, [7] S. A. Mahmood ad M. Z. Kabir Modelig of trasiet ad steady-state dark curret i amorhous silico PIN hotodiodes Curret Alied Physics, Vol. 9(6), 29, [8] R.V.R. Murthy, V. Dutta Uderlyig reverse curret mechaisms i a-si: H +-i-+ solar cell ad comact SPIC modelig J. No-Cryst. Solids, Vol. 354, 28, [9] W. F. Mohammed, M. M. Ali, M. N. Al-Tikriti, K. Kaleel The effects of MOS layers o sesig roerties of MOS hotosesor Iteratioal Joural o Smart Sesig ad Itelliget Systems, Vol. 6, No.3, 213,.112. [1] V. Gradišik Characterizatio of a-si:h P-I-N hotodiode resose J. of Microelectroics, lectroic Comoets ad Materials, Vol. 42, No. 1, 212, [11] Guoli i, Yu Zeg, Wei Hu ad Yu Xia Aalysis ad simulatio for curret voltage models of thi-film gated SOI lateral PIN hotodetectors Otik, Vol. 125 (1), 214, [12] M. Hack & M. Shur Physics of amorhous silico alloy PIN solar cell J. Al. Phys, Vol. 58(2), [13] S. Cuha & A. Baerjee, Amorhous silico alloy hotovoltaic research reset ad future Program Photovoltaic Res. Al., Vol. 8, 2, [14] W. F. Mohammad, M. Hammodi ad M. N. Al-Tikriti Simulatio of hotogeerated curret of PN silico hotodetector ehaced by imurity hotovoltaic effect Reewable ad Sustaiable ergy Reviews, Vol. 26, 213, [15] P. Stulik ad J. Sigh Calculatio of collectio efficiecy for amorhous silico solar cells J. of o- Crystallie Solids, Vol. 242, 1998,