In Situ Observation of Voltage-Induced Multilevel Resistive Switching in Solid Electrolyte Memory

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1 In Situ Observation of Voltage-Induced Multilevel Resistive Switching in Solid Electrolyte Memory Sang-Jun Choi, Gyeong-Su Park, Ki-Hong Kim, Soohaeng Cho, Woo-Young Yang, Xiang-Shu Li, Jung-Hwan Moon, Kyung-Jin Lee, * and Kinam Kim Traditional charge-based memory technologies are approaching miniaturization limits as it becomes increasingly difficult to reliably retain sufficient electrons in shrinking cells. [ 1 ] The capability of storing multi-bit information in a memory element without sacrificing scalability is one of the most important criteria that emerging memory technologies should fulfill. Resistive switching memories utilizing resistance change rather than charge storage have attracted considerable attention as potential alternatives to traditional charge-based memories. The phenomenon of resistive switching is based on the electrically induced change in the resistance state, observed in a variety of metal insulator metal structures. [ 1 21 ] Various resistive memories including solid electrolyte memories have displayed the capability of multilevel switching. [ 2 9 ] In spite of the great potential, however, the development of such devices has been delayed, largely because of the incomplete understanding of the switching mechanism and the physical structure for securing multilevel operation in nanometer-scale memory devices. Furthermore, the architectural innovation based on the switching property and fabrication process of each memory cell is required in order to overcome the limitations of conventional (FLASH) and other types of memory systems (PRAM (Phase-Change Random Access Memory), [ 22 ] MRAM (Magnetic Random Access Memory) [ 23 ] ) Here, we report in situ observation of voltage-induced changes in the microstructure of a solid electrolyte memory, revealing that the multilevel switching originates from the growth of multiple conducting filaments with nanometer-sized diameter and spacing. Furthermore, we show that the main factor to determine the switching polarity is not electrode asymmetry but the non-uniform distribution of metal J.-H. Moon, Prof. K.-J. Lee Department of Materials Science and Engineering Korea University Seoul , Korea kj_lee@korea.ac.kr Dr. S.-J. Choi Samsung Electronics Co Gyeonggi , Korea Dr. G.-S. Park, Dr. K.-H. Kim, Dr. W.-Y. Yang, X.-S. Li, Dr. K. Kim Samsung Advanced Institute of Science and Technology Gyeonggi , Korea Prof. S. Cho Department of Physics Yonsei University Wonju, Gangwon , Korea DOI: /adma atoms in the insulating layer. Finally we propose a novel threedimensional device architecture, which allows us to further increase the information density. Our results demonstrate that a multi-bit resistive memory with excellent scalability is achievable, and will serve as important guidelines for establishing a complete understanding of the switching mechanism. The mechanism of resistive switching is the subject of great current interest. [ 5, 6, 10, 21, 24, 25 ] The most plausible mechanism for solid electrolyte memories is related to filament formation and annihilation. [ 5, 6 ] In most cases, however, the filamentary mechanism has been investigated on the basis of indirect lines of evidence such as current voltage ( I V ) characteristics because of the difficulty in visualizing the physical changes in the extremely small active regions of the devices. Recently, a few studies to unveil the filamentary nature using transmission electron microscopy (TEM) have been reported. [ 21, 26, 27 ] These studies focused on two-level switching and thus performed ex situ measurements before and after voltage application. To understand the mechanism of multilevel switching, however, in situ TEM measurements at various voltages are essential since not only the lowest/highest resistance states but also intermediate states should be addressed at the same position of the device. Furthermore, it can provide answers to elusive questions such as whether a dominant single filament or multiple filaments are responsible for multilevel switching, how the filaments are developed as voltage increases, what the size of a filament and the spacing between them are, and what determines switching polarity. All these questions are of critical importance for elucidating the switching mechanism and estimating the scaling limit. In this work, we used a solid electrolyte memory composed of Cu-doped GeTe sandwiched between a Cu bottom electrode (BE) and a top electrode (TE, made of W, PtIr, Pt, or Cu). The layer structure was Si/SiO 2 /Ti (10 nm)/cu (40 nm)/ GeTe (100 nm)/te. During deposition of the GeTe layer, a large positive bias was applied to the BE to achieve a high level of Cu-doping in this layer (see Experimental Section). Using our fabrication method, no additional electroforming process is required since the voltage-assisted deposition process is a kind of electroforming process that incorporates mobile metal cations in the insulating matrix. This absence of additional electroforming process makes in situ TEM measurements easier because a typical current level of in situ measurements is too small ( nanoampere, see Figure 1b) to set the compliance that is essential to prevent the junction breakdown in conventional electroforming processes. Figure 2 a shows a Z -contrast scanning TEM (STEM) image for the Cu-GeTe layer, revealing that 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim wileyonlinelibrary.com 1

2 Figure 1. In situ measurements of voltage-induced changes in microstructure. a) Schematic to show the in situ experimental set-up. b) In situ I V scan. c,d,e,f) Cross-sectional STEM images obtained after voltage applications of 0, 0.4, 0.8, and V, respectively. g,h,i,j) Black-and-white images converted from the raw STEM images of (c), (d), (e), and (f), respectively. The bright region in the bottom Cu electrode is attributable to not only the crystal structure of a Cu grain unlike the Cu atoms in GeTe layer, but also to the diffusion of Ge atoms into the bottom electrode during the deposition. The Ge diffusion was confi rmed by EDS analysis (not shown). the voltage-assisted deposition generates a compositional gradient of Cu. The Cu-GeTe layer shows brighter contrast than the Cu layer because the image intensity in this mode is proportional to Z 1.7 where Z is the atomic number of the species. The darker contrast at the top region compared to the bottom region indicates that during GeTe deposition, Cu cations dissolve from the Cu electrode and drift because of the large bias; thus more Cu atoms are present on the layer surface (top region). Energy dispersive X-ray spectroscopy (EDS) intensity profiles also confirm the non-uniform distribution of Cu ( Figure 2b). Our samples exhibit stable bipolar switching ( Figure 2c), and successful multi-bit operation ( Figure 2d). Note that for all electrical measurements, BE was grounded, and a voltage was applied to the TE. To understand switching behaviors, we performed in situ cross-sectional TEM measurements at various voltages and measured the corresponding I V characteristics. For the in situ measurements, a PtIr tip was used as the TE, operated inside the TEM ( Figure 1a, see Experimental Section). This technique allows the investigation of voltage-induced changes in the microstructure as well as corresponding changes in resistance at the same position. Figure 1b shows an in situ I V scan. Starting from the high resistance state, we applied a negative voltage of up to 0.8 V in 0.1 V steps, and then applied a positive voltage of V. Cross-sectional Z -contrast STEM images were obtained after each voltage application (Figures 1 c f). To clearly observe the voltage-induced change of Cu density in the Cu-GeTe layer, the raw STEM images (Figures 1 c f) were converted into black-and-white images (Figures 1 g j) (see Supporting Information). At zero voltage, some dark regions (high Cu-content regions) are observed near the TE, but there is no clear filament that vertically connects the top and bottom regions in the Cu-GeTe layer ( Figure 1g). After applying 0.4 V, the dark regions vertically elongate, resulting in the formation of multiple filaments ( Figure 1h). After applying 0.8 V, the multiple filaments become strengthened ( Figure 1i). Subsequent application of a positive voltage annihilates the filaments ( Figure 1j). These in situ results were reproduced in other samples (see Supporting Information). We also investigated the detailed structure of the Cu-GeTe layer by acquiring high-resolution TEM (HR-TEM) images at the regions of A and B, indicated by boxes 2 wileyonlinelibrary.com 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

3 Figure 2. Multilevel resistive switching and electroforming process. a) Cross-sectional STEM image of Cu/Cu-GeTe. Corresponding TEM image is shown in the inset. b) EDS profi les for the compositions of three elements as a function of the distance along the arrow in Figure 1a. c) Typical I V curves of Cu/Cu-GeTe/W. The size of the electrode is 2 2 μm 2. Arrows indicate the voltage-sweep directions. d) Typical multi-bit data of Cu/Cu-GeTe/W (reading voltage 0.2 V). The four current levels shown in (d) were set by applying input voltages of V, 2.0 V, 2.4 V, and 3.0 V, respectively. The pulse-width of the input voltages was 200 ns. in Figure 1c ( Figure 3 ). Before voltage application, the microstructure is either an amorphous (Figure 3 a) or a crystalline structure (Figure 3 b). After voltage application, however, the microstructures in the tested regions become amorphous structures (Figures 3 c and d), indicating that the atoms indeed move by voltage application. EDS analysis was also performed at the region A close to the BE (Figure 3 e). The ratio of Cu content to Te content increases with increasing the negative voltage, but returns to the value at V = 0 V upon application of V. This is consistent with the STEM observation (Figure 1 ) where the multiple filaments reach the Cu BE at V = 0.8 V but disappear at V = +0.4 V. The voltage-induced changes in microstructure are in good agreement with the in situ I V curve; the current level increases as the total area of filaments increases, suggesting that the filaments serve as conducting paths. These in situ measurements allow four issues to be addressed successfully. Firstly, the multilevel switching is governed by the formation of multiple nanofilaments at negative voltages. The dia meter of a filament is less than 5 nm and the spacing between them is about 20 nm. It is instructive to compare the spacing in a Cu-GeTe solid electrolyte memory (20 nm) to that in a TiO 2 oxide memory (0.1 5 μm). [ 21 ] These nanometer-spaced multiple filaments demonstrate Figure 3. HR-TEM images and EDS analysis. HR-TEM images were obtained at the regions A and B, indicated by boxes in Figure 1c. a) HR-TEM image of region A at V = 0 V. b) HR-TEM image of region B at V = 0 V. c) HR-TEM image of region A at V = 0.8 V. d) HR-TEM image of region B at V = 0.8 V. Insets are the fast Fourier transformation patterns corresponding to the HR-TEM images. e) EDS analysis at region A. The vertical axis is the ratio of the Cu content to the Te content WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim wileyonlinelibrary.com 3

4 Figure 4. Switching-back phenomena in the Cu/Cu-GeTe/Cu structure. a) I V curves of the Cu/Cu-GeTe/Cu structure. b) Switching-back in the Cu/Cu-GeTe/Cu structure. In (a) and (b) the size of the electrode is 2 2 μm2. that the Cu-GeTe solid electrolyte memories can have excellent scalability in addition to the capability of multi-bit information since the spacing between conducting filaments is an estimate of the scaling limit. Secondly, the reduction in the resistance originates from the strengthening of already formed multiple filaments without additional formation of new filaments ( Figure 1i, see also Figures S1g and h in the Supporting Information). This is also supported by the fact that the current level at negative voltages varies continuously, not abruptly ( Figure 2c). This continuous change in the resistance could be advantageous to reproducible multi-bit operations. Thirdly, when applying negative voltages, the filaments grow from the TE to the BE, consistent with a redox mechanism, [ 5, 6 ] i.e., i) the oxidation reaction (Cu Cu e ) occurs on the side of the BE, ii) Cu cations migrate toward the TE, iii) the reduction reaction (Cu e Cu) occurs on the surface of the TE, and iv) Cufilaments grow from the TE to the BE. Fourthly, when applying a positive voltage, the filaments abruptly disappear, consistent with the abrupt change in the current level at a positive voltage. It means that although the reduction reaction occurs on the surface of the Cu BE at positive voltages, it cannot cause the formation of filaments. It implies that the Cu contents near the BE are insufficient to nucleate the filaments at positive voltages. This could result from one of the following two reasons, related to the question of what the source of Cu atoms for the nucleation of filaments is. One is that a TE made of an inert element cannot supply Cu cations at positive voltages. The other is that the nucleation of filaments near the BE is suppressed because of the initially Cu-deficient state near the BE, which is provided by our electroforming process, the voltage-assisted deposition process. To answer this question, we performed I V measurements for a Cu/Cu-GeTe/Cu structure and observed successful bipolar switching ( Figure 4a). Note that the switching polarity is the same regardless of electrode asymmetry (Figures 2 c and 4a). This demonstrates that the main factor to determine the switching polarity in our samples is not electrode asymmetry, but the non-uniform distribution of Cu content. We remark, however, that repeated switchings in Cu/Cu-GeTe/ Cu are obtained only when the maximum positive voltage is restricted below a certain threshold. When the positive voltage exceeds this threshold, the system switches back to the lowresistance state (Figure 4 b). Once this switching-back occurs, the low-resistance state is constantly maintained. Note that switching-back is not observed in the Cu/Cu-GeTe/W (or Pt) structure. A plausible explanation for the switching-back in the Cu/Cu-GeTe/Cu structure is that the Cu TE can also supply Cu cations at positive voltages. In contrast, in the Cu/Cu-GeTe/W (or Pt) structure, the switching-back at positive voltages cannot occur because the W (or Pt) TE is unable to supply Cu cations. Thus, electrode asymmetry substantially affects the switchingback phenomenon. This result suggests that for device applications, inert elements such as W or Pt should be used as an electrode at one side to avoid the switching-back phenomenon that shrinks the window of write voltage. Finally we propose a novel device architecture for further enhancing the memory density. The proposed device is composed of a common Cu BE, a CuGeTe switching layer, and multiple separate TEs. The input pulse is applied through the BE and one of the multiple TEs is selectively grounded when the device below the selected TE is operated ( Figure 5 a, in this example, only three TEs were implemented). This structure enhances the storage density by a factor of three, only by employing separate TEs because the solid electrolyte device can be independently operated by each electrode without any crosstalk. The experimental demonstration shown in Figure 5 a confirms that the suggested device can store the information separately at each TE. As each TE produces four different resistance states (2 bit), the tripled storage capacity (2 bits to 6 bits) can be achieved in the demonstrated structure with three TEs. Figure 5 b represents the implementable architecture using the concept of the proposed device. In comparison to the traditional device which is accessed by row ( X ) and column ( Y ), our device is accessed by X, Y, and an additional Z axes. Such a vertical structure has been adopted for ultra high density NAND ( Not AND ) flash memory. [ 33 ] In this structure, the storage density can be multiplied by the number of electrode divisions in the Z -axis, achieving three-dimensionality. The proposed architecture provides a solution to achieve enhanced storage density of a memory system in terms of multi-bit information storage and fabrication process. Figure 5. a) 6-bit demonstration by separating TEs with a common bottom Cu electrode and solid electrolyte in a solid electrolyte device. b) The proposed three-dimensional memory device, accessed by X, Y, and an additional Z axes. The storage density can be multiplied by the number of electrode division in the Z-axis. 4 wileyonlinelibrary.com 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

5 To conclude, the development of a memory system capable of storing multi-bit information requires the understanding of the switching mechanism at the microscopic level, the achievement of sustainable multi-bit operation, and new device architecture for further enhancing the information density. We directly observed the evolution of atomic conducting paths by in situ TEM, which allows us to clarify the mechanism of the voltage-induced multi-level resistive switching. We revealed that the multi-level resistive switching originates from the growth of multiple conducting nanofilaments. We also found that the main factor to determine the switching polarity is not electrode asymmetry but the non-uniform distribution of metal atoms in the insulating layer. Furthermore, we proposed a novel device architecture to further enhance the information density, providing a way to increase the information density in addition to the multi-bit capability. Thus, our result demonstrates that multi-bit operation with excellent scalability is achievable in solid electrolyte resistive switching memories. This capability should be useful to continue to increase information density because the miniaturization of a memory element will eventually reach physical limits. We end by noting that the multi-bit resistive memories and the proposed device architecture could potentially find use in not only high-density non-volatile memories but also artificial neural networks by mimicking the synaptic operations of the brain. [ ] To further extend the application area of multi-bit resistive memories, a more thorough understanding about how to precisely control the formation and annihilation of nanofilaments should be obtained. installed on a TEM holder serving as a manipulator. The integrity of the contact was constantly monitored during the I V measurement. All in situ experiments were carried out using a PtIr tip. Results shown in the main text were obtained for samples where the PtIr tip was directly placed in contact with the Cu-GeTe layer. To check for potential damage to specimens caused by direct contact, the same in situ experiments were performed for samples where a Pt layer was deposited on top of the Cu-GeTe layer and the tip was placed in contact with the Pt layer. However, it was found that this did not cause any meaningful differences from the observations reported in the main text. The in situ crosssectional STEM images were obtained immediately after measuring a current value with applying a voltage bias for 100 ms. An external voltage was not applied during the STEM observation. The EDS line profi le was obtained at 24 points in sequence with 10 s acquisition time for each point and with a beam probe size of 2 nm. Minimal in situ EDS measurements were performed to avoid possible sample damage that could affect the in situ TEM images. Supporting Information Supporting Information is available from Wiley Online Library or from the author. Acknowledgements S.-J.C. and G.-S.P. contributed equally to this work. K.J.L. acknowledges fi nancial support from the National Research Foundation of Korea (NRF) grant funded by the Korea government (MEST) (Contract No ). Received: February 8, 2011 Published online: Experimental Section Sample Preparation : As the BE, Ti (10 nm)/cu (40 nm) layers were deposited on a silicon substrate covered with a SiO 2 (100 nm) layer; subsequently, a pure GeTe (100 nm) layer was deposited by radiofrequency (rf) sputtering. After deposition of a Cu BE, the edge of the wafer was contacted with a metal ring where the voltage bias could be applied. During the deposition of the GeTe layer on the Cu layer, a direct current (DC) of + 50 V was applied between the metal ring and the metal shield around the sputtering target in addition to rf bias. The objective of applying a positive bias on the substrate was to induce the drift of Cu atoms into the GeTe layer during the deposition process. Compared to other doping methods (e.g., heat treatment or use of solid electrolyte sputtering of target mixed with copper or silver), our voltage-assisted deposition method is an innovative method for doping Cu elements into solid electrolytes. Cu doping by voltage application can provide a solution for compatibility with complementary metal oxide semiconductor (CMOS) processes. This is because a Cu element is non-volatile in the dry-etching and chemical vapor deposition (CVD) process, which makes it diffi cult to apply conventional solid electrolytes to semiconductor processes. This problem could be resolved by adopting the method proposed here. For example, the patterned Cu BE was formed by a damascene process, and then another patterned trench was formed on top of the Cu electrode. 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