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1 Pilsung B Taegyun Fathur B fif Hari Gary Dhika B pril B Mulya B Yusuf B nin Rizka B Dion B Siska B Mirel B Hani B irita B
2 Digital Switch Course umber : TTH CLO : Week : 9
3 Inside the Digital Local Exchange MDF subscriber line termination unit MUX analog trunk digital trunk digital line termination unit (DLTU) subscriber concentrator switch block analog trunk termination unit CS CCS DDF DLTU DLTU DLTU DLTU group switch block switch block control switch block control exchange control system Subscriber Concentrator Unit Group Switch Unit
4 Exchange Control System Consists of CPU and Memory, to control relay switch CPU could be: Distributed Control Vertical Decomposition Horizontal Decomposition Centralized Control Standby Mode Synchronous Duplex Mode Load Sharing Mode
5 Digital Switch Cascading Switch and Blocking Probability
6 Cascading Switch Frame... highway IPUT highway highway n OUTPUT Requirements: Digital Traffic, where information from user has a dedicated slot and frame Switching, exchange the content between one time slot to another Examples: EWSD (Electronic Wahler System Digital), EX-6E (ipon Electronic utomatic Exchange), 5-ESS (Electronic Switching System) IST (International Switching and Transmission) standard: umber of frame in a S (Switching etwork) umber of time slot in a frame = (PCM 0) TS 0 TS TS k
7 Digital Switch Time Switch T time switching T T(n) B TB TB T T (n+) = TB (n) TB (n+) = T (n) TB TB T TB(n) T(n+) TB(n+) For comparison: nalog Switch Space Switch B
8 Time Switch and Space Switch F F TB T TB T B B FB FB Time Switch Exchange TS in the same frame Space Switch Exchange same-number TS but in different frame In small S (<) we use single stage time switch (T) or space switch (S) In large S (>) we use multistage Switching, for example: stages STS or TST 5 stage STSTS or TSTST Larger S = more stages = faster switching rate
9 Space Switch Outlet Bus crosspoint ddress = timeslot: ddress = TS ddress = TS Word length = S cross point in column + Word Length = n + = log n bit Inlet Bus. address bus How it works? CM contain address for selected cross point Switching Control reads each CM based on address sequence While TS is closed, address in st CM determines which cross point is O Process next CM, if last CM found, go back to st CM.... connection memories w w w w address=ts/frame
10 Space Switch Explained 8 bit PCM word 4 B C C 4 C 8 bit PCM word 4 B 4 C B B t4 t t t & & & Periode s B 4 B B B & & & C 4 C C C t4 t t t Periode s & & & connection memory connection memory connection memory Control ddress (number of incoming highway)
11 Time Switch Space (highway) unchanged Timeslot change create delay PCM Frame T (TS ) R (TS ) 5 TS Delay (-8) + = 7 TS delay (TS ) 5 (TS 8) (TS 8) (TS 8) BR (TS 8) BT 7 (TS )
12 write read write read write read write read Time Switch Speech Memory ts : 4 B C D Cell content Cell address ts : 4 D C B D Frame C B 4 write address read address (TS) Counter (TS) (TS) cyclic time slot Frame acyclic (TS4) Speech Memory (SM) Connection Memory (CM) Counter : stores content of TS : controls read sequence from SM : control write sequence into SM
13 Time Switch Explained Speech Memory t t Cyclic Writing cyclic Reading Speech Memori t t 4 Highway incoming 8 bit PCM world 8 bit PCM world Speech 4 Memori 4 t4 t t t Periode s timeslot incoming t Speech Memori t t 4 t t t Periode s timeslot outgoing Highway outgoing t 4 t 4 control memory Speech Memori 4 t t t t 4 4 Control ddress (location of Speech Memory)
14 Matrix Switch Basic element of matrix switch is the switch x M switch is a switch with input and M output Single stage matrix switch is the most simple switch but with several drawbacks: o o o Inefficient cross point usage (number of cross points is very large) Capacitive load is big Each cross point dedicated for specific connection, a failure on that cross point means no connection can be made available To overcome this weaknesses, we use multi stage switching network 4 5 a. Triangular Matrix X ( ) 4 5 X ( ) b. Square Matrix c. Full interconnection crosspoint X x
15 Multi Stage Switch /n array n.k k array /n./n /n array k.n Multi stage switch has blocking probability due to the shared cross points To provide lower blocking probability, numbers of matrix in center stage play significant role: inlet n.k /n./n k.n outlet k n k ( n ) ( n ) n (min.) n.k /n./n k.n Replacing k in (): X X n n k k n k k k n X = total number of cross points = number of inlet/outlet n = size of every switch block inlet/outlet k = number of center stage n n n () (n ) (n ) n X () / d X 0 dn x n () () () umber of minimum cross point : 4( )
16 Cross Point Calculation Example Switching etwork has inlet and outlet group of 00 lines, number of inlet and outlet of 000, with 0 matrix for center stage Calculate the number of matrix in single stage and in stages From above information, we have: n = 00 = 000 k = 0 00 Full Connection Matrix X Triangular Matrix ( - )/ Square Matrix (-) x = x x = (-)/ x = (-) = 0 x 0 = 0 (0 -)/ = 0 (0 -) = 0 6 cp = 499,5 x 0 cp = 949 x 0 cp 00 x 0 0 x 0 0 x X k k n x 0 0 x = ( x 0 x 0)+ 0 (0 /0 ) = x 0 cp x 0 0 x 0 0 x 00 00
17 See you on next class
18 Time Switch and Space Switch F F TB T TB T B B FB FB Time Switch Exchange TS in the same frame Space Switch Exchange same-number TS but in different frame In small S (<) we use single stage time switch (T) or space switch (S) In large S (>) we use multistage Switching, for example: stages STS or TST 5 stage STSTS or TSTST Larger S = more stages = faster switching rate
19 Digital Switch Properties Single stage space switch has blocking probability Single stage (fast) time switch has blocking probability There is a possibility to create time switch with nonblocking interconnectivity but with large capacity (memory and channel) To provide low blocking probability switch, we can combine time switch and space switch
20 Time Switch Space Switch (T-S) SM- 45 B Switch Block of T-S 45 CM- 0 CM- 0 CM- SM- 0 SM- 45 B B Left figure explains interconnection from /ts 0 to B/ts 45 In T-S block Time Switch acts as the input for every Space Switch line Time Switch switches an incoming time slot to an outgoing time slot Space Switch switches an incoming bus to an outgoing bus This structure still has a blocking probability, due to the space switch CM-B CM-B CM-B
21 Space Switch - Time Switch (S-T) 0 SM-B 0 45 CM-B B Switch Block of S-T 0 SM-B SM-B 0 CM-B CM-B 45 B B Left figure explains interconnection from /ts 0 to B/ts 45 This S-T switch block has the same characteristics with T-S, only differ the placement of Time Switch at the output bus CM CM- CM-
22 Time Switch Space Switch (T-S) Explained Incoming higjways (n bit/s) Multiplexer cyclic write in Data memory (content/memory location) t 8 bit PCM world t B t6 t C t5 4 4 n bit/s 4 n bit/s D 4 D 4 D 4 D t4 t0 t5 5 t B 4 B B B 8 bit PCM world t6 B 6 t7 t7 C 7 t9 8 bit PCM world C 4 B C t8 D 8 t4 t9 9 t C 4 C C C t0 B 0 t4 C D C t C t Periode s t D t Periode s D 4 D D D t 4 t B B 4 B t4 B4 4 t5 t5 C4 5 t8 Periode s t6 D4 6 t Periode s t6 rbitiary controled read-out Control memory Demultiplexer Outgoing higjways (n bit/s) t t4 t5 t t9 t0 t t t5 t6 t7 t8 6 5 t t t t4 6 8 Control address (no of data memory)
23 S-T-S 0 B SM-B B 45 C CM-B B SM-B 0 B SM-B 0 CM-B CM-B 0 45 B B 45 C C CM- CM CM-C CM-C CM- CM-C bove figure explains interconnection from /TS0 to C/TS45
24 T-S-T 0 SM- SM- SM- 0 CM- 4 0 CM- 4 CM- 4 SM- C SM- C SM- C CM- C 45 CM- C CM- C 4 C C C 4 00 CM- B CM- B CM- B bove figure explains interconnection from /TS0 to C/TS45.
25 Comparison Single stage Space (S) switch is inapplicable due to its high blocking probability Single stage Time (T) switch may be used as non-blocking switch block with low capacity (50 lines) T-S or S-T configuration may be used in small to medium capacity, due to its blocking probability increases with the Time Switch size The size of Space Switch increases in square function with the number of input/output bus, while the size of time switch increases in linear with the increment of time slot number For exchanges with large capacity, we may use from SSTSS, TSST, to TSSST configuration
26 See you on next class
Pilsung B Taegyun Fathur B fif Hari Gary Dhika B pril B Mulya B Yusuf B nin Rizka B Dion B Siska B Mirel B Hani B irita B Blocking Probability Course Number : TTH CLO : Week : 9 ext Time Switch and Space
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