Electrical and Reliability Characteristics of RRAM for Cross-point Memory Applications. Hyunsang Hwang

Transcription

1 Electrical and Reliability Characteristics of RRAM for Cross-point Memory Applications Hyunsang Hwang Dept. of Materials Science and Engineering Gwangju Institute of Science and Technology (GIST), KOREA 1

2 Outline Introduction Filament type local switching device Uniform resistive switching device Summary 2

3 Requirements of future NVM device (1) 저항 New 변화 ReRAM 메모리 material 소재개발 (2) 스위칭메커니즘분석 (2) Switching mechanism R-Uniformity On/Off Ratio (>10) Limit of FLASH # of e - in FG Retention: T ox Coupling Energy efficiency (Reset : <100uA Voltage_ set,reset <3.0V) ReRAM Reliability (Retention: 85 10year Endurance : >10 pulse ) (3) (3) Scaling Solution limit 해결방안 for scaling 제시limit CMOS Compatibility Read: ~1uA, ~1V J>10 6 A/cm 2 Scalability: <10nm IEDM 2010: 1/3 MT papers are RRAM High density memory 4F 2, Cross-point MLC, R-uniformity 3-D stackable (1D/1R) 3

4 Switching Mechanisms Fuse/Anti fuse memory switching 1) Ionic conduction or solidelectrolyte based switching 2) Electronic phenomena based switching 3) Resistance switching Memory device 1) R. Waser et al, Nature Mat. 6, 833 (2007). 2) T. Sakamoto. et al, IEDM05, 475 (2005). 3) K. Szot, et al, Nature Mat. 5, 320 (2006). 4 On/Off switching upon forming and rupture of filament Unipolar, localized switching Disadvantages: Variable Set/Reset voltage Non uniformity An electrolyte source R change due to metal/o ion movement Disadvantages: Data retention Non uniformity Very low voltage Electron trapping, Tunneling Interface switching : schottky barrier change Disadvantages: Mechanism not clear Data retention Two terminal device: may not provide adequate separation between P/E and sensing increased sensitivity due to fabrication variations across the chip

5 Filament-type Fuse/Antifuse type 1. MIM Structure, Unipolar/bipolar switching 2. Initiation by dielectric breakdown (Forming proce ss) 3. Conductive filament formation/rupture (Complianc e current) Reference list Krzysztof Szot et al., Nature Materials 5, 312 (2006), S. Seo et al., Appl. Phys. Lett. 88, (2006), S. Q. Liu, J. Appl. Phys. 100, (R) (2006), Chen X, et al., Appl. Phys. Lett. 89, (2006), D. S. Lee et al., IEDM 2006, D. Jeong et al., Appl. Phys. Lett. 89, (2006), Possible Filament Formed HRS and LRS Show Different Images V o under Voltage GIST IEDM 2006 Nature Materials,

6 Motivation of Hybrid memory: Switching Uniformity Motivation Advanced Materials, SNU (2008) IBM, US 2006/6471 6

7 Hybrid Memory: Filament switching Current (A) Cumulative Probability (%) Current[uA] Current[A] Schematic diagram SONY, IEDM Reset 0.01 w/o GdOx layer 1E-3 1E-4 1E-5 1E-6 Set 1E-7 (a) Voltage[V] Voltage[V] 1E-4 1E-5 1E-6 1E-7 O C O C O C O C Retention time (sec) Read@0.1V LRS HRS AVR : 3.34 AVR : STD( ) : 0.31 STD( ) : Log ( Resistance ( ) ) GIST, EDL, vol.30, p

8 Motivation: Bi-layer RRAM Current (A) Uniformity improving methods under filament conduction Approach I Structure optimization (a) T.E control (b) Bi-layer structure (c) Localized path Top electrode ZrO x HfO x TiN Approach II Defect control (d) Doping method (e) Active film scaling (f) Device area scaling After forming k 4 1 1M 1 st sweep 10 th sweep 100 th sweep 1000 th ZrO sweep x / HfO x 50x50 m pattern Voltage (V) Bi-layer structure Localized path Device scaling 8

9 Nanopattern fabrication Flow Nanopattern TiN (B.M) deposition on SiO 2 water SiO 2 PECVD 250nm hole patterning by lithography SiO 2 etching with PR mask 250nm hole sample SiO 2 Sidewall process SiO 2 etching for 50nm hole 50nm hole sample SiO 2 ZrO x HfO x After After photo photo litho. litho. photo photo litho. litho. + + side-wall TiN TiN SiO 2 SiO 2 SiO SiO 2 2 BE BE 250nm 250nm BE BE 50nm SiO 2 SiO 2 SiO SiO 2 2 3nm-thick ALD HfO 2 7nm-thick Zr by sputtering 9

10 On/off ratio Top electrode dependence Current (A) Forming voltage (V) No switching Stable switching ΔG = kj/mol Reactive ΔG = kj/mol Unstable switching ΔG Inert = -888 kj/mol Read@-0.2V / T.E (7nm) / HfO 2 (4nm) / TiN Sm Zr Hf Ti Top electrode ΔG = kj/mol ZrO x /HfO x /HfO x Voltage (V) Unstable Switching Stable Switching Top electrode 7nm / HfO 2 4nm Zr Ti Top electrodes HfO 2 Thickness (nm) (a) (b) Zr 7nm/HfO 2 (2-8nm) Top electrode dependence - Zr, Hf top electrode lead to stable resistive switching : Low Gibb s free energy (Easy reaction with HfO 2 ) : Scavenging effect 10

11 XPS profile Current (A) 10-3 Zr 2 nm / HfO 2 4 nm Zr 7 nm / HfO 2 4 nm Zr 15 nm/ HfO x 4 nm 10-4 ZrO x 10-5 Zr ZrO x O 2- O 2- O 2- O HfO 2 TiN (a) HfO x HfO 2 TiN V V o V o o Voltage (V) (b) HfO x TiN V o (c) HfO x interface layer - Formation of ZrO x /HfO x structure (Scavenging effect) - Thickness of HfO x interface layer can be modulated by changing the Zr thickness 11

12 Cumulative probability (%) Uniformity improvement Cumulative Probability (%) 99.5 Open : V reset Closed : V set ZrO x /HfO x HfO x 99.5 Open : LRS Closed : HRS ZrO x /HfO x HfO x V RESET V SET Voltage (V) 10 1 Read@-0.2V Log Res. [ohm] 12

13 Voltage (V) effect of area scaling Resistance ( ) Resistance ( ) Mean Read : -0.2V 1 st Percentile 99 th Percentile 75% 50% 25% 50 samples Set V lreset Vl Set V lreset Vl LRS HRS LRS HRS Read : -0.2V 250 m 2 device 50nm nano device 50 samples LRS HRS LRS HRS 250 m 2 device 50nm nano device Uniformity improvement - Sharp distribution of V set/reset and R set/reset. - Reduction of defect related to resistive switching : Device scaling is a solution for non-uniform switching 13

14 Device performance Cumulative Probability (%) Resistance ( ) /-1.6V (ON/OFF) Read Voltage = -0.2 V sec ~X100 LRS HRS 50nm nano device Switching cycle (times) Resistance ( ) LEVEL 1 V reset = -1.1V LEVEL 2 V reset = -1.3V LEVEL 3 V reset = -1.5V Switching cycle (times) Stable AC endurance Multi level feasibility Resistance ( ) Read Voltage = -0.2 V 85 o C ~X o C 125 o C 125 o C 50nm nano device Time (s) V LRS HRS 4 inch level Log Res. (ohm) Center region Top region Bottom region Right region Left region Stable retention Good wafer level 14

15 Read out Issues for High density Array (Bipolar RRAM) Cross-point structure with 1R Cross-point structure with 1D-1R V read HRS LRS LRS LRS ReRAM V read HRS LRS LRS LRS ReRAM Selection device /Al 2 O 3 / I /ReRAM material/ I ReRAM & diode stack I Al 2 O 3 F-N tunneling Direct tunneling V V ReRAM Al 2 O 3 ReRAM V 15

16 16 R. Waser et al., Nature Mater. 9, p. 403, 2010

17 Current (A) Selection properties in ZrO x /HfO x 10-3 #3 # Reset Read Selection Read Reset 3: (T)LRS/(B)LRS 4 : (T)HRS/(B)LRS 4 Top device # Voltage (V) 1: (T)LRS/(B)LRS 2: (T)LRS/(B)HRS Bottom device /HfO x /ZrO x /BE/HfO x /ZrO x / 2 - By back to back connection, each device acts alternately as a selection device during sweep cycling. 17

18 Current (A) Cum ulative Probability (% ) Selection properties in ZrO x /HfO x Reset Read Selection Read Reset 3: (T)LRS/(B)LRS 1: (T)LRS/(B)LRS 10-3 #3 # : (T)LRS/(B)LRS 2: (T)LRS/(B)HRS Read region 4: (T)HRS/(B)LRS 2: (T)LRS/(B)HRS Selection region : (T)HRS/(B)LRS 4 Top device # Voltage (V) 2: (T)LRS/(B)HRS Bottom device /HfO x /ZrO x /BE/HfO x /ZrO x / ~10x v read = 0.8 V v read = 0.4 V Log Res. [ohm] Stable selection properties - We could recognize three regions (Selection/Read/Reset) of operation under both positive and negative bias voltage. - Selection characteristics are highly controllable. 18

19 Readout margin calculation Bit lines n (a) GND -½ V read GND GND m word lines ½ V read : V read biasing (Selected cell) (b) : ½ V read biasing (Unselected cell)... n-1 PSPICE simulation Readout margin [ % of applied V WL ] Under the worst condition Control W selection W selection with x5 HRS W selection with x10 HRS Number of Words Readout margin - Under the worst condition (unselected cell : LRS, Selected cell : HRS), readout margin was improved - Compared with control sample (/ZrO x /HfO x stack), the sample with selection properties can integrate 20 times more word lines Projection 19

20 /Nb:STO single crystalline device GIST, IEDM Filament switching shows no - Device to device switching reproducibility area dependence (NiO IEDM 2004) - Die to die uniformity - Interface switching shows area dependence - Compared with other polycrystalline (Nb:STO single crystal device) oxides Nb:STO shows better device performance Epitaxy oxide: CMOS compatibility problems 20

21 Metal/PCMO: Effect of oxygen ions log I [A] Motivation Unity Semiconductor, US V Capping layer Oxide Reactive formation metal Oxygen source * IEDM07, Panasonic Redox reaction Area dependence Sm metal = 7 nm start 40K M 1st cycle 50th cycle th cycle Mo/LCMO V[V] 21

22 Reactive metal / PCMO I [A] Ellingham diagram I-V characteristics V [V] Switching mechanism Ag Mo Ti Al Reactive metal PCMO Initial condition oxidation Oxygen deficient layer O 2- PCMO Set / Reset 22

23 Intensity [A.U.] Intensity [cts/s] Reactive metal/pcmo interface switching LRS HRS AlO x Depth [nm] PCMO Al Pr O (c) (a) (b) Al 2p Al-O Al 2p Al-O Al LRS (c) (d) HRS Binding Energy [ev] (d) PCMO PCMO (a) PCMO O 30 10nm LRS HRS PCM O 23

24 Al / PCMO (Ab-initio Modeling) Pulse response of device 1 st principle calculations Delay in the set process (from HRS to LRS) Activation Energy Unit cell of AlO Supercell of perovskite oxide Oxygen vacancy formation Optimized condition # Calculation of Activation energy # Experiment Results Set Calculations Reset (Oxidation) ev Set (Reduction) ev Experiment results Reset ~ 0.11 ev Set ~ 0.54 ev Rese t Prof. Y. H. Jang 24

25 Al / PCMO Performance (φ=50nm) Hynix 50nm hole structure I-V & Endurance Characteristics Retention, Readout disturbance & Current distribution Improved Uniformity for 50nm device Maximum current = 15 ua Good retention, endurance, readout disturbance GIST, IEDM09 25

26 Current [A] Al / PCMO for diode-free cross-point array Proposed mechanism MS structure (region I) MOS structure (region II) MS MOS transition (region III) Region I : MS structure 10-4 Region III Region I Region II Voltage [V] Region II : MOS structure Region I: Metal-Semiconductor (MS) : Formation of Schottky diode Region II: Metal-Oxide-Semiconductor (MOS) : Formation of AlO x Region III: Transition region 26

27 Data reading without diode Current [A] Bias condition for data reading - Selected cell: Forward bias, (V=-0.5V) - Selected word or bit line cell : Zero bias - Unselected word or bit line cell : Reverse bias, (V=0.5V) MS structure (region I) MOS structure (region II) MS MOS transition (region III) 10-4 Region III Region I Selected cell Region II Un-selected cell Voltage [V] 27

28 Current [A] Read Stability Current [A] Current [A] SELECTED UNSELECTED Read time=1 s Read time=10 s Read time=1 s Read time=10 s V set : -4.5V, 10 s, V reset : 4.5V, 1 s, V read =-0.5V V set : -4.5V, 10 s, V reset : 4.5V, 1 s, V read =0.5V On/Off window~10x On/Off window~10x LRS HRS Number of read pulse LRS HRS Number of read pulse Read disturbance under the worst case condition - Unselected cell limits the read operation Region III MS structure (region I) MOS structure (region II) MS MOS transition (region III) Selected cell Region I Region II Un-selected cell Voltage [V] 28

29 Set or Reset operation without diode Bias condition for set or reset operation - Selected cell : V set or V reset - Selected word or bit line cell : ½ V set or ½ V reset - Unselected word or bit line cell :Zero bias 29

30 Current [A] Set or Reset stability Current [A] Under set operation : 1/2V set, 10 s Under reset operation : 1/2V reset, 1 s On/Off window~10x LRS HRS V set : -4.5V, 10 s, V reset : 4.5V, 1 s, V read =-0.5V Number of 1/2V set or 1/2V reset pulse Set or reset disturbance under the worst case condition : Set operation is limited by HRS : Reset operation is restricted by LRS Region III Selected Un-selected MS structure (region I) MOS structure (region II) MS MOS transition (region III) Region I Voltage [V] GIST, VLSI symposium 2010 Region II 30

31 Summary How to improve switching uniformity? Switching mechanism: Depends on process/defects Localize switching volume (Area & thickness) Scaling of active area: to avoid extrinsic bulk defects Localized filament: lightning rod (<10x10nm 2 ) Local heating to solve voltage-time dilemma Scaling of active layer thickness: <3nm Bilayer, interface (M/oxide) switching Uni-polar: joule heating induced reset, generating new filament, causes switching non-uniformity Bipolar switching: E-field enhanced Reset, reuse of existing filament, improve switching uniformity 31

32 Acknowledgement This work was supported by national research program of the Non-volatile Memory Development Project. Thank you 32