Features. Description. Table 1. Device summary. Order code Marking Packages Packing. STGD19N40LZ GD19N40LZ DPAK Tape and reel

Transcription

1 Automotive-grade 390 V internally clamped IGBT E SCIS 180 mj Features Datasheet - production data TAB DPAK 1 3 AEC-Q101 qualified 180 mj of avalanche T C = 150 C, L = 3 mh ESD gate-emitter protection Gate-collector high voltage clamping Logic level gate drive Low saturation voltage High pulsed current capability Gate and gate-emitter resistor Figure 1. Internal schematic diagram C (2 or TAB) Applications Pencil coil electronic ignition driver G (1) R G R GE Description This application-specific IGBT utilizes the most advanced PowerMESH technology. The built-in Zener diodes between gate-collector and gateemitter provide overvoltage protection capabilities. The device also exhibits low on-state voltage drop and low threshold drive for use in automotive ignition systems. E (3) SC30180 Table 1. Device summary Order code Marking Packages Packing STGD19N40LZ GD19N40LZ DPAK Tape and reel October 2016 DocID Rev 6 1/17 This is information on a product in full production.

2 Contents STGD19N40LZ Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package information DPAK (TO-252) type A2 package information Packing information Revision history /17 DocID Rev 6

3 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V CES Collector-emitter voltage (v GE = 0) V CES(clamped) V V ECS Emitter collector voltage (V GE = 0) 20 V I (1) C Collector current (continuous) at T C = 100 C 25 A I (2) CP Pulsed collector current 40 A V GE Gate-emitter voltage V GE(clamped) V P TOT Total dissipation at T C = 25 C 125 W (3) E SCIS Single pulse energy T C = 25 C, L = 3 mh, V CC = 50 V 300 mj Single pulse energy T C =150 C, L = 3 mh, V CC = 50 V 180 mj I SCIS Avalanche current T C = 150 C, L = 3 mh, V CC = 50 V 10.2 A Avalanche current T C = 25 C, L = 3 mh, V CC = 50 V 13.1 A ESD T STG T J Human body model, R = 1.5 kω, C = 100 pf 8 kv Machine model, R = 0, C = 100 pf 800 V Charged device model 2 kv Storage temperature Operating junction temperature 1. Calculated according to the iterative formula I C ( T C ) T jmax ( ) T C R thj c V CE( sat) ( max) T jmax = ( ( ), I C ( T C )) 2. Pulse width limited by max. junction temperature allowed 3. For E SCIS test circuit refer to Figure 16. (Inductive load switching), with A and B not connected. 55 to 175 C Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case 1.2 C/W R thj-amb Thermal resistance junction-ambient device in free air 100 C/W DocID Rev 6 3/17 17

4 Electrical characteristics STGD19N40LZ 2 Electrical characteristics T J = 25 C unless otherwise specified. Table 4. Static electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit V CES(clamped) V (BR)ECS Collector emitter clamped voltage (V GE = 0) Emitter collector break-down voltage (V GE = 0) I C = 2 ma 390 V I C = 2 ma, T J = - 40 C to 175 C V I C = 75 ma 28 V I C = 75 ma, T J = - 40 C to 175 C 20 V V GE(clamped) I CES I GES Gate emitter clamped voltage Collector cut-off current (V GE = 0) Gate-emitter leakage current (V CE = 0) I G = ±2 ma T J = - 40 C to 175 C V V CE = 15 V, T J = 175 C 20 µa V CE = 200 V, T J = 175 C 100 µa V GE = ±10 V 625 µa V GE = ±10 V, T J = - 40 C to 175 C µa R GE Gate emitter resistance 0 < V GE < V GE (clamped) kω R G Gate resistance 1.6 kω V GE(th) V CE(sat) Gate threshold voltage Collector emitter saturation voltage V GE =V CE, I C = 1 ma, T J = - 40 C V V GE =V CE, I C = 1 ma V V GE =V CE, I C = 1 ma, T J = 175 C V V GE = 4.5 V, I C = 10 A 1.5 V V GE = 4.5 V, I C = 10 A, 1.85 V T J = - 40 C to 175 C V GE = 3.8 V, I C = 6 A 1.35 V V GE = 3.8 V, I C = 6 A, T J = - 40 C to 175 C 1.65 V 4/17 DocID Rev 6

5 Electrical characteristics Table 5. Dynamic electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit C ies Input capacitance pf C oes Output capacitance V CE = 25 V, f = 1 MHz, pf C res V GE = 0 Reverse transfer capacitance pf Q g Gate charge V CE = 280 V, I C = 10 A, V GE = 5 V nc Table 6. Switching on/off Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) t r Resistive load Turn-on delay time Rise time V CC = 14 V, R L = 1 Ω, V GE = 5 V R G = 1 kω µs µs t d(on) t r Resistive load Turn-on delay time Rise time V CC = 14 V, R L = 1 Ω, V GE = 5 V, R G = 1 kω, T J = 150 C µs µs t d(off) t f dv/dt Inductive load Turn-off delay time Fall time Turn-off voltage slope V CC = 300 V, L = 1 mh I C = 10 A, V GE = 5 V, R G = 1 kω µs µs V/µs t d(off) t f dv/dt Inductive load Turn-off delay time Fall time Turn-off voltage slope V CC = 300 V, L = 1 mh I C = 10 A, V GE = 5 V, R G = 1 kω, T J = 150 C µs µs V/µs DocID Rev 6 5/17 17

6 Electrical characteristics STGD19N40LZ 2.1 Electrical characteristics (curves) Figure 2. Collector-emitter on voltage vs. temperature (I C = 6 A) Vce (sat) (V) I C = 6 A AM17126v1 Figure 3. Collector-emitter on voltage vs. temperature (I C = 10 A) Vce (sat) (V) AM17127v V ge = 3.8 V 1.3 V ge = 3.8 V 1.6 I c = 10 A V ge = 4.5 V V ge = 4.5 V V ge = 5 V V ge = 5 V Tc ( C) Tc ( C) Figure 4. Collector-emitter on voltage vs. temperature (V GE = 4.5 V) AM17128v1 VCE(sat) (V) V GE = 4.5 V I C = 15 A Figure 5. Self clamped inductive switch I SCIS (A) V CC = 24 V V GE = 5 V AM17129v1 1.5 I C = 10 A T C= 25 C 1.3 I C = 6 A 10 T C= 150 C T C ( C) L (mh) Figure 6. Output characteristics (T J = 25 C) I C (A) AM17130v1 Figure 7. Output characteristics (T J = -175 C) I C (A) AM17131v1 60 V GE = 6 V 50 V GE = 6 V V GE = 5.5 V GE = 5 V V GE = 4.5 V GE = 4 V V GE = V GE = 5.5 V GE = 5 V V GE = 4.5 V GE = 4 V V GE = V CE (V) V CE (V) 6/17 DocID Rev 6

7 Electrical characteristics Figure 8. Output characteristics (T J = -40 C) I C (A) AM17132v1 I C (A) Figure 9. Transfer characteristics AM17133v V GE = 6 V V GE = 5.5 V V CE = 6 V T J = -25 C T J = -40 C 40 V GE = 5 V V GE = 4.5 V 30 T J = 175 C 20 V GE = 4 V V GE = 3.5 V V CE (V) V GE (V) Figure 10. Collector cut-off current vs. temperature Ices (μa) 10 V GE = 0 V CE = 350 V AM17134v1 Figure 11. Normalized collector emitter voltage vs. temperature (I C = 2 ma) Vces (norm) Ic = 2 ma Vge = 0 V AM17135v V CE = 200 V Tc ( C) Tc ( C) Figure 12. Normalized gate threshold voltage vs. temperature VGE(th) (norm) VCE = VGE IC = 1 ma AM17136v Tc ( C) Figure 13. Normalized collector emitter on voltage vs. temperature (I C = 10 A) VCE(sat) (norm) VGE = 4.5 V IC = 10 A AM17137v Tc ( C) DocID Rev 6 7/17 17

8 Electrical characteristics STGD19N40LZ Figure 14. Thermal impedance Figure 15. Transconductance vs. temperature GFS AM17170v1 (S) I C = 6 A V CE = 5 V T C ( C) 8/17 DocID Rev 6

9 Test circuits 3 Test circuits Figure 16. Inductive load switching and E SCIS test circuit Figure 17. Resistive load switching L AM01504v1 AM01504v2 Figure 18. Gate charge test circuit Figure 19. Switching waveform 90% VG 10% 90% VCE Tr(Voff) 10% Tcross 90% IC Td(on) Ton Tr(Ion) Td(off) Toff Tf 10% AM01505v1 AM01506v1 DocID Rev 6 9/17 17

10 Package information STGD19N40LZ 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. 10/17 DocID Rev 6

11 Package information 4.1 DPAK (TO-252) type A2 package information Figure 20. DPAK (TO-252) type A2 package outline DocID Rev 6 11/17 17

12 Package information STGD19N40LZ Table 7. DPAK (TO-252) type A2 mechanical data Dim. mm Min. Typ. Max. A A A b b c c D D E E e e H L L L L R 0.20 V /17 DocID Rev 6

13 Package information Figure 21. DPAK (TO-252) recommended footprint (a) a. All dimensions are in millimeters DocID Rev 6 13/17 17

14 Package information STGD19N40LZ 4.2 Packing information Figure 22. Tape outline for DPAK (TO-252) 10 pitches cumulative tolerance on tape +/- 0.2 mm T Top cover tape P0 D P2 E B1 K0 B0 F W For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R User direction of feed Bending radius AM08852v1 14/17 DocID Rev 6

15 Package information REEL DIMENSIONS Figure 23. Reel outline for DPAK (TO-252) T 40mm min. Access hole At sl ot location B D C A N Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 Table 8. DPAK (TO-252) tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A A 330 B B 1.5 B C D D 20.2 D1 1.5 G E N 50 F T 22.4 K P Base qty P Bulk qty P R 40 T W DocID Rev 6 15/17 17

16 Revision history STGD19N40LZ 5 Revision history Table 9. Document revision history Date Revision Changes 22-Apr Initial release. 20-May Added Figure Apr Modified title and features Modified V CES(clamped), V (BR)ECS and I GES test conditions Modified Figure 5 and 9 Updated Section 4: Package information Minor text changes 04-Jun Updated features in cover page. 30-Jul Oct Text and formatting changes throughout document. Updated Section 4: Package information Updated Figure 9: Transfer characteristics. Minor text changes. 16/17 DocID Rev 6

17 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved DocID Rev 6 17/17 17