ICL7106, ICL7107, ICL7107S

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1 ICL0, ICL0, ICL0S Data Sheet December, 00 FN. / Digit, LCD/LED Display, A/D Converters The Intersil ICL0 and ICL0 are high performance, low power, / digit A/D converters. Included are seven segment decoders, display drivers, a reference, and a clock. The ICL0 is designed to interface with a liquid crystal display (LCD) and includes a multiplexed backplane drive; the ICL0 will directly drive an instrument size light emitting diode (LED) display. The ICL0 and ICL0 bring together a combination of high accuracy, versatility, and true economy. It features autozero to less than 0µV, zero drift of less than µv/ o C, input bias current of 0pA (Max), and rollover error of less than one count. True differential inputs and reference are useful in all systems, but give the designer an uncommon advantage when measuring load cells, strain gauges and other bridge type transducers. Finally, the true economy of single power supply operation (ICL0), enables a high performance panel meter to be built with the addition of only 0 passive components and a display. Features Guaranteed Zero Reading for 0V Input on All Scales True Polarity at Zero for Precise Null Detection pa Typical Input Current True Differential Input and Reference, Direct Display Drive LCD ICL0, LED lcl0 Low Noise Less Than µv PP On Chip Clock and Reference Low Power Dissipation Typically Less Than 0mW No Additional Active Circuits Required Enhanced Display Stability PbFree Plus Anneal Available (RoHS Compliant) Ordering Information PART NO. PART MARKG TEMP. RANGE ( C) PACKAGE PKG. DWG. # ICL0CPL ICL0CPL 0 to 0 Ld PDIP E. ICL0CPLZ (Note ) ICL0CPLZ 0 to 0 Ld PDIP(Pbfree) (Note ) E. ICL0CM ICL0CM 0 to 0 Ld MQFP Q.0x0 ICL0CMZ (Note ) ICL0CMZ 0 to 0 Ld MQFP (Pbfree) Q.0x0 ICL0CMZT (Note ) ICL0CMZ 0 to 0 Ld MQFP Tape and Reel (Pbfree) Q.0x0 ICL0CPL ICL0CPL 0 to 0 Ld PDIP E. ICL0CPLZ (Note ) ICL0CPLZ 0 to 0 Ld PDIP(Pbfree) (Note ) E. ICL0RCPL ICL0RCPL 0 to 0 Ld PDIP (Note ) E. ICL0RCPLZ (Note ) ICL0RCPLZ 0 to 0 Ld PDIP (Pbfree) (Notes, ) E. ICL0SCPL ICL0SCPL 0 to 0 Ld PDIP (Notes, ) E. ICL0SCPLZ (Note ) ICL0SCPLZ 0 to 0 Ld PDIP (Pbfree) (Notes, ) E. ICL0CM ICL0CM 0 to 0 Ld MQFP Q.0x0 ICL0CMT ICL0CM 0 to 0 Ld MQFP Tape and Reel Q.0x0 ICL0CMZ (Note ) ICL0CMZ 0 to 0 Ld MQFP (Pbfree) Q.0x0 ICL0CMZT (Note ) ICL0CMZ 0 to 0 Ld MQFP Tape and Reel (Pbfree) Q.0x0 NOTES:. R indicates device with reversed leads for mounting to PC board underside. S indicates enhanced stability.. Intersil Pbfree plus anneal products employ special Pbfree material sets; molding compounds/die attach materials and 00% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pbfree soldering operations. Intersil Pbfree products are MSL classified at Pbfree peak reflow temperatures that meet or exceed the Pbfree requirements of IPC/JEDEC J STD00.. Pbfree PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. ERSIL or Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 00, 00, 00. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

2 Pinouts ICL0, ICL0 (PDIP) TOP VIEW ICL0R (PDIP) TOP VIEW V C B ( s) A F G E D C B (0 s) F E D (00 s) F (000) AB POL (MUS) 0 0 V (0 s) (00 s) BP/GND V (0 s) (00 s) BP/GND 0 0 V C B A ( s) F G E D C B (0 s) F E D (00 s) F (000) AB POL (MUS) ICL0, ICL0 (MQFP) TOP VIEW V NC NC NC V C 0 B 0 NC BP/GND POL AB F A F G E D C B F E D FN.

3 Absolute Maximum Ratings Supply Voltage ICL0, V to V V ICL0, V to GND V ICL0, V to GND V Analog Input Voltage (Either Input) (Note ) V to V Reference Input Voltage (Either Input) V to V Clock Input ICL to V ICL GND to V Operating Conditions Temperature Range o C to 0 o C Thermal Information Thermal Resistance (Typical, Note ) θ JA ( o C/W) PDIP Package MQFP Package Maximum Junction Temperature o C Maximum Storage Temperature Range o C to 0 o C Maximum Lead Temperature (Soldering 0s) o C (MQFP Lead Tips Only) NOTE: Pbfree PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES:. Input voltages may exceed the supply voltages provided the input current is limited to ±00µA.. θ JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB for details. Electrical Specifications (Note ) SYSTEM PERFORMANCE PARAMETER CONDITIONS M TYP MAX UNIT Zero Input Reading V = 0.0V, Full Scale = 00mV ± Digital Reading Stability (Last Digit) (ICL0S, ICL0S Only) Fixed Input Voltage (Note ) ± Digital Reading Ratiometric Reading V ln = V REF, V REF = 00mV / Digital Reading Rollover Error Linearity V = V ln 00mV Difference in Reading for Equal Positive and Negative Inputs Near Full Scale Full Scale = 00mV or Full Scale = V Maximum Deviation from Best Straight Line Fit (Note ) ±0. ± Counts ±0. ± Counts Common Mode Rejection Ratio V CM = V, V = 0V, Full Scale = 00mV (Note ) 0 µv/v Noise V = 0V, Full Scale = 00mV (PeakToPeak Value Not Exceeded % of Time) µv Leakage Current Input V ln = 0 (Note ) 0 pa Zero Reading Drift V ln = 0, 0 o C To 0 o C (Note ) 0. µv/ o C Scale Factor Temperature Coefficient V = mv, 0 o C To 0 o C, (Ext. Ref. 0ppm/ o C) (Note ) ppm/ o C End Power Supply Character V Supply Current V = 0 (Does Not Include LED Current for ICL0).0. ma End Power Supply Character V Supply Current ICL0 Only 0.. ma Pin Analog Common Voltage Temperature Coefficient of Analog Common DISPLAY DRIVER ICL0 ONLY kω Between Common and Positive Supply (With Respect to Supply) kω Between Common and Positive Supply (With Respect to Supply)..0. V 0 ppm/ o C PeakToPeak Segment Drive Voltage PeakToPeak Backplane Drive Voltage V = to V = V (Note ). V FN.

4 Electrical Specifications (Note ) (Continued) PARAMETER CONDITIONS M TYP MAX UNIT DISPLAY DRIVER ICL0 ONLY Segment Sinking Current V = V, Segment Voltage = V Except Pins AB and POL ma Pin AB Only 0 ma Pin POL Only ma NOTES:. Unless otherwise noted, specifications apply to both the ICL0 and ICL0 at T A = o C, f CLOCK = khz. ICL0 is tested in the circuit of Figure. ICL0 is tested in the circuit of Figure.. Back plane drive is in phase with segment drive for off segment, 0 degrees out of phase for on segment. Frequency is 0 times conversion rate. Average DC component is less than 0mV.. Not tested, guaranteed by design.. Sample Tested. Typical Applications and Test Circuits R R V R V C C B C R C C R C 0 COM V ICL0 A F G E D C B F E D DISPLAY F AB 0 POL BP C = C = C = 0.µF C = C = 0.0µF R = kω R = R = R = kω R = MΩ DISPLAY FIGURE. ICL0 CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS SELECTED FOR 00mV FULL SCALE V V R R R V C R C C R C C DISPLAY COM V ICL0 C B A F G E D C B F E D F AB 0 0 POL GND C = C = C = 0.µF C = C = 0.0µF R = kω R = R = R = kω R = MΩ DISPLAY FIGURE. ICL0 CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS SELECTED FOR 00mV FULL SCALE FN.

5 Design Information Summary Sheet OSCILLATOR FREQUENCY f OSC = 0./RC C OSC > 0pF; R OSC > 0kΩ f OSC (Typ) = khz OSCILLATOR PERIOD t OSC = RC/0. EGRATION CLOCK FREQUENCY f CLOCK = f OSC / EGRATION PERIOD t = 000 x (/f OSC ) 0/0Hz REJECTION CRITERION t /t 0Hz or t lnt /t 0Hz = Integer OPTIMUM EGRATION CURRENT I = µa FULL SCALE ANALOG PUT VOLTAGE V lnfs (Typ) = 00mV or V EGRATE RESISTOR V R FS = I EGRATE CAPACITOR ( t )( I ) = C EGRATOR OUTPUT VOLTAGE SWG ( t )( I ) = V V C V MAXIMUM SWG: (V 0.V) < V < (V 0.V), V (Typ) = V DISPLAY COUNT V COUNT = 000 V REF CONVERSION CYCLE t CYC = t CL0CK x 00 t CYC = t OSC x,000 when f OSC = khz; t CYC = ms MODE PUT VOLTAGE (V V) < V ln < (V 0.V) AUTOZERO CAPACITOR 0.0µF < C AZ < µf REFERENCE CAPACITOR < < µf V COM Biased between Vi and V. V COM V.V Regulation lost when V to V <.V If V COM is externally pulled down to (V to V)/, the V COM circuit will turn off. ICL0 POWER SUPPLY: SGLE V V V = V Digital supply is generated internally V GND V.V ICL0 DISPLAY: LCD Type: Direct drive with digital logic supply amplitude. ICL0 POWER SUPPLY: DUAL ±.0V V = V to GND V = V to GND Digital Logic and LED driver supply V to GND ICL0 DISPLAY: LED Type: NonMultiplexed Common Anode Typical Integrator Amplifier Output Waveform ( Pin) AUTO ZERO PHASE (COUNTS) 000 SIGNAL EGRATE PHASE FIXED 000 COUNTS DEEGRATE PHASE 0 COUNTS TOTAL CONVERSION TIME = 00 x t CLOCK =,000 x t OSC FN.

6 Typical Applications The ICL0 and ICL0 may be used in a wide variety of configurations. The circuits which follow show some of the possibilities, and serve to illustrate the exceptional versatility of these A/D converters. Application Notes NOTE # DESCRIPTION AN0 Selecting A/D Converters AN0 The Integrating A/D Converter The following application notes contain very useful information on understanding and applying this part and are available from Intersil Corporation. AN0 AN0 AN0 AN0 AN0 AN0 Do s and Don ts of Applying A/D Converters Low Cost Digital Panel Meter Designs Understanding the AutoZero and Common Mode Performance of the ICL// Family Building a BatteryOperated Auto Ranging DVM with the ICL0 Tips for Using Single Chip / Digit A/D Converters Overcoming Common Mode Range Issues When Using Intersil Integrating Converters Typical Applications = 00mV = 00mV kω kω kω kω V V 0.µF MΩ 0.0µF V V 0.µF MΩ 0.0µF V BP TO BACKPLANE GND Values shown are for 00mV full scale, readings/sec., floating supply voltage (V battery). FIGURE. ICL0 USG THE ERNAL REFERENCE Values shown are for 00mV full scale, readings/sec. may be tied to either for inputs floating with respect to supplies, or GND for single ended inputs. (See discussion under Analog ). FIGURE. ICL0 USG THE ERNAL REFERENCE FN.

7 Typical Applications (Continued) = 00mV = 00mV kω 0kΩ 0kΩ.V (ICL0) V kω V.V MΩ 0.0µF MΩ 0.0µF V 0.µF V V 0.µF V GND GND is tied to supply establishing the correct common mode voltage. If is not shorted to GND, the input voltage may float with respect to the power supply and acts as a preregulator for the reference. If is shorted to GND, the input is single ended (referred to supply GND) and the preregulator is overridden. FIGURE. ICL0 WITH AN EXTERNAL BANDGAP REFERENCE (.V TYPE) Since low TC zeners have breakdown voltages ~.V, diode must be placed across the total supply (0V). As in the case of Figure, may be tied to either or GND. FIGURE. ICL0 WITH ZENER DIODE REFERENCE = V = 00mV V 0.0µF 0.µF 0kΩ kω kω MΩ 0.0µF V V V GND 0.µF kω 0kΩ MΩ 0.0µF kω.v (ICL0) V BP/GND An external reference must be used in this application, since the voltage between V and V is insufficient for correct operation of the internal reference. FIGURE. ICL0 AND ICL0: RECOMMENDED COMPONENT VALUES FOR V FULL SCALE FIGURE. ICL0 OPERATED FROM SGLE V FN.

8 Typical Applications (Continued) V GND 0.µF The resistor values within the bridge are determined by the desired sensitivity. FIGURE. ICL0 MEASUREG RATIOMETRIC VALUES OF QUAD LOAD CELL O/RANGE U/RANGE CD OR C0 V TO LOGIC V CC CD 0 0 V C B A F G E D C B F E D F AB POL FIGURE. CIRCUIT FOR DEVELOPG UNDERRANGE AND OVERRANGE SIGNAL FROM ICL0 OUTPUTS V TO LOGIC GND V BP V SCALE FACTOR ADJUST kω C MΩ REF 0kΩ ZERO SILICON NPN 0.0µF ADJUST MPS 0 OR SIMILAR V V 0.µF BP TO BACKPLANE A silicon diodeconnected transistor has a temperature coefficient of about mv/ o C. Calibration is achieved by placing the sensing transistor in ice water and adjusting the zeroing potentiometer for a reading. The sensor should then be placed in boiling water and the scalefactor potentiometer adjusted for a 00.0 reading. FIGURE. ICL0 USED AS A DIGITAL CENTIGRADE THERMOMETER O/RANGE U/RANGE CD OR C0 TO LOGIC V CC The LM is required to ensure logic compatibility with heavy display loading. V V C B A F G E kω D 0 C B LM F E D F AB 0 POL kω V BP FIGURE 0. CIRCUIT FOR DEVELOPG UNDERRANGE AND OVERRANGE SIGNALS FROM ICL0 OUTPUT V FN.

9 Typical Applications (Continued) kω 0µF kω SCALE FACTOR ADJUST (V REF = 00mV FOR AC TO RMS) 0kΩ N µf CA.MΩ AC V 0.µF 0µF V µf.kω 0kΩ µf (FOR OPTIMUM BANDWIDTH) 0kΩ µf 0.µF BP TO BACKPLANE Test is used as a commonmode reference level to ensure compatibility with most op amps. FIGURE. AC TO DC CONVERTER WITH ICL0 V ICL0 DM Ω LED SEGMENTS Ω Ω FIGURE. DISPLAY ERG FOR CREASED DRIVE CURRENT FN.

10 DualInLine Plastic Packages (PDIP) ICL0, ICL0, ICL0S DEX AREA BASE PLANE SEATG PLANE B C A N N/ B D e E NOTES:. Controlling Dimensions: CH. In case of conflict between English and Metric dimensions, the inch dimensions control.. Dimensioning and tolerancing per ANSI Y.M.. Symbols are defined in the MO Series Symbol List in Section. of Publication No... Dimensions A, A and L are measured with the package seated in JEDEC seating plane gauge GS.. D,, and E dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.00 inch (0.mm).. E and e A are measured with the leads constrained to be perpendicular to datum C.. e B and e C are measured at the lead tips with the leads unconstrained. e C must be zero or greater.. B maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.00 inch (0.mm).. N is the maximum number of terminal positions. 0. Corner leads (, N, N/ and N/ ) for E., E., E., E., E. will have a B dimension of inch (0..mm). B A 0.00 (0.) M C A L B S A e C E C L e A C e B E. (JEDEC MS0AC ISSUE B) LEAD DUALLE PLASTIC PACKAGE CHES MILLIMETERS SYMBOL M MAX M MAX NOTES A 0.0. A B B C D E E e 0.00 BSC. BSC e A 0.00 BSC. BSC e B L N Rev. 0 / FN.

11 Metric Plastic Quad Flatpack Packages (MQFP) D D Q.0x0 (JEDEC MS0AB ISSUE B) LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE CHES MILLIMETERS SYMBOL M MAX M MAX NOTES A 0.0. A A B E E b b D , e E E , P L N M 0 o M 0 o o L o o A o o M C 0./ /0.00 A AB S D S b b SEATG PLANE C BASE METAL WITH PLATG 0./ /0.00 H e 0.0 BSC 0.0 BSC Rev. / NOTES:. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.. All dimensions and tolerances per ANSI Y.M.. Dimensions D and E to be determined at seating plane C.. Dimensions and E to be determined at datum plane H.. Dimensions and E do not include mold protrusion. Allowable protrusion is 0.mm (0.00 inch) per side.. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.0mm (0.00 inch) total.. N is the number of terminal positions. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO000 quality systems. Intersil Corporation s quality certifications can be viewed at Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN.

DG211. Features. SPST 4-Channel Analog Switch. Part Number Information. Functional Block Diagrams. Pinout. Data Sheet December 21, 2005 FN3118.

DG211. Features. SPST 4-Channel Analog Switch. Part Number Information. Functional Block Diagrams. Pinout. Data Sheet December 21, 2005 FN3118. Data Sheet FN3118.4 SPST 4-Channel Analog Switch The is a low cost, CMOS monolithic, Quad SPST analog switch. It can be used in general purpose switching applications for communications, instrumentation,