DATASHEET CD40109BMS. Features. Description. Applications. Functional Diagram. Pinout. CMOS Quad Low-to-High Voltage Level Shifter
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1 DATASHEET CD19BMS CMOS Quad Low-to-High Voltage Level Shifter Features High Voltage Type (V Rating) Independence of Power Supply Sequence Considerations - can Exceed - Input Signals can Exceed Both and Up and Down Level Shifting Capability Three-State Outputs with Separate Enable Controls 1% Tested for Quiescent Current at V V, 1V and 1V Parametric Ratings Maximum Input Current of 1 A at 1V Over Full Package Temperature Range; 1nA at 1V and + o C Noise Margin (Over Full Package/Temperature Range) - 1V at = V, = 1V - V at = 1V, = 1V Standardized Symmetrical Output Characteristics Meets All Requirements of JEDEC Tentative Standard No. 13B, Standard Specifications for Description of B Series CMOS Devices Applications High or Low Level Shifting with Three-State Outputs for Unidirectional or Bidirectional Bussing Isolation of Logic Subsystems Using Separate Power Supplies from Supply Sequencing, Supply Loss and Supply Regulation Considerations Description FN319 Rev. CD19BMS contains four low-to-high voltage level shifting circuits. Each circuit will shift a low voltage digital logic input signal (A, B, C, D) with logical 1 = and logical = to a higher voltage output signal (E, F, G, H) with logical 1 = and logical =. The CD19BMS, unlike other low-to-high level shifting circuits, does not require the presence of the high voltage supply () before the application of either the low voltage supply () or the input signals. There are no restrictions on the sequence of application of,, or the input signals. In addition, with one exception there are no restrictions on the relative magnitudes of the supply voltages or input signals within the device maximum ratings, provided that the input signal swings between and at least.7; may exceed, and input signals may exceed and. When operated in the mode >, the CD19BMS will operate as a high-to-low level shifter. The CD19BMS also features individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high impedance state in the corresponding output. The CD19BMS is supplied in these 1-lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack HT H1E HW Pinout CD19BMS TOP VIEW Functional Diagram 1 OF UNITS ENABLE A A ENABLE D D A LEVEL SHIFTER E E 13 H F B 1 11 NC G ENABLE A LEVEL SHIFTER ENABLE B 7 1 C 9 ENABLE C FN319 Rev. Page 1 of 9
2 CD19BMS Absolute Maximum Ratings DC Supply Voltage Range, () V to +V (Voltage Referenced to Terminals) Input Voltage Range, All Inputs V to +.V DC Input Current, Any One Input 1mA Operating Temperature Range to +1 o C Package Types D, F, K, H Storage Temperature Range (TSTG) o C to +1 o C Lead Temperature (During Soldering) o C At Distance 1/1 1/3 Inch (1.9mm.79mm) from case for 1s Maximum Reliability Information Thermal Resistance ja jc Ceramic DIP and FRIT Package..... o C/W o C/W Flatpack Package o C/W o C/W Maximum Package Power Dissipation (PD) at +1 o C For T A = to +1 o C (Package Type D, F, K) mw For T A = +1 o C to +1 o C (Package Type D, F, K) Derate Linearity at 1mW/ o C to mw Device Dissipation per Output Transistor mW For T A = Full Package Temperature Range (All Package Types) Junction Temperature o C TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A PARAMETER SYMBOL CONDITIONS (NOTE 1) SUBGROUPS TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1 + o C - A +1 o C - A = 1V, VIN = or GND 3 - A Input Leakage Current IIL VIN = or GND = 1 + o C -1 - na +1 o C -1 - na = 1V na Input Leakage Current IIH VIN = or GND = 1 + o C - 1 na +1 o C - 1 na = 1V 3-1 na Output Voltage VOL1 = 1V, No Load 1,, 3 + o C, +1 o C, - mv Output Voltage VOH1 = 1V, No Load (Note 3) 1,, 3 + o C, +1 o C, V Output Current (Sink) IOL = V, VOUT =.V 1 + o C.3 - ma Output Current (Sink) IOL1 = 1V, VOUT =.V 1 + o C 1. - ma Output Current (Sink) IOL1 = 1V, VOUT = 1.V 1 + o C 3. - ma Output Current (Source) IOHA = V, VOUT =.V 1 + o C ma Output Current (Source) IOHB = V, VOUT =.V 1 + o C ma Output Current (Source) IOH1 = 1V, VOUT = 9.V 1 + o C ma Output Current (Source) IOH1 = 1V, VOUT = 13.V 1 + o C ma N Threshold Voltage VNTH = 1V, ISS = -1 A 1 + o C V P Threshold Voltage VPTH = V, IDD = 1 A 1 + o C.7. V Functional F =.V, VIN = or GND 7 + o C VOH > VOL < V = V, VIN = or GND 7 + o C / / = 1V, VIN = or GND A +1 o C = 3V, VIN = or GND B Input Voltage Low (Note ) Input Voltage High (Note ) Input Voltage Low (Note ) Input Voltage High (Note ) Tri-State Output Leakage Tri-State Output Leakage VIL VIH VIL VIH IOZL IOZH = 1V, VOH > 9V, VOL < 1V = V = 1V, VOH > 9V, VOL < 1V = V = 1V, VOH > 13.V, VOL < 1.V, = 1V = 1V, VOH > 13.V, VOL < 1.V, = 1V VIN = or GND VOUT = V VIN = or GND VOUT = 1. All voltages referenced to device GND, 1% testing being implemented.. Go/No Go test with limits applied to inputs. 1,, 3 + o C, +1 o C, - 1. V 1,, 3 + o C, +1 o C, 3. - V 1,, 3 + o C, +1 o C, - 3 V 1,, 3 + o C, +1 o C, 7 - V = V 1 + o C -. - A +1 o C -1 - A = 1V A = V 1 + o C -. A +1 o C - 1 A = 1V 3 -. A 3. For accuracy, voltage is measured differentially to. Limit is.v max. FN319 Rev. Page of 9
3 CD19BMS TABLE. AC ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS Transition Time Transition Time TPHL1 TPLH1 TPHL TPLH TTHL1 TTLH1 TTHL TTLH TPHZ1 TPHZ TPLZ1 TPLZ TPZH1 TPZH TPZL1 TPZL = 1V, VIN = or GND = V (Notes 1, ) = 1V, VIN = or GND = V (Notes 1, ) = V, VIN = or GND = 1V (Notes 1, ) = V, VIN = or GND = 1V (Notes 1, ) = 1V, VIN = or GND = V (Notes 1, ) = V, VIN = or GND = 1V (Notes 1, ) = 1V, VIN = or GND = V (Notes, 3) = V, VIN = or GND = 1V (Notes, 3) = 1V, VIN = or GND = V (Notes, 3) = V, VIN = or GND = 1V (Notes, 3) = 1V, VIN = or GND = V (Notes, 3) = V, VIN = or GND = 1V (Notes, 3) = 1V, VIN = or GND = V (Notes, 3) = V, VIN = or GND = 1V (Notes, 3) 1. CL = pf, RL = K, Input TR, TF < ns.. and +1 o C limits guaranteed, 1% testing being implemented. 3. CL = pf, RL = 1K, Input TR, TF < ns. GROUP A SUBGROUPS TEMPERATURE TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS MIN MAX UNITS 9 + o C - ns 1, o C, - 1 ns 9 + o C - ns 1, o C, - 31 ns 9 + o C - ns 1, o C, - 7 ns 9 + o C - ns 1, o C, - 1 ns 9 + o C - 1 ns 1, o C, - 13 ns 9 + o C - ns 1, o C, - 7 ns 9 + o C - 1 ns 1, o C, - 1 ns 9 + o C - ns 1, o C, - ns 9 + o C - 7 ns 1, o C, ns 9 + o C - ns 1, o C, - 7 ns 9 + o C - ns 1, o C, - ns 9 + o C - ns 1, o C, - 1 ns 9 + o C - ns 1, o C, - 7 ns 9 + o C - ns 1, o C, - ns PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1,, + o C - 1 A +1 o C - 3 A = 1V, VIN = or GND 1,, + o C - A +1 o C - A = 1V, VIN = or GND 1,, + o C - A +1 o C - 1 A Output Voltage VOL = V, No Load 1, + o C, +1 o C, - mv FN319 Rev. Page 3 of 9
4 CD19BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE Output Voltage VOL = 1V, No Load 1, + o C, +1 o C, Output Voltage VOH = V, No Load 1, + o C, +1 o C, Output Voltage VOH = 1V, No Load 1, + o C, +1 o C, - mv.9 - V V Output Current (Sink) IOL = V, VOUT =.V 1, +1 o C.3 - ma. - ma Output Current (Sink) IOL1 = 1V, VOUT =.V 1, +1 o C.9 - ma 1. - ma Output Current (Sink) IOL1 = 1V, VOUT = 1.V 1, +1 o C. - ma. - ma Output Current (Source) IOHA = V, VOUT =.V 1, +1 o C ma - -. ma Output Current (Source) IOHB = V, VOUT =.V 1, +1 o C ma - -. ma Output Current (Source) IOH1 = 1V, VOUT = 9.V 1, +1 o C ma ma Output Current (Source) IOH1 =1V, VOUT = 13.V 1, +1 o C - -. ma - -. ma Input Voltage Low VIL = 1V, VOH > 9V, VOL < 1V = V Input Voltage High VIH = 1V, VOH > 9V, VOL < 1V = V Data In to Data Out Transition Time Transition Time 1, + o C, +1 o C, 1, + o C, +1 o C, - 1. V 3. - V TPHL1 = 1V, = V 1,, 3 + o C - ns = 1V, = 1V 1,, 3 + o C - 3 ns TPLH1 = 1V, = V 1,, 3 + o C - ns = 1V, = 1V 1,, 3 + o C - 1 ns TPHL = V, = 1V 1,, 3 + o C - ns = 1V, = 1V 1,, 3 + o C - ns TPLH = V, = 1V 1,, 3 + o C - ns = 1V, = 1V 1,, 3 + o C - 1 ns TTHL1 TTLH1 TTHL TTLH = 1V, = V 1,, 3 + o C - ns = 1V, = 1V 1,, 3 + o C - ns = V, = 1V 1,, 3 + o C - ns = 1V, = 1V 1,, 3 + o C - 1 ns TPHZ1 = 1V, = V 1,, + o C - 1 ns = 1V, = 1V 1,, + o C - 7 ns TPHZ = V, = V 1,, + o C - ns = 1V, = 1V 1,, + o C - ns TPLZ1 = 1V, = V 1,, + o C - ns = 1V, = 1V 1,, + o C - ns MIN MAX UNITS FN319 Rev. Page of 9
5 CD19BMS TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS TPLZ = V, = 1V 1,, + o C - ns = 1V, = 1V 1,, + o C - ns TPZH1 = 1V, = V 1,, + o C - ns = 1V, = 1V 1,, + o C - 3 ns TPZH = V, = 1V 1,, + o C - ns = 1V, = 1V 1,, + o C - ns TPZL1 = 1V, = V 1,, + o C - 1 ns = 1V, = 1V 1,, + o C - ns TPZL = V, = 1V 1,, + o C - ns = 1V, = 1V 1,, + o C - ns 1. All voltages referenced to device GND.. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = pf, RL = K, Input TR, TF < ns.. CL = pf, RL = 1K, Input TR, TF < ns. TABLE. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS Supply Current IDD = V, VIN = or GND 1, + o C - 7. A N Threshold Voltage VNTH = 1V, ISS = -1 A 1, + o C V N Threshold Voltage VTN = 1V, ISS = -1 A 1, + o C - 1 V Delta P Threshold Voltage VTP = V, IDD = 1 A 1, + o C.. V P Threshold Voltage VTP = V, IDD = 1 A 1, + o C - 1 V Delta Functional F = 1V, VIN = or GND = 3V, VIN = or GND 1 + o C VOH > / Time TPHL TPLH 1. All voltages referenced to device GND.. CL = pf, RL = K, Input TR, TF < ns. VOL < / = V 1,, 3, + o C x + o C Limit 3. See Table for + o C limit.. Read and Record TABLE. BURN-IN AND LIFE TEST DELTA PARAMETERS + o C PARAMETER SYMBOL DELTA LIMIT Supply Current - MSI-1 IDD. A Output Current (Sink) IOL % x Pre-Test Reading Output Current (Source) IOHA % x Pre-Test Reading V ns TABLE. APPLICABLE SUBGROUPS CONFORMANCE GROUP MIL-STD-3 METHOD GROUP A SUBGROUPS READ AND RECORD Initial Test (Pre Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA Interim Test 1 (Post Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA FN319 Rev. Page of 9
6 CD19BMS TABLE. APPLICABLE SUBGROUPS MIL-STD-3 CONFORMANCE GROUP METHOD GROUP A SUBGROUPS READ AND RECORD Interim Test (Post Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA PDA (Note 1) 1% 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 1% 1, 7, 9 IDD, IOL, IOHA PDA (Note 1) 1% 1, 7, 9, Deltas Final Test 1%, 3, A, B, 1, 11 Group A Sample 1,, 3, 7, A, B, 9, 1, 11 Group B Subgroup B- Sample 1,, 3, 7, A, B, 9, 1, 11, Deltas Subgroups 1,, 3, 9, 1, 11 Subgroup B- Sample 1, 7, 9 Group D Sample 1,, 3, A, B, 9 Subgroups 1, 3 NOTE: 1. % Parameteric, 3% Functional; Cumulative for Static 1 and. TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-3 TEST READ AND RECORD CONFORMANCE GROUPS METHOD PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD Group E Subgroup 1, 7, 9 Table 1, 9 Table TABLE. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION OPEN GROUND 9V -.V khz khz Static Burn-In 1 (Note 1),, 11-13, 3, -1, 1, 1 1, 1 Static Burn-In (Note 1),, ,, 7, 9, 1, 1, 1 Dynamic Burn-In (Note ) 1 1 1,,, 11, 13 3,, 1, 1 (Note 3), 7, 9, 1 (Note 3) Irradiation (Note ),, ,, 7, 9, 1, Each pin except Pin 1, and GND will have a series resistor of 1K %, = 1V.V. Each pin except Pin 1, and GND will have a series resistor of 7K %; Group E, Subgroup, sample size is dice/wafer, failures, = 1V.V 3. Pin voltage is /. Each pin except Pin 1, and GND will have a series resistor of.7k %, = 1V.V. Logic Diagram * A 3 (, 1, 1) * ENABLE A (7, 9, 1) LEVEL SHIFTER LEVEL SHIFTER = 1 = 1 = E (, 11, 13) * ALL INPUTS ARE PROTECTED BY CMOS PROTECTION NETWORK INPUTS TRUTH TABLE OUTPUTS A, B, C, D ENABLE A, B, C, D E, F, G, H X Z Logic = Low() X = Don t care Z = High impedance Logic 1 = at Inputs and at Outputs FIGURE 1. 1 OF UNITS FN319 Rev. Page of 9
7 CD19BMS Typical Performance Characteristics OUTPUT LOW (SINK) CURRENT (IOL) (ma) GATE-TO-SOURCE VOLTAGE (VGS) = 1V 1V V OUTPUT LOW (SINK) CURRENT (IOL) (ma) GATE-TO-SOURCE VOLTAGE (VGS) = 1V 1V V 1 1 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS 1 1 DRAIN-TO-SOURCE VOLTAGE (VDS) (V) FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -V -1V -1V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) DRAIN-TO-SOURCE VOLTAGE (VDS) (V) GATE-TO-SOURCE VOLTAGE (VGS) = -V -1V -1V OUTPUT HIGH (SOURCE) CURRENT (IOH) (ma) FIGURE. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS FIGURE. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS TRANSITION TIME (tthl, ttlh) (ns) 1 1 SUPPLY VOLTAGE () = V 1V 1V HIGH-TO-LOW PROPAGATION DELAY TIME (tphl) (ns) = V, = 1V = V, = 1V = 1V, = 1V 1 LOAD CAPACITANCE (CL) (pf) FIGURE. TYPICAL TRANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE LOAD CAPACITANCE (CL) (pf) FIGURE 7. TYPICAL HIGH-TO-LOW PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE FN319 Rev. Page 7 of 9
8 CD19BMS Typical Performance Characteristics (Continued) LOW-TO-HIGH PROPAGATION DELAY TIME (tplh) (ns) = V, = 1V = 1V, = 1V = V, = 1V LOAD CAPACITANCE (CL) (pf) FIGURE. TYPICAL LOW-TO-HIGH PROPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE INPUT SWITCHING VOLTAGE (VSWITCH) (V) 1. VIN VOUT % *VSWITCH ENABLE = = V = 1V SUPPLY VOLTAGE () (V) = 1V * VSWITCH = INPUT VOLTAGE AT WHICH OUTPUT LEVEL IS % OF FIGURE 9. TYPICAL INPUT SWITCHING AS A FUNCTION OF HIGH LEVEL SUPPLY VOLTAGE SUPPLY VOLTAGE () (V) 1 1 RECOMMENDED OPERATING BOUNDARY 1 1 SUPPLY VOLTAGE () (V) FIGURE 1. HIGH LEVEL SUPPLY VOLTAGE vs LOW LEVEL SUPPLY VOLTAGE DISSIPATION PER LEVEL SHIFTER (PD) ( W) 1 = V, = 1V 1 = V, = 1V = 1V, = 1V 1 3 = V, = 1V 1 LOAD CAPACITANCE CL = pf CL = 1pF INPUT FREQUENCY (fi) (khz) FIGURE 11. TYPICAL DYNAMIC POWER DISSIPATION AS A FUNCTION OF INPUT FREQUENCY Test Circuit and Waveform A INPUT (SEE TABLE) PULSE GENERATOR 1K B RS (SEE CL TABLE) pf OUTPUT TEST VOLTAGE CHAR AT A AT B tphz tplz tpzl tpzh ENABLE % % INPUT tplz tpzl 9% OUTPUT 1% VOL OUTPUT 9% VOH 1% tphz tpzh FIGURE 1. OUTPUT ENABLE DELAY TIMES TEST CIRCUIT AND WAVEFORMS FN319 Rev. Page of 9
9 CD19BMS Chip Dimensions and Pad Layout Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (1-3 inch). METALLIZATION: Thickness: 11kÅ 1kÅ, AL. PASSIVATION: 1.kÅ - 1.kÅ, Silane BOND PADS:. inches X. inches MIN DIE THICKNESS:.19 inches -.1 inches Copyright Intersil Americas LLC All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO91 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN319 Rev. Page 9 of 9
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