PS381/PS383/PS385. Precision, 17V Analog Switches. Features. Applications. Functional Diagrams, Pin Configurations, and Truth Tables
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1 Features Low On-Resistance (Ω typ) Minimizes Distortion and Error Voltages Low Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, pc typ Single Supply (+V to +V) or Split-Supply (+V to +V) Operation Improved Second Sources for MAX/MAX/MAX On-Resistance Matching Between Channels,. Ω typ On-Resistance Flatness, Ω typ Low Off-Channel Leakage, + o C TTL/CMOS Logic Compatible Rail-to-Rail Analog Signal Dynamic Range Low Power Consumption <µa Applications Instrumentation, ATE Sample-and-Holds Audio Switching and Routing Telecommunication Systems PBX, PABX Battery-Powered Systems Ω. ΩΩ Ω Ω Ω Functional Diagrams, Pin Configurations, and Truth Tables NO NO NO IN IN IN N.C PS NC NC PS NO NO PS 7 IN 7 IN 7 IN 9 NO 9 NO 9 NO Top View Top View Top View. N.C = No Connect. Switches shown for logic input
2 Absolute Maximum Ratings Voltages Referenced to V to +7V V to +7V V to () +.V V IN, V, V NC, V NO (Note ).... () -V to () +V or ma, whichever occurs first Current (any terminal) ma Peak Current,, NO, NC (pulsed at ms, % duty cycle) ma ESD per Method >V Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Electrical Specifications - Dual Supplies (V± = ± V ±%, = V, V INH =.V, V INL =.V) Thermal Information Continuous Power Dissipation (T A = +7 º C) Plastic DIP (derate.mw/ º C above +7 º C) mw Narrow SO (derate.7mw/ º C above +7 º C) mw Storage Temperature º C to + º C Lead Temperature (soldering, s) º C Note : Signals on NC, NO,, or IN exceeding or are clamped by internal diodes. Limit forward diode current to maximum current rating Ω
3 Electrical Specifications - Dual Supplies (continued) (V ± = ± V ±%, = V, V INH =.V, V INL =.V) Ω Ω Ω µ µ Notes:. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.. Guaranteed by design. R ΟΝ = R ΟΝ max R ΟΝ min. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.. Leakage parameters are % tested at maximum rated hot temperature and guaranteed by correlation at +ºC. 7. Off Isolation = log [ V / (V NO or V NO ) ]. See figure.. Between any two switches. See figure.
4 Electrical Specifications - Single +V Supply ( = +V ±%, = V, = V, V INH =.V, V INL =.V) Ω Α Ω, µ
5 Electrical Specifications - Single +.V Supply ( = +V to.v, = V, = V, V NH =.V, V INL =.V) Ω Notes:. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.. Guaranteed by design. R ΟΝ = R ΟΝ max R ΟΝ min. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.. Leakage parameters are % tested at maximum rated hot temperature and guaranteed by correlation at +ºC. 7. Off Isolation = log [ V / (V NO or V NO ) ]. See figure.. Between any two switches. See figure. 9. Leakage testing at single-supply is guaranteed by testing with dual supplies. Ω µ
6 ON (Ω) = +V = V R ON ( ) T A = + C T A = + C T A = - C V(V)
7 Typical Operating Characteristics (continued) Leakage Current na pa pa pa.pa Leakage Current vs. Temperature V± = ±V I (ON) I NC, NO (OFF), I (OFF) V IN (V) Input Switching Threshold vs. Supply Voltages.pA Temperature ( C) ± ± ± ± ±7 ±, (±V) = +.V = -.V Supply Current vs. V IN Switching Times vs. Supply Voltage I+ (ma) t ON, t OFF (ns) t ON t OFF - - V IN - Logic Control Voltage (V) ± ± ± ± ±7 ±, (±V) Switching Times Switching Times vs. Temperature v± = ±v ton toff I+, I- (ma) Supply Currents vs. Switching Frequency... = +V = -V V IN = V P-P I+ I- - Temperature ( C) Frequency (MHz) 7
8 Test Circuits/Timing Diagrams Figure. Switching Time Figure. Break-Before-Make Interval (PS only) Figure. Charge Injection
9 Test Circuits/Timing Diagrams (continued) nf +V nf +V Signal Generator dbm N Ω Analyzer NC or NO IN V or.v Analyzer V or.v IN N IN V or.v NC R L -V nf R L -V nf Figure. Off Isolation Figure. Crosstalk nf +V nf +V Capacitance Meter f = MHz NC or NO IN V or.v Capacitance Meter f = khz NC or NO EN IN V or.v -V nf Figure 7. Channel-Off Capacitance Part Temp. Range Package Figure. Channel-On Capacitance PSCPE ºC to +7ºC Plastic DIP PSCSE ºC to +7ºC Narrow SO PSEPE -ºC to +ºC Plastic DIP PSESE -ºC to +ºC Narrow SO PSCPE ºC to +7ºC Plastic DIP PSCSE ºC to +7ºC Narrow SO PSEPE -ºC to +ºC Plastic DIP PSESE -ºC to +ºC Narrow SO PSCPE ºC to +7ºC Plastic DIP PSCSE ºC to +7ºC Narrow SO PSEPE -ºC to +ºC Plastic DIP PSESE -ºC to +ºC Narrow SO 9
Features. Functional Diagrams, Pin Configurations, and Truth Tables
Features Low On-Resistance (Ω typ) Minimizes Distortion and Error Voltages Low Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, pc typ Single-Supply Operation (+.V to +1V) Improved
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