Features. Ultra-low Q g x R DS(ON) figure-of-merit F202. Top. T A =25 o C unless otherwise noted
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1 P-Channel 2.5V pecified PowerTrench BGA MOFET January 24 General Description Combining Fairchild s advanced 2.5V specified PowerTrench process with state of the art BGA packaging, the minimizes both PCB space and R D(ON). This BGA MOFET embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultralow profile packaging, low gate charge, and low R D(ON). Applications Battery management Load switch Battery protection Features 5.5 A, 2 V. R D(ON) = 45 V G = 4.5 V R D(ON) = 75 V G = 2.5 V Occupies only 5 mm 2 of PCB area: only 55% of the area of OT-6 Ultra-thin package: less than.8 mm height when mounted to PCB Outstanding thermal transfer characteristics: 4 times better than OT-6 Ultra-low Q g x R D(ON) figure-of-merit High power and current handling capability D D D Pin G F22 G Pin D D D Bottom Top D Absolute Maximum Ratings T A =25 o C unless otherwise noted ymbol Parameter Ratings Units V D Drain-ource Voltage 2 V V G Gate-ource Voltage ±2 V I D Drain Current Continuous (Note a) 5.5 A Pulsed 2 P D Power Dissipation (teady tate) (Note a) 2 W T J, T TG Operating and torage Junction Temperature Range 55 to +5 C Thermal Characteristics R θja Thermal Resistance, Junction-to-Ambient (Note a) 64 C/W R θjb Thermal Resistance, Junction-to-Ball (Note ) 8 C/W R θjc Thermal Resistance, Junction-to-Case (Note ).7 C/W Package Marking and Ordering Information Device Marking Device Reel ize Tape width Quantity 22P 7 8mm 3 units 24 Fairchild emiconductor Corporation Rev. D2 (W)
2 Electrical Characteristics T A = 25 C unless otherwise noted ymbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV D Drain ource Breakdown Voltage V G = V, I D = 25 µa 2 V BVD T J Breakdown Voltage Temperature Coefficient I D = 25 µa, Referenced to 25 C 7 mv/ C I D Zero Gate Voltage Drain Current V D = 6 V, V G = V µa I GF Gate Body Leakage, Forward V G = 2 V, V D = V na I GR Gate Body Leakage, Reverse V G = 2 V, V D = V na On Characteristics (Note 2) V G(th) Gate Threshold Voltage V D = V G, I D = 25 µa V VG(th) Gate Threshold Voltage I D = 25 µa, Referenced to 25 C 3 mv/ C T J Temperature Coefficient R D(on) tatic Drain ource On Resistance V G = 4.5 V, I D = 5.5 A V G = 2.5 V, I D = 4. A V G = 4.5 V, I D = 5.5 A, T J =25 C mω g F Forward Transconductance V D = 5 V, I D = 5.5 A 5 Dynamic Characteristics C iss Input Capacitance V D = V, V G = V, 884 pf C oss Output Capacitance f =. MHz 258 pf Reverse Transfer Capacitance 3 pf C rss witching Characteristics (Note 2) t d(on) Turn On Delay Time V DD = 6 V, I D = A, 2 22 ns t r Turn On Rise Time V G = 4.5 V, R GEN = 6 Ω 9 8 ns t d(off) Turn Off Delay Time ns Turn Off Fall Time ns t f Q g Total Gate Charge V D = V, I D = 5.5 A, 9 3 nc Q gs Gate ource Charge V G = 4.5 V 2 nc Gate Drain Charge 3 nc Q gd Drain ource Diode Characteristics and Maximum Ratings I Maximum Continuous Drain ource Diode Forward Current.7 A V D Drain ource Diode Forward V G = V, I =.7 A (Note 2).76.2 V Voltage t rr Diode Reverse Recovery Time I F = 5.5 A, 25 n Diode Reverse Recovery Charge d if /d t = A/µs 26 nc Q rr Notes:. R θja is determined with the device mounted on a in² 2 oz. copper pad on a.5 x.5 in. board of FR-4 material. The thermal resistance from the junction to the circuit board side of the solder ball, R θjb, is defined for reference. For R θjc, the thermal reference point for the case is defined as the top surface of the copper chip carrier. R θjc and R θjb are guaranteed by design while R θja is determined by the user's board design. a) 64 C/W when mounted on a in 2 pad of 2 oz copper,.5 x.5 x.62 thick PCB b) 28 C/W when mounted on a minimum pad of 2 oz copper cale : on letter size paper 2. Pulse Test: Pulse Width < 3µs, Duty Cycle < 2.% Rev D2 (W)
3 Dimensional Outline and Pad Layout Rev D2 (W)
4 Typical Characteristics -I D, DRAIN CURRENT (A) 2 V G = -4.5V -3.V -3.5V -2.5V V R D(ON), NORMALIZED DRAIN-OURCE ON-REITANCE V G = -2.5V -3.V -3.5V -4.V -4.5V VD, DRAIN-OURCE VOLTAGE (V) I D, DRAIN CURRENT (A) Figure. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. R D(ON), NORMALIZED DRAIN-OURCE ON-REITANCE I D = -5.5A V G = -4.5V R D(ON), ON-REITANCE (OHM) T A = 25 o C T A = 25 o C I D = -2.8 A T J, JUNCTION TEMPERATURE ( o C) V G, GATE TO OURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-ource Voltage. -I D, DRAIN CURRENT (A) 5 T A = -55 o C 25 o C V D = -5V 25 o C V G, GATE TO OURCE VOLTAGE (V) -I, REVERE DRAIN CURRENT (A).... V G = V T A = 25 o C 25 o C -55 o C V D, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with ource Current and Temperature. Rev D2 (W)
5 Typical Characteristics -V G, GATE-OURCE VOLTAGE (V) 5 I D = -5.5A V D = -5V -V 4-5V Q g, GATE CHARGE (nc) CAPACITANCE (pf) C O C I C R V D, DRAIN TO OURCE VOLTAGE (V) f = MHz V G = V Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. 5 I D, DRAIN CURRENT (A). R D(ON) LIMIT V G = -4.5V INGLE PULE R JA = 28 o C/W T A = 25 o C DC.. s ms ms ms V D, DRAIN-OURCE VOLTAGE (V) P(pk), PEAK TRANIENT POWER (W) INGLE PULE R πja = 28 C/W T A = 25 C... t, TIME (sec) Figure 9. Maximum afe Operating Area. Figure. ingle Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANIENT THERMAL REITANCE. D = R θja (t) = r(t) + R θja R θja = 28 C/W t t 2 T J - T A = P * R θja (t) Duty Cycle, D = t / t 2 INGLE PULE.... t, TIME (sec) Figure. Transient Thermal Response Curve. P(pk) Thermal characterization performed using the conditions described in Note b. Transient thermal response will change depending on the circuit board design. Rev D2 (W)
6 TRADEMARK The following are registered and unregistered trademarks Fairchild emiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROVOLT DOME EcoPARK E 2 CMO TM Enigna TM FACT DICLAIMER FAIRCHILD EMICONDUCTOR REERVE THE RIGHT TO MAKE CHANGE WITHOUT FURTHER NOTICE TO ANY PRODUCT HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DEIGN. FAIRCHILD DOE NOT AUME ANY LIABILITY ARIING OUT OF THE APPLICATION OR UE OF ANY PRODUCT OR CIRCUIT DECRIBED HEREIN; NEITHER DOE IT CONVEY ANY LICENE UNDER IT PATENT RIGHT, NOR THE RIGHT OF OTHER. LIFE UPPORT POLICY FAIRCHILD PRODUCT ARE NOT AUTHORIZED FOR UE A CRITICAL COMPONENT IN LIFE UPPORT DEVICE OR YTEM WITHOUT THE EXPRE WRITTEN APPROVAL OF FAIRCHILD EMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT TATU DEFINITION Definition of Terms FACT Quiet eries FAT FATr FP FRFET GlobalOptoisolator GTO HieC I 2 C ImpliedDisconnect Across the board. Around the world. The Power Franchise Programmable Active Droop IOPLANAR LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MX MXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerTrench QFET Q QT Optoelectronics Quiet eries RapidConfigure RapidConnect ILENT WITCHER MART TART PM tealth 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product tatus Definition uperfet uperot -3 uperot -6 uperot -8 yncfet TinyLogic TINYOPTO TruTranslation UHC UltraFET VCX Advance Information Preliminary No Identification Needed Formative or In Design First Production Full Production This datasheet contains the design specifications for product development. pecifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild emiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild emiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I7
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