FDC6301N Dual N-Channel, Digital FET

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September FC6N ual N-Channel, igital FET General escription These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild 's proprietary, high cell density,

This device has been designed especially for low voltage applications as a replacement for digital transistors.

1 September FC6N ual N-Channel, igital FET General escription These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild 's proprietary, high cell density, MOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, these N-Channel FET's can replace several digital transistors, with a variety of bias resistors. Features V, A continuous,. A Peak. R S(ON) = V =.7 V R S(ON) = V =. V. Very low level gate drive requirements allowing direct operation in V circuits. V (th) <.V. Gate-Source Zener for ES ruggedness. >6kV Human Body Model. SOT- SuperSOT TM -6 SuperSOT TM -8 SO-8 SOT- SOIC-6 Mark:. INVERTER APPLICATION Vcc OUT 6 IN G S GN Absolute Maximum Ratings T A = o C unless other wise noted Symbol Parameter FC6N Units V SS, V CC rain-source Voltage, Power Supply Voltage V V S, V IN Gate-Source Voltage, V IN -. to +8 V I, I OUT rain/output Current - Continuous A - Pulsed. P Maximum Power issipation (Note a) (Note b).9 W.7,T STG Operating and Storage Temperature Range - to C ES Electrostatic ischarge Rating MIL-ST-88 Human Body Model (pf / Ohm) 6. kv THERMAL CHARACTERISTICS R θja Thermal Resistance, Junction-to-Ambient (Note a) C/W R θjc Thermal Resistance, Junction-to-Case (Note ) 6 C/W Fairchild Semiconductor Corporation FC6N Rev.

2 Electrical Characteristics (T A = O C unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BV SS rain-source Breakdown Voltage V = V, I = µa V BV SS / Breakdown Voltage Temp. Coefficient I = µa, Referenced to o C mv / o C I SS Zero Gate Voltage rain Current V S = V, V = V µa = C µa I S Gate - Body Leakage Current V = 8 V, V S = V na ON CHARACTERISTICS (Note ) V (th) / Gate Threshold Voltage Temp.Coefficient I = µa, Referenced to o C -. mv / o C V (th) Gate Threshold Voltage V S = V, I = µa.6.8. V R S(ON) Static rain-source On-Resistance V =.7 V, I = A.8 Ω = C 6. 9 V =. V, I =. A. I (ON) On-State rain Current V =.7 V, V S = V A g FS Forward Transconductance V S = V, I =. A S YNAMIC CHARACTERISTICS C iss Input Capacitance V S = V, V = V, 9. pf C oss Output Capacitance f =. MHz 6 pf C rss Reverse Transfer Capacitance. pf SWITCHING CHARACTERISTICS (Note ) t (on) Turn - On elay Time V = 6 V, I =. A, ns t r Turn - On Rise Time V =. V, R GEN = Ω. ns t (off) Turn - Off elay Time 8 ns t f Turn - Off Fall Time. 7 ns Q g Total Gate Charge V S = V, I = A,.9.7 nc Q gs Gate-Source Charge V =. V nc Q gd Gate-rain Charge.7 nc Inverter Electrical Characteristics (T A = C unless otherwise noted) I O (off) Zero Input Voltage Output Current V CC = V, V I = V µa V I (off) Input Voltage V CC = V, I O = µa. V V I (on) V O =. V, I O =. A V R O (on) Output to Ground Resistance V I =.7 V, I O = A.8 Ω Notes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. R θja shown below for single device operation on FR- in still air. a. O C/W on a in pad of oz copper. b. 8 O C/W on a. in of pad of oz copper.. Pulse Test: Pulse Width < µs, uty Cycle <.%. FC6N Rev.

3 S Typical Electrical Characteristics I, RAIN-SOURCE CURRENT (A).... V =.V...7 V, RAIN-SOURCE VOLTAGE (V) S... R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE...8 V =.V I, RAIN CURRENT (A).. Figure. On-Region Characteristics. Figure. On-Resistance Variation with rain Current and Gate Voltage. R S(ON), NORMALIZE RAIN-SOURCE ON-RESISTANCE I = A V =.7 V R S(on), ON-RESISTANCE (OHM) 9 6 C I = A C T, JUNCTION TEMPERATURE ( C) J... V, GATE TO SOURCE VOLTAGE (V) Figure. On-Resistance Variation with Temperature. Figure. On Resistance Variation with Gate-To- Source Voltage. I, RAIN CURRENT (A)... V =.V S T = - C J C C I, REVERSE RAIN CURRENT (A).... V = V T = C J C - C... V, GATE TO SOURCE VOLTAGE (V) V, BOY IOE FORWAR VOLTAGE (V) S Figure. Transfer Characteristics. Figure 6. Body iode Forward Voltage Variation with Source Current and Temperature. FC6N Rev.

4 Typical Electrical Characteristics (continued) V, GATE-SOURCE VOLTAGE (V) I = A Q, GATE CHARGE (nc) g V S = V V V CAPACITANCE (pf) f = MHz V = V.. V, RAIN TO SOURCE VOLTAGE (V) S C iss C oss C rss Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics. I, RAIN CURRENT (A).... RS(ON) LIMIT V =.7V SINGLE PULSE R θja =See note b T A = C.. C s V, RAI N-SOURCE VOLTAGE (V) S ms ms ms POWER (W).. SINGLE PULSE TIME (SEC) SINGLE PULSE R θja=see note b T A = C Figure 9. Maximum Safe Operating Area. Figure. Single Pulse Maximum Power issipation. r(t), NORMALIZE EFFECTIVE TRANSIENT THERMAL RESISTANCE.... =..... Single Pulse..... t, TIME (sec) P(pk) R θja (t) = r(t) * R θja R θja = See Note b t t - T = P * R (t) A θja uty Cycle, = t / t Figure. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note b.transient thermal response will change depending on the circuit board design. FC6N Rev.

5 TRAEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks ACEx Bottomless CoolFET CROSSVOLT ensetrench OME EcoSPARK E CMOS TM EnSigna TM FACT FACT Quiet Series STAR*POWER is used under license ISCLAIMER FAIRCHIL SEMICONUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PROUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR ESIGN FAIRCHIL OES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PROUCT OR CIRCUIT ESCRIBE HEREIN; NEITHER OES IT CONVEY ANY LICENSE UNER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHIL S PROUCTS ARE NOT AUTHORIZE FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT EVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHIL SEMICONUCTOR CORPORATION As used herein: Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user PROUCT STATUS EFINITIONS efinition of Terms FAST â FASTr FRFET GlobalOptoisolator GTO HiSeC I C ISOPLANAR LittleFET MicroFET MicroPak MICROWIRE OPTOLOGIC â OPTOPLANAR PACMAN POP Power7 PowerTrench QFET QS A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness atasheet Identification Product Status efinition â QT Optoelectronics Quiet Series SILENT SWITCHER â SMART START SPM STAR*POWER Stealth SuperSOT - SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TruTranslation UHC UltraFET â VCX Advance Information Preliminary No Identification Needed Formative or In esign First Production Full Production This datasheet contains the design specifications for product development Specifications may change in any manner without notice This datasheet contains preliminary data, and supplementary data will be published at a later date Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design This datasheet contains final specifications Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor The datasheet is printed for reference information only Rev H

FDC6322C Dual N & P Channel, Digital FET

FDC6322C Dual N & P Channel, Digital FET November 997 FC6C ual N & P Channel, igital FET General escription These dual N & P Channel logic level enhancement mode field effec transistors are produced using Fairchild's proprietary, high cell density,