NDS356P P-Channel Logic Level Enhancement Mode Field Effect Transistor
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- Toby McKenzie
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1 March 996 NS356P P-Channel Logic Level Enhancemen Mode Field Effec Transisor General escripion These P-Channel logic level enhancemen mode power field effec ransisors are produced using Fairchild's proprieary, high cell densiy, MOS echnology. This very high densiy process is especially ailored o minimize on-sae resisance. These devices are paricularly suied for low volage applicaions such as noebook compuer power managemen, porable elecronics, and oher baery powered circuis where fas high-side swiching, and low in-line power loss are needed in a very small ouline surface moun package. Feaures -. A, V. R S(ON) V =.5V. Proprieary package design using copper lead frame for superior hermal and elecrical capabiliies. High densiy cell design for exremely low R S(ON). Excepional on-resisance and maximum C curren capabiliy. Compac indusry sandard SOT3 surface moun package. G S Absolue Maximum Raings T A = 5 C unless oherwise noed Symbol Parameer NS356P Unis V SS rain-source Volage V V S Gae-Source Volage - Coninuous ± V I Maximum rain Curren - Coninuous (Noe a) ±. A - Pulsed ± P Maximum Power issipaion (Noe a).5 W (Noe b).46,t STG Operaing and Sorage Temperaure Range -55 o 5 C THERMAL CHARACTERISTICS R θja Thermal Resisance, Juncion-o-Ambien (Noe a) 5 C/W R θjc Thermal Resisance, Juncion-o-Case (Noe ) 75 C/W 997 Fairchild Semiconducor Corporaion NS356P Rev. E
2 Elecrical Characerisics (T A = 5 C unless oherwise noed) Symbol Parameer Condiions Min Typ Max Unis OFF CHARACTERISTICS BV SS rain-source Breakdown Volage V = V, I = 5 µa V I SS Zero Gae Volage rain Curren V S = V, V = V -5 µa =5 C µa I SF Gae - Body Leakage, Forward V = V, V S = V na I SR Gae - Body Leakage, Reverse V = V, V S = V - na ON CHARACTERISTICS (Noe ) V (h) Gae Threshold Volage V S = V, I = 5 µa V =5 C R S(ON) Saic rain-source On-Resisance V =.5 V, I = -. A.3 Ω =5 C.4 V = - V, I = -.3 A. I (ON) On-Sae rain Curren V =.5 V, V S = -5 V A g FS Forward Transconducance V S = -5 V, I = -. A.8 S YNAMIC CHARACTERISTICS C iss Inpu Capaciance V S = - V, V = V, 8 pf C oss Oupu Capaciance f =. MHz 55 pf C rss Reverse Transfer Capaciance 6 pf SWITCHING CHARACTERISTICS (Noe ) d(on) Turn - On elay Time V = - V, I = - A, 7 5 ns r Turn - On Rise Time V = - V, R GEN = 5 Ω 7 3 ns d(off) Turn - Off elay Time 56 9 ns f Turn - Off Fall Time 4 8 ns Q g Toal Gae Charge V S = - V, I = -. A, nc Q gs Gae-Source Charge V = -5 V.5 nc Q gd Gae-rain Charge nc NS356P Rev. E
3 Elecrical Characerisics (T A = 5 C unless oherwise noed) Symbol Parameer Condiions Min Typ Max Unis RAIN-SOURCE IOE CHARACTERISTICS AN MAXIMUM RATIN I S Maximum Coninuous rain-source iode Forward Curren -.6 A I SM Maximum Pulsed rain-source iode Forward Curren A V S rain-source iode Forward Volage V = V, I S = -. A (Noe ) V Noes:. R θja is he sum of he juncion-o-case and case-o-ambien hermal resisance where he case hermal reference is defined as he solder mouning surface of he drain pins. R θjc is guaraneed by design while R θca is deermined by he user's board design. P () = T A = T A = RθJ A() RθJ C+RθCA() I () R S(ON ) TJ Typical R θja using he board layous shown below on 4.5"x5" FR PCB in a sill air environmen: a. 5 o C/W when mouned on a. in pad of oz cpper. b. 7 o C/W when mouned on a. in pad of oz cpper. a b Scale : on leer size paper. Pulse Tes: Pulse Widh < 3µs, uy Cycle <.%. NS356P Rev. E
4 Typical Elecrical Characerisics I, RAIN-SOURCE CURRENT (A) -5 - V = -V R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE V =.5 V V, RAIN-SOURCE VOLTAGE (V) S I, RAIN CURRENT (A) -5 Figure. On-Region Characerisics Figure. On-Resisance Variaion wih rain Curren and Gae Volage R S(ON), NORMALIZE RAIN-SOURCE ON-RESISTANCE...9 I = -. A V =.5 V T, JUNCTION TEMPERATURE ( C) J R S(on), NORMALIZE RAIN-SOURCE ON-RESISTANCE V = 4.5V - T = 5 C J 5 C -55 C I, RAIN CURRENT (A) -5 Figure 3. On-Resisance Variaion wih Temperaure Figure 4. On-Resisance Variaion wih rain Curren and Temperaure I, RAIN CURRENT (A) - V S = V T = -55 C J 5 V, GATE TO SOURCE VOLTAGE (V) 5 V h, NORMALIZE GATE-SOURCE THRESHOL VOLTAGE (V) V S = V I = 5µA , JUNCTION TEMPERATURE ( C) Figure 5. Transfer Characerisics Figure 6. Gae Threshold Variaion wih Temperaure NS356P Rev. E
5 S Typical Elecrical Characerisics (coninued) BV SS, NORMALIZE RAIN-SOURCE BREAKOWN VOLTAGE (V) I = 5µA , JUNCTION TEMPERATURE ( C) -I, REVERSE RAIN CURRENT (A) V = V T = 5 C J 5 C -55 C V S, BOY IOE FORWAR VOLTAGE (V) -.8 Figure 7. Breakdown Volage Variaion wih Temperaure Figure 8. Body iode Forward Volage Variaion wih Source Curren and Temperaure CAPACITANCE (pf) f = MHz V = V V, RAIN TO SOURCE VOLTAGE (V) S C iss C oss C rss V, GATE-SOURCE VOLTAGE (V) - I = -. A V = -5 V S Q g, GATE CHARGE (nc) Figure 9. Capaciance Characerisics Figure. Gae Charge Characerisics V IN V R L V OUT d(on) on r 9% d(off) off 9% f V V OUT % R GEN G UT % 9% S V IN 5% 5% % PULSE WITH INVERTE Figure. Swiching Tes Circui Figure. Swiching Waveforms NS356P Rev. E
6 Typical Elecrical Characerisics (coninued) g, TRANSCONUCTANCE (SIEMENS) FS T = -55 C J 5 C 5 C I, RAIN CURRENT (A) V = -5V S - - I, RAIN-SOURCE CURRENT (A) RS(ON) LIMIT V = -V SINGLE PULSE T A = 5 C C ms s s ms - V, RAIN-SOURCE VOLTAGE (V) S us ms Figure 3. Transconducance Variaion wih rain Curren and Temperaure Figure 4. Maximum Safe Operaing Area.5 =.5 r(), NORMALIZE EFFECTIVE TRANSIENT THERMAL RESISTANCE R θja () = r() * R θja R = 5 C/W θja.. P(pk)...5 Single Pulse - T = P * R () A θja. uy Cycle, = / , TIME (sec) Figure 5. Transien Thermal Response Curve Noe : Characerizaion performed using he condiions described in noe c. Transien hermal response will change depending on he circui board design. NS356P Rev. E
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July 2 AO482 Dual N-Channel Enhancement Mode Field Effect Transistor General Description The AO482 uses advanced trench technology to provide excellent R DS(ON) and low gate charge. They offer operation
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Converer - Brake - Inverer Module (CBI2) 21 22 D11 D13 D1 1 2 3 7 D7 16 1 T1 D1 T3 D3 T D 18 2 6 17 19 4 D12 D14 D16 T7 T2 D2 T4 D4 T6 D6 23 14 24 11 1 12 13 NTC 8 9 Three Phase Brake Chopper Three Phase
More informationMax Q1. Symbol V GS I DM 15 I DSM 7.8 I AS E AS V SPIKE P D 2.5 P DSM. Junction and Storage Temperature Range T J, T STG
3V Dual Asymmetric N-Channel AlphaMOS General Description Latest Trench Power AlphaMOS (αmos LV) technology Very Low RDS(on) at 4.V GS Low Gate Charge High Current Capability RoHS and Halogen-Free Compliant
More informationFeatures. Symbol Parameter Rating Units V DS Drain-Source Voltage 40 V V GS Gate-Source Voltage ±20 V
General escription These N-Channel enhancement mode power field effect transistors are using trench MO technology. This advanced technology has been especially tailored to minimize on-state resistance,
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Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC
More informationConverter - Brake - Inverter Module (CBI3)
MUBW 35-12 8 Converer - Brake - Inverer Module (CBI3) 21 22 D11 D13 D15 1 2 3 7 D7 1 15 T1 D1 T3 D3 T5 D5 18 2 17 5 19 4 D12 D14 D1 23 14 24 T7 11 1 T2 D2 T4 D4 T D 12 13 See ouline drawing for pin arrangemen
More informationFeatures. T A =25 o C unless otherwise noted
NDS65 NDS65 P-Channel Enhancement Mode Field Effect Transistor General Description These P-Channel enhancement mode field effect transistors are produced using ON Semiconductor s proprietary, high cell
More informationV DS. I D (at V GS =-4.5V) -40A R DS(ON) (at V GS =-1.8V) 100% UIS Tested 100% R g Tested. DFN 3x3_EP D
AON747 V PChannel MOSFET General Description The AON747 combines advanced trench MOSFET technology with a low resistance package to provide extremely low R DS(ON). This device is ideal for load switch
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PRODUCT SUMMARY D V (BR)DSS R DS(ON) I D -4V 15mΩ -45A G 1. GATE 2. DRAIN 3. SOURCE ABSOLUTE MAXIMUM RATINGS (T A = 25 C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS Drain-Source
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PI74STXG6 4567890456789045678904567890456789045678904567890456789045678904567890456789045678904567890 4567890456789045678904567890456789045678904567890456789045678904567890456789045678904567890 SOTiny
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Converer - Brake - Inverer Module (CBI2) 21 22 D11 D13 D15 1 2 3 7 D7 16 15 T1 D1 T3 D3 T5 D5 18 6 17 5 19 4 D12 D14 D16 T7 T2 D2 T4 D4 T6 D6 23 14 24 11 12 13 NTC 8 9 Three Phase Brake Chopper Three Phase
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epletion Mode MOSFET N-Channel V SX = V I (on) > 16A R S(on) 6m G TO-268 (IXTT) S G S (Tab) Symbol Test Conditions Maximum Ratings V SX = C to 17 C V V GX = C to 17 C, R GS = 1M V X Continuous 2 V M Transient
More information= 25 o C unless other wise noted Symbol Parameter N-Channel P-Channel Units. Drain-Source Voltage V. Gate-Source Voltage 8-8 V I D
November 998 FG63C ual N & P Channel igital FET General escription These dual N & P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density,
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General Description These N-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance,
More informationIXFH42N65X2A V DSS = 650V I D25. X2-Class HiPerFET TM Power MOSFET. = 42A 72m. Advance Technical Information. R DS(on) AEC Q101 Qualified
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1 Description These N-Channel enhancement mode power field effect transistors are produced using planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state
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More informationFeatures. Symbol Parameter Rating Units V DS Drain-Source Voltage 600 V V GS Gate-Source Voltage ±30 V
General Description These N-Channel enhancement mode power field effect transistors are planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance,
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4V Dual NChannel MOSFET General Description The AON64 uses advanced trench technology to provide excellent R DS(ON) with low gate charge. This is an all purpose device that is suitable for use in a wide
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YYWW Product Summary BV SS 3V R S(ON) Max.mΩ @ V GS = V.mΩ @ V GS = 4.V escription and Applications I Max T C = + C 7A A This MOSFET is designed to minimize the on-state resistance (R S(ON)) and yet maintain
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3V NChannel AlphaMOS General Description Latest Trench Power AlphaMOS (αmos LV) technology Very Low R DS(ON) at.5v V GS Low Gate Charge High Current Capability RoHS and HalogenFree Compliant Product Summary
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