FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers

Size: px

Start display at page:

Download "FOD060L, FOD260L, FOD063L LVTTL/LVCMOS 3.3V High Speed-10 MBit/s Logic Gate Optocouplers"

Kenneth Stephens
5 years ago
Views:

1 FOD060L, FOD60L, FOD063L LVTTL/LVCMOS 3.3V High Speed-0 MBit/s Logic Gate Optocouplers Single Channel: FOD060L, FOD60L Dual Channel: FOD063L Features Compact SO8 package (except FOD60L 8-pin DIP) Very high speed 0 MBit/s Superior CMR 0 kv/µs at,000v peak Fan-out of 8 over -40 C to +8 C Logic gate output Strobable output (single channel devices) Wired OR-open collector U.L. recognized (File # E90700) (pending) UDE approval pending Applications Ground loop elimination LSTTL to TTL, LSTTL or -volt CMOS Line receiver, data transmission Package 8 8 Truth Table (Positive Logic) 8 Input Enable Output H H L L H H H L H L L H H* NC* L* L* NC* H* Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface Description *Dual channel devices or single channel devices with pin 7 not connected. A 0. µf bypass capacitor must be connected between pins 8 and. (See note ) August 00 These optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate. Single channel devices include a strobable output. This output features an open collector, thereby permitting wired OR outputs. The output consists of bipolar transistors in a Bi-CMOS process for reduced power consumption. The coupled parameters are guaranteed over the temperature range of -40 C to +8 C. A maximum input signal of ma (3 ma for the FODX6XL versions) will provide a minimum output sink current of 3 ma (fan out of 8). An internal noise shield provides superior common mode rejection of typically 0 kv/µs at,000v common mode. N/C + V F _ 3 8 V CC 7 V E 6 V O N/C 4 GND Single-channel circuit drawing (FOD060L, FOD60L) + V F 3 V F 7 V 0 6 V GND Dual-channel circuit drawing (FOD063L) 8 V CC 00 Fairchild Semiconductor Corporation

2 Absolute Maximum Ratings (No derating required up to 8 C) Recommended Operating Conditions Parameter Symbol Value Units Storage Temperature T STG -40 to + C Operating Temperature T OPR -40 to +8 C EMITTER I F 0 ma DC/Average Forward Input Current (each channel) Enable Input Voltage Single Channel V E V CC + 0.V V Not to exceed VCC by more than 00 mv Reverse Input Voltage (each channel) V R.0 V Power Dissipation Single Channel P I 4 mw Dual Channel DETECTOR Supply Voltage V CC 7.0 V ( minute max) Output Current (each channel) I O 0 ma Output Voltage (each channel) V O 7.0 V Collector Output Power Dissipation Single Channel P O 8 mw Dual Channel Parameter Symbol Min Max Units Input Current, Low Level I FL 0 0 µa Input Current, High Level I FH *6.3 ma Supply Voltage, Output V CC V Enable Voltage, Low Level (Single Channel) V EL V Enable Voltage, High Level (Single Channel) V EH.0 V CC V Operating Temperature T A C Fan Out (TTL load) N 8 Output Pull-up Resistor R L 330 4K Ω *6.3 ma is a guard banded value which allows for at least 0% CTR degradation. Initial input current threshold value is.0 ma or less.

3 Electrical Characteristics (T A = -40 C to +8 C unless otherwise specified.) Individual Component Characteristics Parameter Test Conditions Symbol Min Typ** Max Unit EMITTER (I F = 0 ma) V F.8 V Input Forward Voltage T A = C.7 Input Reverse Breakdown Voltage (I R = 0 µa) B VR.0 V Input Capacitance (V F = 0, f = MHz) C IN pf Input Diode Temperature Coefficient (I F = 0 ma) VF/ TA mv/ C DETECTOR (V E = 0. V) Single Channel I CCH 7 ma High Level Supply Current (I F = 0 ma, V CC = 3.3 V) Dual Channel 0 Low Level Supply Current (V E = 0. V) Single Channel I CCL 0 ma (I F = 0 ma, V CC = 3.3 V) Dual Channel Low Level Enable Current (V CC = 3.3 V, V E = 0. V) Single Channel I EL -.6 ma High Level Enable Current (V CC = 3.3 V, V E =.0 V) Single Channel I EH -.6 ma High Level Enable Voltage (V CC = 3.3 V, I F = 0 ma) Single Channel V EH.0 V Low Level Enable Voltage (V CC = 3.3 V, I F = 0 ma) (Note ) Single Channel V EL 0.8 V Switching Characteristics (T A = -40 C to +8 C, V CC = 3.3 V, I F = 7. ma unless otherwise specified.) AC Characteristics Test Conditions Device Symbol Min Typ Max Unit Propagation Delay Time to Output High Level (Note 3) All T PLH 90 ns (R L = 30Ω, C L = pf) (Fig. 9) Propagation Delay Time (Note 4) All T PHL 7 ns to Output Low Level (R L = 30Ω, C L = pf) (Fig. 9) Pulse Width Distortion (R L = 30Ω, C L = pf) (Fig. 9) All T PHL -T PLH ns Propagation Delay Skew (R L = 30Ω, C L = pf) (Note ) All t PSK 40 ns Output Rise Time (R L = 30Ω, C L = pf) (Note 6) (Fig. 9) All t r ns (0-90%) Output Fall Time (90-0%) (R L = 30Ω, C L = pf) (Note 7) (Fig. ) All t f ns Enable Propagation Delay Time to Output High Level Enable Propagation Delay Time to Output Low Level Common Mode Transient Immunity (at Output High Level) Common Mode Transient Immunity (at Output Low Level) (V EH = 3 V, R L = 30Ω, C L = pf) (Note 8) (Fig. 0) (V EH = 3 V, R L = 30Ω, C L = pf) (Note 9) (Fig. 0) (R L = 30Ω) (T A = C) (I F = 0 ma, V OH (Min.) =.0V ) (Note 0) (Fig. ) (R L = 30Ω) (T A = C) (I F = 7. ma, V OL (Max.) = 0.8 V) (Note ) (Fig. ) Single Channel Single Channel All t ELH ns All t EHL ns V CM = 0 V All CM H,000 0,000 V/µs V CM = 0 V All CM H,000 0,000 V/µs 3

4 Transfer Characteristics (T A = -40 C to +8 C Unless otherwise specified.) DC Characteristics Test Conditions Symbol Min Typ** Max Unit High Level Output Current (I F = 0 µa, V CC = 3.3 V, V O = 3.3 V) I OH 0 µa (Note ) V E =.0 V Single Channel Low Level Output Voltage (V CC = 3.3 V, I F = ma, I OL = 3 ma) V OL 0.6 V (Note ) V E =.0 V Single Channel Input Threshold Current (V CC = 3.3 V, V O = 0.6 V, I OL = 3 ma) I FT ma (Note ) V E =.0 V Single Channel Isolation Characteristics (T A = -40 C to +8 C Unless otherwise specified.) Characteristics Test Conditions Device Symbol Min Typ** Max Unit Input-Output Insulation Leakage Current Withstand Insulation Test Voltage (Relative humidity = 4%) (T A = C, t = s) (V I-O = 3000 VDC) (Note ) I IO 0 µa, R H < 0%, T A = C) (Note ) ( t = min.) ** All typical values are at V CC = 3.3 V, T A = C FOD060L FOD063L I I-O.0* µa V ISO 370 V RMS FOD60L 000 Resistance (Input to Output) (V I-O = 00 V) (Note ) R I-O 0 Ω Capacitance (Input to Output) (f = MHz) (Note ) C I-O 0.6 pf Notes. The V CC supply to each optoisolator must be bypassed by a 0.µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and GND pins of each device.. Enable Input No pull up resistor required as the device has an internal pull up resistor. 3. t PLH Propagation delay is measured from the 3.7 ma level on the HIGH to LOW transition of the input current pulse to the.v level on the LOW to HIGH transition of the output voltage pulse. 4. t PHL Propagation delay is measured from the 3.7 ma level on the LOW to HIGH transition of the input current pulse to the.v level on the HIGH to LOW transition of the output voltage pulse.. t PSK is the worst case difference between t PHL and t PLH for any devices at the stated test conditions. 6. t r Rise time is measured from the 90% to the 0% levels on the LOW to HIGH transition of the output pulse. 7. t f Fall time is measured from the 0% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. t ELH Enable input propagation delay is measured from the.v level on the HIGH to LOW transition of the input voltage pulse to the.v level on the LOW to HIGH transition of the output voltage pulse. 9. t EHL Enable input propagation delay is measured from the.v level on the LOW to HIGH transition of the input voltage pulse to the.v level on the HIGH to LOW transition of the output voltage pulse. 0. CM H The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V OUT >.0 V). Measured in volts per microsecond (V/µs).. CM L The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., V OUT < 0.8 V). Measured in volts per microsecond (V/µs).. Device considered a two-terminal device: Pins,,3 and 4 shorted together, and Pins,6,7 and 8 shorted together. 4

5 Typical Performance Curves I F - Forward Current (ma) V OL - Low Level Output Voltage (V) Fig. Input Forward Current vs. Forward Voltage T A = 8 C T A = 00 C T A = -40 C T A = 0 C T A = C V F - Forward Voltage (V) I OL - Low Level Output Current (ma) Fig. 3 Low Level Output Voltage vs. Ambient Temperature V = 3.3V CC V E = V (Single channel products only) I F = ma I O = 3mA T A - Ambient Temperature ( C) Fig. Low Level Output Current vs. Ambient Temperature 40 VCC = 3.3V V 3 E = V (Single channel products only) V OL = 0.6V I F = ma I TH - Input Threshold Current (ma) t P - Propagation Delay (ns) I OH - High Level Output Current (na) Fig. Input Threshold Current vs. Ambient Temperature V CC = 3.3V V O = 0.6V FOD060L R L = 30Ω, kω, 4kΩ FOD063L R L = 30Ω, kω, 4kΩ FOD60L R L = 30Ω, kω, 4kΩ T A - Ambient Temperature ( C) Fig. 4 High Level Output Current vs. Ambient Temperature V O = V CC = 3.3V V E = V (Single channel products only) I F = 0 µa T A - Ambient Temperature ( C) Fig. 6 Propagation Delay vs. Ambient Temperature V = 3.3V CC I F = 7.mA R L = 30Ω t PLH - FOD060L, FOD063L t PLH - FOD60L t PHL - FOD060L, FOD063L t PHL - FOD60L T A - Ambient Temperature ( C) T A - Ambient Temperature ( C)

6 Typical Performance Curves t r, t f, - Rise, Fall Time (ns) Fig. 7 Rise and Fall Times vs. Ambient Temperature V = 3.3V CC I F = 7.mA RL = 30Ω t r t f T A - Ambient Temperature ( C) PWD - Pulse Width Distortion (ns) Fig. 8 Pulse Width Distortion vs. Ambient Temperature V = 3.3V CC I F = 7.mA RL = 30Ω FOD60L FOD060L FOD063L T A - Ambient Temperature ( C) 6

7 Pulse Gen. t f = t r = ns Z O = 0 Ω Input Monitor (I F) 47Ω V Pulse Gen. Z O = 0 Ω t f = t r = ns Dual Channel I F V CC 8 V CC 8 Input 0.µF 7 R L Monitoring Bypass Node 7 6 Output (V O) 3 6 C L R M GND 4 GND Test Circuit for FOD060L, and FOD60L Pulse Generator tr = ns Z O= 0Ω 7. ma Input Monitor (V E) 0.µF bypass Test Circuit for FOD063L +3.3V R L C L Output (V O) Input (V ) E tehl Output (V O) Input (I F) t PHL Output (V O) Output (V ) O Fig. 9 Test Circuit and Waveforms for t PLH, t PHL, t r and t f. +3.3V Fig. 0 Test Circuit t EHL and t ELH. R L 0.µF Bypass Output V O Monitoring Node C L* telh tf 3.0 V. V. V 90% 0% t PLH tr I F = 7. ma I = 3.7 ma F. V 7

8 V FF A B I F 3 4 VCM 0V Peak 3.3V VO VO 0. V V CC GND V CM Pulse Gen µf bypass Test Circuit for FOD060L and FOD60L 30Ω +3.3V Output (V O) Switching Pos. (A), I = 0 F V O (Min) V O (Max) Switching Pos. (B), I = 7. ma F Fig. Test Circuit Common Mode Transient Immunity I F V FF B A 3 4 Dual Channel V CC GND V CM + Pulse Generator Z O = 0 Ω Test Circuit for FOD063L CM H CM L R L 0.µF Bypass +3.3V Output V O Monitoring Node 8

9 8-Pin SOIC SEATING PLANE Package Dimensions (Surface Mount) 0.43 (3.63) 0.3 (3.3) 0.0 (.3) 0.8 (4.63) Lead Coplanarity : (0.0) MAX PIN ID (4.6) 0.44 (3.66) (0.0) 0.0 (0.3) (0.08) 0.0 (0.8) 0.00 (.7) TYP 0.44 (6.9) 0.4 (.69) 0.00 (0.) (0.6) 8-Pin Small Outline 0.04 (0.6) (.) 0.7 (6.99) 0. (3.94) 0.00 (.7) 9

10 8-Pin DIP SEATING PLANE Package Dimensions (Through Hole) 0.00 (.08) 0.40 (3.) 0.0 (0.6) 0.06 (0.4) (9.9) (9.40) PIN ID (6.86) 0.0 (6.3) (.78) 0.04 (.4) 0.00 (0.) MIN 0.4 (3.90) 0.0 (3.0) 0.06 (0.40) (0.0) 0.00 (.4) TYP NOTE All dimensions are in inches (millimeters) MAX (7.6) TYP Package Dimensions (0.4 Lead Spacing) SEATING PLANE 0.00 (.08) 0.40 (3.) 0.0 (0.6) 0.06 (0.4) (9.9) (9.40) PIN ID (6.86) 0.0 (6.3) (.78) 0.04 (.4) (0.0) MIN 0.4 (3.90) 0.0 (3.0) 0.06 (0.40) (0.0) 0.00 (.4) TYP 0 to (0.6) TYP SEATING PLANE Package Dimensions (Surface Mount) (9.9) (9.40) 4 3 PIN ID (6.86) 0.0 (6.3) (.78) (7.6) 0.04 (.4) TYP 0.00 (.08) 0.00 (0.) 0.40 (3.) MIN 0.06 (0.4) (0.0) 0.04 [.4] 0.0 (0.6) 0.06 (0.4) 0.3 (8.00) MIN 0.00 (.4) 0.40 (0.30) TYP MIN Lead Coplanarity : (0.0) MAX 8-Pin DIP (.78) (.) 0.00 (.4) 0.9 (7.49) (0.76) 0.4 (0.4) 0

11 Ordering Information Option Marking Information Order Entry Identifier Description No Suffix FOD60L Through Hole (DIP package only) FOD060L Surface Mount Lead Form (SOIC-8 package only) S FOD60LS Surface Mount Lead Bend (DIP package only) SD FOD60LSD Surface Mount; Tape and reel (DIP package only) SV Pending Approval Surface Mount; VDE0884 (DIP package only) SDV Pending Approval Surface Mount; Tape and reel, VDE0884 (000 units per reel) (DIP package only) T FOD60LT 0.4" Lead Spacing (DIP package only) TV Pending Approval 0.4" Lead Spacing, VDE0884 (DIP package only) R FOD060LR Tape and Reel (00 units per reel) (SOIC-8 package only) RV Pending Approval VDE, Tape and Reel (00 units per reel) (SOIC-8 package only) R FOD060LR Tape and Reel (00 units per reel) (SOIC-8 package only) RV Pending Approval VDE, Tape and Reel (00 units per reel) (SOIC-8 package only) V Pending Approval VDE (SOIC-8 package only) V DIP XX YY 3 4 Definitions 60L T 6 Fairchild logo Device number 3 VDE mark (Note: Only appears on parts ordered with VDE option See order entry table) 4 (DIP) Two digit year code, e.g., 03 4 (SOIC) One digit year code, e.g., 3 Two digit work week ranging from 0 to 3 6 Assembly package code V SOIC X YY 60L 3 4 S 6

12 8-Pin DIP Carrier Tape Specifications (FOD60L) 4.90 ± ± ±0.0 Reflow Profile (FOD60L) Temperature ( C) 0. MAX ±0. User Direction of Feed.0 ± ± ±0.0 Peak reflow temperature Time of temperature higher than 4 C Number of reflows 0 s 40 s Ø. ± ±0.0.7 ± ±0. Ø.6 ±0. 60 C (package surface temperature) 40 seconds or less Three Time (s) 6.0 ±0.3

13 8-Pin SOIC Carrier Tape Specifications (FOD060L, FOD063L) 3.0 ± ± MAX User Direction of Feed 4.0 ± MAX 6.40 ± 0.0 Reflow Profile (FOD060L, FOD063L) C ± ± C/Sec Ramp up rate 33 Sec Time (s) 60 C Ø. MIN Time above 83 C = 90 Sec ± 0.0. ± ± ± 0.0 Ø. ± 0./-0 >4 C = 4 Sec

14 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROSSVOLT DOME EcoSPARK E CMOS EnSigna FACT FACT Quiet Series DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition Advance Information Preliminary FAST FASTr FPS FRFET GlobalOptoisolator GTO HiSeC I C i-lo ImpliedDisconnect Across the board. Around the world. The Power Franchise Programmable Active Droop Formative or In Design First Production IntelliMAX ISOPLANAR LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power47 PowerEdge PowerSaver PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect µserdes SILENT SWITCHER SMART START SPM Stealth SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TINYOPTO TruTranslation UHC UltraFET UniFET VCX This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I 4

HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS

HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS DESCRIPTION The / optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output. The devices are housed in a compact small-outline