Modeling and Simulation of DC-DC Boost Converter-Inverter System with Open-Source Software Scilab/Xcos

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1 Stware Engineering 2018; 6(2): di: /j.se ISSN: (Print); ISSN: (Online) Mdeling and Simulatin D-D Bst nverter-inverter System with Open-Surce Stware Scilab/Xcs Thandar Aung, Tun Lin Naing Department Electrical Pwer Engineering, Mandalay Technlgical University, Mandalay, Myanmar address: T cite this article: Thandar Aung, Tun Lin Naing. Mdeling and Simulatin D-D Bst nverter-inverter System with Open-Surce Stware Scilab/Xcs. Stware Engineering. Vl. 6, N. 2, 2018, pp di: /j.se eceived: June 23, 2018; Accepted: July 5, 2018; Published: July 31, 2018 Abstract: This paper prpses a mathematical mdelling D-D bst cnverter-inverter system and simulatin wrk is carried ut using Scilab/Xcs, which is ree and pen-surce stware. In this paper a tw-stage D-A pwer cnversin system is presented. This system cnsists tw cnverters, D-D bst cnverter and single-phase inverter. The bst cnverter cnverts input D lw vltage int high D utput vltage. The D utput rm bst cnverter is cnverted int A utput vltage by an inverter. The mathematical mdel a D-A bst cnverter-inverter system is presented with ur dierent mdes peratins. By using Kirchh s vltage and current law, the system mathematical mdel is derived rm each peratin mde. The mathematical mdel the prpsed system is represented and state-space matrix is derived. Mrever, the steady-state values the system are als presented. The transient behavirs the prpsed mathematical mdel are validated with Xcs simulatin results. Keywrds: D-D Bst nverter, Free and Open-Surce, Mathematical Mdel, Simulatin, Single-Phase Inverter 1. Intrductin The grwing use renewable energy surces brings new challenges t the energy cnversin technlgy. One these challenges is related t the act that the utput vltage lw vltage surce (e.g. batteries, slar panels) need t be bsted and must be inverted t A r practical applicatins. Fr many areas away rm natinal grid, main energy surce is D pwer received rm slar. Many industrial and husehld electrical devices use A pwer. In applicatin where the A pwer is required, that D pwer must be needed t change A pwer. Inverter must be used r changing D t A. Inverter cnverts D pwer t A utput 220V. When D supply vltage is lw, inverter must be cnnected with transrmer t get 220V A utput rm inverter. By cnnecting inverter with transrmer prduces A utput 220V, there exists transrmer lsses and csts. The aim t vercme this prblem is input side inverter must be cnnected with bst cnverter t bst input D vltage. Bst cnverters are nnislated pwer cnverters. They step-up lw D input vltage int high D utput vltage. The bsted D utput rm bst cnverter is ed int inverter and cnverts that D vltage int A utput vltage [1]. The bst cnverter-inverter system simulated with MATLAB r D drive applicatin is presented in [2]. Analysis bst cnverter can be held by assuming that the cmpnents are ideal, but in practical, this assumptin is nt applicable. Because inductr, capacitr and semicnductr devices have nnideal eects. But mre accurate mdel the system is required, the parasitic cmpnents are needed t cnsider as in [3], [4]. High eiciency inverter cnnected with bst cnverter used in renewable applicatin with lw cst, simpliied circuit cniguratin and imprve eiciency have been prpsed in [5]. Tw-stage pwer cnversin bst cnverter and dual input inverter are cnnected t reduce pwer cnversin lsses and imprve cnversin eiciency have been discussed in [6]. Single-stage D-A pwer cnversin using multi-lp cntrller t ensure a high dynamic perrmance is expressed in [7]. Small-signal

2 28 Thandar Aung and Tun Lin Naing: Mdeling and Simulatin D-D Bst nverter-inverter System with Open-Surce Stware Scilab/Xcs mdelling tw-stage inverter r battery applicatin is derived and veriied with simulatin results have been discussed in [8]. Simulatin clsed lp cntrlled D- D bst cnverter with inverter system using MATLAB/Simulink r small scale generatin plant applicatin has been discussed in [9]. There are many cmmercially available mdelling and simulatin stware in the market such as PSim, MATLAB/Simulink, etc. Each stware has its wn merits. In this paper, Scilab/Xcs is chsen r simulatin the prpsed system r the llwing reasns. It is ne pen surce stware r scientiic cmputatin (OSS) and prvides pwerul cmputatin r engineering and scientiic applicatins. Similar t MATLAB, it cnsists Xcs (Scics) tlbx which prvides blck diagram editr r cnstructing simulatin mdel, dynamic system mdel and graphical design a cntrl system. Unlike MATLAB, Scilab is a reely distributed and pen surce stware package and it is ree charge. Scilab can be dwnladed rm the link [10]. Blck diagram and subsystem active disturbance rejectin cntrl system has been described and simulatin n Xcs shw gd eectiveness the cntrl system has been expressed in [11]. The dierence between tw stware envirnments, MATLAB and Scilab are described in [12]. Hau Lia [13] expressed, Scilab r Xcs used cmputatinal unctin blck (lags) t imprve the cmputatinal eiciency blck. Mathematical mdel inductin mtr is expressed in [14] and simulatin is dne with step-change in speed and lad using Scilab/Xcs. Mdelling Separately Excited D Mtr drive system using Scilab/Xcs tl and discuss the results in [15]. In the review the previusly mentined wrks, simulatin bst cnverter-inverter system with Scilab/Xcs is nt und in literature. In this paper, mathematical mdel D- D bst cnverter-inverter system is represented and simulatin wrk is dne by using Scilab/Xcs. The rests the paper are structured as llws. In sectin 2, the mathematical mdel the system using switched unctin is expressed. In sectin 3, simulatin results and discussins are presented. Sectin 4 is the cnclusin the paper. 2. Mathematical Mdeling D-D Bst nverter-inverter System Sectin II cnsists tw subsectins, mathematical mdel the system and switched mdel the system including steady-state equatins Mathematical Mdel the System Figure 1 describes the prpsed D-D bst cnverterinverter system. The prpsed system cmbines llwing three subsectins. (a) Bst nverter, this system cnsists inductr (L), inductr parasitic resistance (r L ), switching device (Q 1 ), dide (Di), link capacitance ( ) and link resistance ( ). Where V in is input vltage, i in is inductr current, q 1 (t) is n/ input Q 1 and v is link vltage. The inductr stred and released energy when the switch is ON and OFF. The capacitr is used r iltering ripple in the utput vltage [16]. (b) Inverter cmpses ur switching devices, transistr Q 2 and Q 2. q 2 (t) and q2 ( t ) are the ON/OFF cntrl signals transistr Q 2 and Q 2. (c) L utput ilter is cnnected at the utput inverter. It cnsists ilter inductr (L ), ilter inductr resistance (r L ), ilter capacitance ( ) and utput resistance ( ). Where i ilter current and utput vltage inverter is isv. Figure 1. Prpsed D-D Bst nverter-inverter System In rder t btain mathematical mdel the system, ideal switch tplgy is cnsidered as shwn in Figure 2. When switches cnduct i q 1 = 1 r q 2 = 1 r switches d nt cnduct i q 1 = 0 r q 2 = -1.

3 Stware Engineering 2018; 6(2): Figure 2. Equivalent ircuit Diagram D-D Bst nverter-inverter System. Equivalent circuits ur dierent mdes are represented t derive mathematical mdels the system. The dierential equatins the prpsed system r ur dierent mdes are btained by using Kirchh s vltage and current law. Mde 1: Q1-OFF and Q2-ON Figure 3 shws the equivalent circuit when q 1 = 0 and q 2 = 1. Figure 3. Equivalent ircuit Mde 1. The mathematical mdel Figure 3 is represented by the llwing dierential equatins (1)-(4): diin L = Vin iinrl v (1) v = iin i (2) di L = v ir v (3) v = i (4) Mde 2: Q1-OFF and Q2-OFF Figure 4 shws the equivalent circuit whenq 1 =0 and q 2 =-1. Figure 4. Equivalent ircuit Mde 2.

4 30 Thandar Aung and Tun Lin Naing: Mdeling and Simulatin D-D Bst nverter-inverter System with Open-Surce Stware Scilab/Xcs The mathematical mdel Figure 4 is represented by the llwing dierential equatins (5)-(8): diin L = Vin iinrl v (5) v = + (6) iin i di L = v ir v (7) v = i (8) Mde 3: Q1-ON and Q2-ON Figure 5 shws the equivalent circuit when q 1 =1 and q 2 =1. Figure 5. Equivalent ircuit Mde 3. The mathematical mdel Figure 5 is represented by the llwing dierential equatins (9)-(12): di L in = V i r (9) in in L v = i (10) di L = v ir v (11) v = i (12) Mde 4: Q1-ON and Q2-OFF Figure 6 shws the equivalent circuit when q 1 =1 and q 2 =-1. Figure 6. Equivalent ircuit Mde 4. The mathematical mdel Figure 6 is represented by the llwing dierential equatins (13)-(16): di L in = V i r (13) in in L v = i (14) di L = v ir v (15) v = i (16)

5 Stware Engineering 2018; 6(2): Switched Functin Mdel the System T btain the dynamic mdel the system, equivalent circuit with switches as shwn in Figure 2 is cnsidered. Whereas, q1 {0,1} and q2 {1, 1} are the input switch psitins. The switched mdels the system can be represented as in (17)-(20): diin L = Vin iinrl (1 q1 ) v (17) v = (1 q1 ) iin q2i (18) di L = q2v ir v (19) v = i (20) In rder t btain the steady-state equatin the system, the average mdel the system is used. The switch psitins q 1 and q 2 are replaced by average psitins d 1 and d 2 in equatins (17)-(20). The average switched mdels the system are shwn in (21)-(24): di 1 in Vin iinrl (1 d1) v = L 1 v = (1 d1) iin d2i di 1 = d2v ir v L (21) (22) (23) 1 v = i (24) d1 = D ɶ 1 + d1 and d2 = D ɶ 2 + d2, d ɶ 1 <<D 1 and ɶd 2 << D 2 thus ɶd 1 and ɶd 2 are neglected accrding t small ripple apprximatin. d 1 and d 2 are equal D 1 and D 2. The system equilibrium cnditin can be represented by (25) (28): 1 0 = V I r (1 D ) V L in in L 1 (25) 1 V 0 = (1 D1 ) Iin D2I 1 L 0 = D2V I r V 1 V 0 = I (26) (27) (28) In matrix rm, equatins (25)-(28) can be represented as llw, rl (1 D1 ) 0 0 Iin Vin (1 D1 ) 1/ D2 0 V 0 = 0 D2 r 1 I (29) / V 0 By slving (29), the steady-state matrix is btained as (30). 2 (D r ) ((D r ) r L + + r - 2D 1-2D1r + D 1 + D1 r ) Iin ( + r - D 1 - D 1 r ) V ((D r ) r L + + = r - 2D 1-2D1r + D 1 + D1 r ) I ( D - D D ) V ((D r ) r L + + r - 2D 1-2D1r + D 1 + D1 r ) (D 2 - D1D 2) ((D r ) r L + + r - 2D 1-2D1r + D 1 + D1 r ) V in (30) 3. Simulatin esults and Discussin Simulatin wrks and related results are prvided in this sectin Simulatin with Scilab/Xcs Scilab prvides a large number tlbxes r develping and simulatin mdels several types. The D- D bst cnverter-inverter system (21)-(24) is represented by using the blcks rm Xcs tlbx. Simulatin wrk is imprtant r researchers because it can study dynamic perrmance system withut any charges. When the system underges changes r disturbances, the changes in system dynamic parameters can be easily seen. By ding simulatin, it can save time and csts and can easy t study the dynamic changes bere practical cnstructing. The average duty cycle cmmand D-D bst cnverter is D 1 =0.7. The duty cycle cmmand r reerence sine wave inverter is 0.8. The rms value D 2 r inverter

6 32 Thandar Aung and Tun Lin Naing: Mdeling and Simulatin D-D Bst nverter-inverter System with Open-Surce Stware Scilab/Xcs is 0.8/ The inverter is intended t generate utput vltage 220 V (rms) and i the pwer rating is set at 2200 W, the value lad resistance is 22 Ω. The parameters the system used in simulatin are expressed in Table 1. Table 1. Parameters the Prpsed System. Parameters Variables Values Supply vltage Vin 120 [V] Bst cnverter requency 2000 [Hz] Inductr L 2 [m H] Inductr resistance r L 0.2 [Ω] D link capacitance 1.41 [m F] D link resistance 1000 [Ω] Duty-cycle D D 2 (rms) 0.8/ 2 Output ilter capacitance 22 [µ F] Output ilter inductance L 2 [m H] esistance utput ilter inductr r 0.2 [Ω] Lad resistance 22 [Ω] Output pwer P 2200 [W] Inverter utput requency 50 [Hz] Based n (21), the input current blck diagram can be created as shwn in Figure 7. Figure 7. Blck Diagram Input urrent. Using (22), the D-link vltage blck diagram can be created as shwn in Figure 8. Figure 8. Blck Diagram D Link Vltage. The utput ilter current blck diagram can be created by using (23) as shwn in Figure 9. Figure 9. Blck Diagram Output Filter urrent.

7 Stware Engineering 2018; 6(2): Based n (24), the inverter utput vltage blck diagram can be created as shwn in Figure 10. Figure 10. Blck Diagram Output Vltage Inverter. By cmbining the abve ur blck diagrams, the llwing verall system is btained. When applying duty cycle cmmands as inputs and the system is run with Scilab, the utput state variables i in, v, i and v are btained Discussin n Simulated esults Figure 11. Overall System Blck Diagram Bst nverter-inverter System. Table 2 presents the numerical values the equilibrium pints i in, v, i and v when the values D link resistr and utput resistr changed at D 1 =0.7 and D 2 =0.8/ results. 2. The simulatin results are shwn in Figure and discussed the TABLE 2. Simulatin esults at the Equilibrium Pints. Equilibrium Pints Simulatin 1 =1000Ω, =22Ω Simulatin 2 =10Ω, =22Ω Simulatin 3 =1000Ω, =1000Ω i in v i v

8 34 Thandar Aung and Tun Lin Naing: Mdeling and Simulatin D-D Bst nverter-inverter System with Open-Surce Stware Scilab/Xcs Figure 12. Simulatin esults at =1000Ω and =22Ω. Figure 13. Simulatin esults at =10Ω and =22Ω.

9 Stware Engineering 2018; 6(2): Figure 14. Simulatin esults at =1000Ω and =1000Ω. The changes in simulatin results i in, v, i an can easily be seen in Figure Where the value D-link resistr decreases, the value input current dramatically increases with mre ripple. The increase in the value input current damages the devices used in the system. During this cnditin, the inverter utput vltage als decreases. When the value D-link resistance is kept cnstant and lad resistance is large nearly pened-circuit, input current value is very small and D-link vltage changes little. This is due t the existence D-link resistr. It prtects the sudden increase in D link vltage when large lad resistance changes. The ripple input current and D-link vltage are lesser than in simulatin-3 as cmpared with simulatin-1. The D-link vltage luctuatin is mre bvius in laded cnditin. This is because pwer transerred inverter. The ripple requency D-link vltage luctuatin is twice the utput vltage requency inverter. 4. nclusins In this paper, the cniguratin D-D bst cnvertersingle phase inverter system has been presented. Mathematical mdeling and simulatin results the prpsed system have been represented. Simulatins the system have been dne by using Scilab/Xcs. The mathematical derivatins and analysis have been cnirmed with simulatin results. As a new user, when using Scilab/Xcs in aces sme unamiliar prblems. But it is ree and pen surce but its cmputatins are reliable slutins. The simulatin results are validated with the equilibrium values table II. As uture wrk, it is intended t cntrl D-link vltage D-D bst cnverter-inverter system. eerences [1]. W. Ericksn amd D. Maksimvic, Fundamental Pwer Electrnics, Secnd Editin. [2] Victr Hug Garcia-driguez, amn Silva-Ortigza, Eduard Hernandez-Marquez, Jse aael Garcia-Sanchez, Mari Pnce-Silva and Griselda Saldana-Gnzalez, A D Mtr Driven by a D-D Bst nverter-inverter: Mdeling and Simulatin, 2016 Internatinal nerence n Mechatrnics and Autmtive Engineering (IMEAE), DOI: / IMEAE [3] H. Abdel-Gawad and V. K. Sd, Small-Signal Analysis Bst nverter, including Parasitic, perating in M, th IEEE Pwer India Internatinal nerence (PIION), DOI: /POWEI [4] Gkhan Altintas, Mehmet Onur Gulbahce and Derya Ahmet Kcabas, Nnideal Analysis, Design and Vltage Mde ntrl a Bst nverter, Pwer and Electrical Engineering iga Technical University (TUON), 57th Internatinal Scientiic nerence, 2016, DOI: / TUON

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