2. Find i, v, and the power dissipated in the 6-Ω resistor in the following figure.

Transcription

1 CSC Class exercise DC Circuit analysis. Fr the ladder netwrk in the fllwing figure, find I and R eq. Slutin Req 4 ( 6 ) 5Ω 0 0 I Re q 5 A. Find i, v, and the pwer dissipated in the 6-Ω resistr in the fllwing figure. Slutin 8 Ω 9A i 6 Ω v - i 4 Ω --

2 By current divisin, i (9 6 ) 6 A i 9 6 A, v 4 4 x V i p 6 i R 6 x 6 6 W. Use superpsitin t find i in the fllwing figure. Let i i i, where i is due t the -V surce and i is due t the 4-A surce. Fr i, cnsider Fig. (a). x/5 6/5, i /(6 6/5) 0/6 i [/( )]i (/5)x(0/6) A Fr i, cnsider Fig. (b), 6 hm, i 4/ A i A --

3 4. Slve fr the current I in the circuit f the fllwing figure using Thevenin s therem. Slutin Remve the 0-V vltage surce and the -hm resistr. R Th 0Ω a 0Ω a b 40Ω 50V V Th b 40Ω (a) (b) Frm Fig. (a), R Th hms Frm Fig. (b), V Th (40/(0 40))50 40V 8 Ω i a 40V (c) Ω 0V b The equivalent circuit f the riginal circuit is shwn in Fig. (c). Applying KVL, 0 40 (8 )i 0, which leads t i 500mA <END> --

4 -4- CSC Class exercise DC Circuit Analysis. Apply mesh analysis t find i in the fllwing circuit. Slutin Fr lp, 6 i i 6i i () Fr lp, -8 7i i i () Fr lp, i i 0 6i i () We put (), (), and () in matrix frm, 8 i i i , At nde 0, i i i r i i i A

5 . Use ndal analysis t find currents i and i in the circuit f the fllwing figure. 4 v v v v 0 At nde, v - v () v v v At nde, v 7v () Slving () and () gives, v 4.87 V, v 0.05 V v v i.07 A, v A. Fr the bridge netwrk in the fllwing figure, find i 0. Assume all currents are in ma and apply mesh analysis fr mesh. 0 i 6i 4i 5 6i i i () fr mesh, 0-6i 4i i 0 -i 7i i () fr mesh, 0-4i i 0i 0 -i i 5i () Slving (), (), and (), we btain, i i 4.86 ma. -5-

6 4. What value f R in the circuit f the fllwing figure wuld cause the current surce t deliver 800mV t the resistrs? Using R R Y R, we btain the equivalent circuit shwn belw: 0mA R R R R R 0mA R R/ RxR R R R 4R 4 R (RxR) /(4R) /(4R) Rx R R R R R R R 4 4 R R P I R 800 x 0 - (0 x 0 - ) R R 889 Ω <END> -6-

7 CSC Class exercise First Order Circuit. The switch in the fllwing circuit has been clsed fr a lng time. At t0, the switch is pened. Calculate i(t) fr t>0. Slutin When t < 0, the switch is clsed and the inductr acts like a shrt circuit t dc. shrt-circuited s that the resulting circuit is as shwn in Fig. (a). The 4 Ω resistr is Ω V i(0 - ) 4 Ω H (a) (b) i (0 ) 4 A Since the current thrugh an inductr cannt change abruptly, i (0) i(0 ) i(0 ) 4 A When t > 0, the vltage surce is cut ff and we have the RL circuit in Fig. (b). Hence, τ L R i(t) τ i(0) e -t 4e -t A -7-

8 . In the fllwing circuit, v(0)0v. Find v(t) fr t>0. Slutin t τ v (t) v(0)e -, τ C R eq R eq Ω τ R eq C (0.5)(8) v(t) - t 0e V. The switch in the fllwing figure has been psitin a fr a lng time. At t0, it mves t psitin b. Calculate I(t) fr all t>0. Slutin R eq 6 Ω, τ RC 4 v (t) τ [ v(0) v( ) ] e - t v( ) Using vltage divisin, -8-

9 Thus, v (0) (0) 0 V, v ( ) () 4 V 6 6 v (t) 4 (0 4) e i(t) dv C dt - ()(6) e 4 - t 4 e -t t 4-0.5t - e A 4. Find v(t) fr t<0 and t>0 in the circuit in the fllwing figure. Fr t < 0, cnsider the circuit shwn in Fig. (a). i 4 4i 0 i 4 v(t) 4i v 96 V i 48 A Fr t > 0, cnsider the circuit in Fig. (b). i (t) τ [ i(0) i( ) ] e - t i( ) 0 i (0) 48, i ( ) A 8 R th 8 0 Ω, τ L R th i (t) (48 ) e 46 v(t) i(t) -0t e -0t -0t 4 9e V <END> -9-

10 CSC Class exercise 4 Secnd Order Circuit Q Find v(t) fr t>0 if v(0)6v and i(0)a in the circuit shwn in fllwing figure. Slutin This is a series, surce-free circuit hms α R/(L) 0/(x) 5 and ω LC ω α leads t critical damping i(t) [(A Bt)e -5t ], i(0) A v Ldi/dt {[Be -5t ] [-5(A Bt)e -5t ]} v(0) 6 B 0A B 0 r B. Therefre, i(t) [( t)e -5t ] A Q In the circuit in the fllwing figure, calculate i(t) and v(t) fr t>0. Slutin -0-

11 At t 0 -, v(0) (8/( 8)(0) 4 Fr t > 0, we have a surce-free parallel RLC circuit. α /(RC) ¼ ω / LC / x 4 Since α is less than ω, we have an under-damped respnse. ω d ω α 4 (/6).984 v (t) (A csω d t A sinω d t)e -αt v(0) 4 A and i(t) C(dv/dt) 0 when t 0. dv/dt -α(a csω d t A sinω d t)e -αt (-ω d A sinω d t ω d A csω d t)e -αt at t 0, we get dv(0)/dt 0 -αa ω d A Thus, A (α/ω d )A (/4)(4)/ v(t) (4csω d t.04sinω d t)e -t/4 vlts d i di. The step respnse f a series RLC circuit is given by 5i 0 dt dt Given i(0) and di(0)/dt 4, slve fr i(t). Slutin s ± 4 0 s 5 0, which leads t s, -±j4 i(t) I s [(A cs4t A sin4t)e -t ], I s 0/5 i(0) A, r A 0 di/dt [(A cs4t)e -t ] [(-A sin4t)e -t ] 4 4A, r A i(t) sin4te -t A --

12 4. In the fllwing circuit, find v(t) and i(t) fr t > 0. Assume v(0) 0V and i(0) A. t 0 i 4A Ω H 0.5F v Slutin ω / LC / x0. 5 α /(RL) ()/(xx0.5) 0.5 Since α < ω, we have an underdamped respnse. s, α ± α ω -0.5 ± j. Thus, i(t) I s [(Acs.t Bsin.t)e -0.5t ], I s 4 i(0) 4 A r A - v v C v L Ldi(0)/dt 0 di/dt [.(-Asin.t Bcs.t)e -0.5t ] [-0.5(Acs.t Bsin.t)e -0.5t ] di(0)/dt 0.B 0.5A r B 0.5(-)/. -.4 Thus, i(t) {4 [(cs.t.4sin.t)e -0.5t ]} A <END> --

13 CSC Class exercise 5 Steady State AC Circuit Analysis Q A sinusidal vltage is give by the expressin v 00cs(40π t 45 ) mv. Find (a) f in hertz; (b) T in millisecnds; (c) V m (d) v(0) (e) φ in degrees and radians; (f) the smallest psitive value f t at which v0 (g) the smallest psitive value f t at which dv/dt0.. Find the impedance Z ab in the circuit seen in fllwing figure. Express Z ab in bth plar and rectangular frm. --

14 . Find the steady-state expressin fr i 0 (t) in the circuit in the fllwing figure if v s 750cs5000t mv. 4. The circuit in the fllwing figure is perating in the sinusidal steady state. Find the steady-state expressin fr v 0 (t) if v g 64cs8000t V. -4-

15 <END> -5-

16 CSC Class exercise 6 Steady State AC Circuit Analysis (II) Q Use ndal analysis, find i 0 (t) in the fllwing circuit. Slutin cs( t) 0, ω 8 sin(t 0 ) 8-60 H jωl j F -j jωc j()( ) H jωl j4 4 F -j jωc j()( 4) -j Ω j4 Ω 8-60 V Ω V I -j Ω j Ω V 0 A Cnsider the circuit belw. At nde, ( V 8-60 ) V V V - j j j 8-60 ( j) V V () -6-

17 At nde, V V j (8-60 ) V j4 j - 60 j V 4 V () Substituting () int (), ( j.5) V V j.5 I V j.5 j Therefre, i (t) 5.04 cs(t ) A Q Determine V 0 and I 0 in the fllwing circuit using mesh analysis. Slutin Cnsider the circuit belw. Fr mesh, ( j4) I (4-0 ) V where V (4-0 I ) 0 Hence, ( j4) I 8-0 6(4-0 I) ( j) I r I 5-7-

18 I V - j ()(4-0 I - j ) I j(4-0 5 ) I A - j I V V Q Slve fr v 0 (t) in the circuit f the fllwing figure using the superpsitin principle. Slutin Let v v v v, where v, v, and v are respectively due t the 0-V dc surce, the ac current surce, and the ac vltage surce. Fr v cnsider the circuit in Fig. (a). The capacitr is pen t dc, while the inductr is a shrt circuit. v 0 V Hence, Fr v, cnsider the circuit in Fig. (b). ω H jωl j4 F jωc j()(/) -j6 6 Ω -j6 Ω 4 0 A j4 Ω V (b) Applying ndal analysis, -8-

19 Hence, 4 V V V j j 6 - j6 j V V j0.5 v.45sin(t 6.56 ) V Fr v, cnsider the circuit in Fig. (c). ω H jωl j6 6 Ω j6 Ω 0 V -j4 Ω V F At the nn-reference nde, Hence, jωc V V V 6 - j4 j6 V j()(/) j0.5 (c) v 0.7cs(t 6.56 ) V -j4 Therefre, v 0.45 sin(t 6.56 ) 0.7 cs(t 6.56 ) V <END> -9-