Performance Evaluation and Control Technique of Large Ratio DC-DC Converter

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1 Internatinal Jurnal n Electrical Engineering and Infrmatic - Vlume, umber, 9 Perfrmance Evaluatin and Cntrl echnique f arge Rati DC-DC Cnverter Agu Purwadi, Ku Adi Nugrh, Firman Sangk, Kadek Fendy Sutrina and Pekik Arg Dahn Schl f Electrical Engineering and Infrmatic, Intitut eknlgi Bandung Jl. Ganeha, Bandung. 43. INDONESIA agup@knveri.ee.itb.ac.id Abtract: he perfrmance f large rati dc-dc cnverter will be dicued in thi paper. he perfrmance will be berved by it ripple and le. he perfrmance will be cmpared with multiphae and multilevel dc-dc cnverter. he pecific cntrl technique fr large rati dc-dc cnverter al will be dicued in thi paper. Experiment reult are included t verify the analyi methd. Keywrd: Ripple, le, cntrl.. Intrductin RENEWABE energy pwer generatin uch a phtvltaic, fuel cell, and ther dc utput vltage pwer generatin, are very prmiing due t the envirnmental cnideratin and limited fil fuel. hi renewable energy, epecially lar energy i very ptential in Indneia. hi i very ueful t electrify remte area in Indneia. Hwever, the utput vltage f the phtvltaic cell i very lw, arund 6V-4V. herefre, the utput vltage cannt be directly t be ued. he utput vltage mut be tepped up and inverted t prduce apprpriate ac vltage. In cae f tep dwn, there are me applicatin that need a very lw dc vltage frm grid, uch a micrprcer, electrplating, etc. gather the very lw vltage, grid line mut be rectified and tepped dwn. Of cure, the ther ptin i t utilize tranfrmer. But the phyical ize and ct i cnideratin t avid tranfrmer. Becaue f that, tep dwn and tep up prcee are expected in dc vltage. here are prblem t tep up and tep dwn dc vltage t very high and very lw dc vltage. In nn-ilated dc-dc cnverter type, high rati between input and utput cnverter will create prblem due t limitatin f the witching device. High rati between input and utput will make the witching device perate in very mall r very high duty rati while a we knw there are me limitatin in the nn-ideal witching device. lve thi prblem, a new tplgy f dc-dc cnverter i prped[]. hi tplgy let u btain the high rati f the input and utput frm the ptential difference f the each cnverter. hu we will nt face the extreme duty cycle prblem in the witching device anymre ince we can perate each cnverter in the mderate duty cycle. In thi paper, perfrmance f large rati dc-dc cnverter will be berved frm the ripple and le apect. Cntrl technique f large rati dc-dc cnverter al will be dicued. he cntrl technique i utilizing duble lp cntrl.. arge Rati Dc-Dc Cnverter Suppe that we want t btain large rati buck dc-dc cnverter a mentined befre, then we cnider the parallel-input, erie utput cnfiguratin (Fig. ) f buck cnverter. Fig. (a) hw the tw buck cnverter which will be cnnected in the cnfiguratin a hwn in Fig. 3.

2 he lad ide i repreented by a current urce, while input ide i repreented by vltage urce. Since input ide f buck cnverter i cnnected in parallel, then E = E = E () d d d Where E d, E d, and E d are input vltage f firt buck cnverter, ecnd buck cnverter, and the new tplgy cnverter, repectively. Cnnecting the input ide f the tw buck cnverter in parallel manner will reult a circuit a hwn in Fig. (b). Nw the tw cnverter have been cnnected int ingle cnverter with tw utput. hen we had t cnnect the tw utput in erial manner, ince the bth utput current are flw in the ppite directin, then we have t revere ne f the utput current it can be cnnected in erial manner. he reveral f the ne f the utput current can be dne in the cntrl dmain f the buck cnverter. Fig. (c) hw the reulted tplgy after the reveral f anther utput ii i i i i v i v i v i i i v v i v Fig.. Parallel Input, Serie Output cnfiguratin. current. Since tw current urce which are cnnected in erie are degenerated int a ingle current urce, then Fig. (d) hw the reulted tplgy. he cmplete new tplgy large rati dc-dc cnverter i hwn in Fig. (e) where the tranitr and dide ued a witching device. With thi tplgy we can btain large rati between utput and input ide, withut need t perate each witching device in the extreme duty cycle, a in the cnventinal buck cnverter. Cnfiguratin a hwn n Fig. 3 i the prped large rati dc-dc cnverter in the ppite directin f pwer flw, in the ther wrd it i bt dc-dc cnverter, which al will be dicued later. et u mve t the cntrl trategy f the prped new tplgy large rati buck dc-dc cnverter. A mentined abve the large rati cnverin in the utput frm the utput can be dne withut perate the witching device in the extreme duty cycle. It can be dne ince by uing the prped new tplgy we can cntrl each cnverter independently. hw the independently cntrl, let u ee Fig. (e) nce again. he vltage between nde a and nde n i the utput f the firt buck cnverter, it can be expreed a v an when S ff = () E when S n d

3 E d + S S I E d + S 3 S I 4 ( a) S S 3 I S E d S I 4 ( b) S S 3 I S E d S I 4 () c I S S 3 S S 4 E d ( d) E d S a vab S 3 b i C ic ad i v n () e Fig.. Detail f the derivatin f large rati dc-dc cnverter. If the duratin f S ff and n i called ff, and n, repectively, and a perid f a cnecutive ff and n i called, then the average value f v an in a perid f witching i expreed a: v =. + E (3) hu S S 4 A ff d n v = E = E D (4) n A d d Where v AN i the average value f v an, and D = n / = v AN /E d i the duty cycle f the witche in the firt buck cnverter. Uing imilar way, then we can btain the average value f v bn v = E = E D (5) n B d d Where v BN i the average value f v bn, and D = n / = v BN /E d i duty cycle f the witche in the ecnd buck cnverter. he lad i cnnected acr nde a and b, the lad vltage can be expreed a

4 vlad = va vb (6) v = ED ED (7) lad d d lad d ( ) v = E D D (8) Frm (8) i clearly hwn that we can btain mall value f v lad if the (D -D ) term i made mall. hu t btain the mall value f (D -D ), we d nt have t et D and D in mall value t, rather we can che mderate value f D and D a lng a the ubtractin reult i mall. S we will get large rati between utput and input f thi prped cnverter, while the witching device are perated in the mderate duty cycle. hu we will have infinite cmbinatin f D and D value which can be chen t give mall value f (D - D ). But the cmbinatin f D and D arund.5 will give the mt ptimum reult, ince with thi value we will get minimum ripple in the input and utput f the prped cnverter cmpared t the ther cmbinatin f D and D value. In the peratin a bt cnverter, the tplgy derived uing the ame apprach i hwn in Fig. 3. et u aume that vltage in the lad i called v C, then accrding t Fig. 3, v = E + v + v + v (9) C d S3 S S3 S4 a E d b C S S n Fig. 3. arge rati bt dc-dc cnverter S S C i S E d C E d v C E d C S 3 Fig. 4. (a) w-phae, and (b) hree-level, dc-dc cnverter.

5 Where v, v S3, v S are vltage acr inductr, S 3, and S, repectively. v S itelf can be expreed a v S when S ff = () v when S n C hu the average value f v S ver ne witching perid i v = kv () S, av c Where v S,av i the average value f v S and k i the duty cycle f the witch S. Uing the ame way, the average value f vltage acr S 3 can be expreed: v = k v () S 3, av c Where v S3,av i the average value f v S3 and k i duty cycle f witch S. Since the average vltage acr an inductr ver ne witching perid i zer, then (9) can be expreed a v = E + kv + k v (3) C d C C v c = Ed ( k + k ) (4) Clearly hwn in (4), if we want t btain very big utput vltage cmpare t it input vltage, then we huld et the D r (k +k ) term a near a unity. hu we need nt t et each k and k in the value near unity, a lng the (k +k ) i near unity. hi i anther intereting pint f the prped large rati bt cnverter tplgy, we can btain very high utput vltage withut need t perate the witche in extreme duty cycle. Example fr the applicatin f thi cnverter i t tep up utput vltage f renewable energy pwer generatr, in rder t tranfer the electricity, uch a phtvltaic cell, fuel cell, and ther dc vltage pwer generatr. 3. Perfrmance f arge Rati Dc-Dc Cnverter he perfrmance f large rati dc-dc cnverter will be cmpared t exited dc-dc cnverter. hey are multiphae and multilevel dc-dc cnverter. arge rati dc-dc cnverter utilize fur witche, therefre, thi dc-dc cnverter will be cmpared with tw-phae dc-dc cnverter and three-level dc-dc cnverter, a hwn in Fig. 4. implify the analyi f large rati dc-dc cnverter perfrmance, buck cnverter will be cnidered in thi analyi. hi analyi i al valid fr bt cnverter. A. Ripple Analyi At the input ide f dc-dc cnverter, there i uually C filter t minimize the input current ripple f cnverter. If dc-dc cnverter i utilized a pwer upply, then at the utput ide there huld be anther C filter. Ripple analyi i needed t knw the ripple exited at the input and utput ide f prped large rati dc-dc cnverter. hi infrmatin i needed t determine the ize f filter C needed fr the pecified ripple. Cmmnly, ripple analyi i dne with Furier erie cncept. With thi cncept, accurate reult will be btained with all harmnic. Hwever, thi cncept take time.

6 herefre, ripple analyi will be dne with time dmain apprach. With thi apprach, accurate reult al can be btained withut taking int accunt the harmnic[3]. Output Ripple Analyi analyze the utput ripple, me aumptin will be taken int accunt. Vltage urce i a nn-ripple ideal vltage urce, tranitr witche and dide are ideal witche. Capacitr filter i ideal capacitr withut reitance. hi analyi will be limited in cntinue cnductin mde. Output wavefrm detail are hwn in Fig. 6(b). ab ripple current in inductr and vltage in capacitr repectively. v i utput vltage. i% and v% are the analyze utput ripple current, then the tart pint i tating the vltage a-b pint a di = + (5) dt vab v Current and vltage in Eq. (5) can be eparated t average and ripple cmpnent a fllw, v = v + v% (6) ab ab ab i = i +% i (7) v = v + v% (8) Bar ign hw the average cmpnent, and tilde ign hw ripple cmpnent. And Eq. (5) will reult di di% vab + v% ab = + + v + v% (9) dt dt Separating average frm ripple cmpnent will reult, di vab = + v dt () di% v% ab = + v% dt () he capacitr ripple vltage in Eq.(3) i far le than ther part, therefre can be implified t, di% v% dt ab () Hence, utput ripple current i tated a i% = ( vab vab ) dt (3) and the rm value f utput ripple current can be calculated with the equatin, t + I% rm, = i%. dt (4) t hen, we can btain I% rm, Ed = f ( ) 4 3 (5)

7 = D + D, and Where i cnverter rati, cnverter. f i witching frequency f dc-dc he fllwing part will dicu vltage ripple analyi f large rati dc-dc cnverter. Current thrugh the capacitr i tated by i = i i (6) C O And a explained befre, the equatin becme, With i + i% = i + i% i i% (7) C C O O i% C = i% i% O (8) i = i i (9) C O he capacitr ripple vltage in Eq.(38) i far le than ther part, therefre can be implified t, i% i% (3) C Hence, capacitr vltage ripple can be calculated a v% = i% Cdt = i% dt C C (3) and the rm value f capacitr ripple vltage can be calculated with the equatin, t + V% rm, = v. dt % (3) t hen we can btain, V% E = ( ) + d rm, C 48 5 f ( ) (33) Input Ripple Analyi analyze the input ripple, me aumptin a tated befre al will be taken int accunt. Fig. 5 hw large rati dc-dc cnverter with C filter in input ide fr input ripple analyi. Input ide wavefrm detail are hwn in Fig. 6 (a). i D i current thrugh S witch, i i inductr current, v C i input capacitr vltage. Frm Fig. 6 (a), average input current i d i i d t.5 = id dt = I (34) t and rm value fr input current i,.5 t Id = id dt (35) t = I hen, the value f input current ripple i, i% = I D (36)

8 Baed n the Eq.(46), it can be een that input current ripple i independent with witching frequency. he capacitr current ripple i i% = i% i% (37) C D Becaue the current ripple in urce inductr i far le then input current ripple, then ( ) i% = i% = i i (38) C D D D Frm Eq.(48), then the capacitr vltage ripple can be calculated with i i D E d i C C S vc a S 3 b R i S S 4 n Fig. 5. arge rati buck dc-dc cnverter with and C. S v tri ff 4 n ff n ff 4 v tri ff 4 n ff n ff 4 v ref v ref v ref v ref v cntrl v cntrl v cntrl v cntrl i V AB I i d i% v C A v% i B t t t t. 5 t t 3 4 t5 t t t t.5 t3 t t 4 5 Fig. 6. Ripple wavefrm detail (a) input, and (b) utput ide.

9 v% C = ic dt C % And the rm value i (39) t + V% C = vcdt % (4) Hence, V% C t I == Cf ( ) 4 3 analyze input ide inductr current ripple, input ide vltage equatin can be written a, (4) di Ed = + vc dt (4) ~ If i = i + i, then di E = + vc dt (43) di = + vc dt (44) he urce ripple current equatin i ~ i = v~ cdt (45) Hence, + ( ) 6 ( tt) aat t tt (46) + ( ) 6 I i% = C O + ( tt) ( tt) ( ) aat ttt + ( ) 6 ( t t) ( t t) O ( ) aat ttt.5 Rm value f input inductr current ripple can be calculated with equatin, Hence, t + I% = i% dt (47) I% I = t ( ) C f (48)

10 B. e Analyi he le f DC-DC cnverter created by witching device are divided int tw le. Firt i witching l, and ecnd i cnductin l. Switching and cnductin le can be een in Fig. 7. hee wavefrm are ccurred in inductive circuit with high duty cycle f witching. he circuit i inductive becaue it cntain inductr a current urce t make ure current flw t the lad every time. Area i the l when the current flw i riing, area i the l when the current flw in the revere directin thrugh the dide, and area 3 i charge in dide (q rr ). hee area are cauing high pwer diipatin in the tranitr (witching device). Switching l ccur in tranitr during the tranitin frm the OFF t ON tate (turn-n) and the ON t OFF tate (turn-ff). he equatin f witching le i given[4]: ps_ O = EIt d r f + EIt d rr f + Ed fq rr (49) fr turn-n le, and p E f I t = (5) S_ OFF d cf fr turn-ff le, where Ed = Supply vltage F = Switching frequency I = Output current t r = Switching device current rie time t rr = Dide revere recvery time q rr = Dide revere recvery charge t cf = Switching device turn-ff recvery time In mt intended perating current, it i mre apprpriate t aume that the tranitr current rie time and turn-ff crver time and the dide revere recvery time and charge are made up f a cntant cmpnent plu a cmpnent that i linierly dependent upn current[4], that i tr = r + CtrI (5) tcf = cf + Ccf I (5) trr = rr + CrrI (53) q = Q + C I (54) rr rr qr he witching l, therefre, can be written a where ps = ps_ O + ps_ OFF (55) ps = Ed f( C + CI + CI ) (56) C = Q rr (57) C = r + cf + rr + Cqr (58) C = C + C + C (59) tr cf rr

11 Cnductin l ccure due t vltage drp acr tranitr and dide during cnductin. hee vltage which are functin f the current that flw thrugh them cn be apprximated a the fllwing linear functin: v = V + R I (6) S fr tranitr, and v = V + R I (6) D D D S fr dide. Cnductin le are the prduct f the ON tate vltage f the witching device and the current flwing thrugh it. he equatin f cnductin le i then p = VI + RI (6) S Srm fr tranitr, and p = V I + R I (63) D D S D Srm fr dide, where R / R D V / V D I = Switching device reitance. = ON tate vltage. = Current flw thrugh witching device achieve the le equatin, then we mut calculate the average and rm value f current flwing thrugh each witche. Average value are, I C V CE I D + V C V CE 3 I C I C V CE ( at ) tr trr Fig. 7. Mdel f witching wavefrm during turn-n and turn-ff. tcf I = I = DI (64) ns S S I = I = D I (65) ( ) ffs S S

12 I = I = D I (66) ns 3 S 3 S 3 I = I = D I (67) ( ) ffs3 S4 S 3 Where ns and ns3 are ON time fr S and S 3 ; ffs are ffs3 are OFF time S and S 3 ; S and S3 are witching perid fr S and S 3 ; D and D are duty cycle fr each S and S 3. he rm value are ns S, rm= = S I I dt D I I I ( ) S, rm (68) = D I (69) = D I (7) S3, rm ( ) I = D I (7) S4, rm Frm Eq.(74)-(8), we can btain ttal witching l, P = Ed f( C + C( + ) I + C( + ) I ) (7) and ttal cnductin l, ( ) ( ) ( ) ( ) P = V + I + R + I + V I + R I (73) c D D Hence, the ttal le i P = P + P (74) S c Ed f( C + C( + ) I + C( + ) I ) + PS = V ( ) I R ( ) I VD( ) I RD( ) I C. Cmparin he equatin fr the perfrmance in tw-phae and three-level dc-dc cnverter are hwn in able and able. implify the cmparin, the reult btained in able and, are drawn. Fig. 8 hw urce current ripple, and Fig.9 hw it in extreme duty cycle. Fig. hw utput current ripple, and Fig. hw it in extreme duty cycle. Fig. hw the ttal l cmparin between three dc-dc cnverter. It can be een that large rati dc-dc cnverter reult the larget l fr all duty cycle. In large rati dc-dc cnverter, current flw thrugh tw witche. herefre, large rati dc-dc cnverter ha bad perfrmance in l apect. (75)

13 .5 x -5 knverter dua faa knverter tiga level knverter rai tinggi Riak Aru Sumber (A) Rai egangan Fig. 8. Surce current ripple cmparin. 3.5 x -7 3 knverter rai tinggi knverter dua faa knverter tiga level.5 Riak Aru Sumber (A) Rai egangan Fig. 9. Surce current ripple cmparin fr extreme vltage rati knverter rai tinggi knverter dua faa knverter tiga level Riak Aru Keluaran (A) Rai egangan Fig.. Output current ripple cmparin.

14 .3.5 knverter tiga level knverter dua faa knverter rai tinggi Riak Aru Keluaran (A) Rai egangan Fig.. Output current ripple fr extreme vltage rati. 6 5 raitinggi arge rati duafaa w-phae tigalevel hree-level Rugi-rugi ttal (W) Aru Output Keluaran current (A) Fig.. tal le cmparin. 4. Cntrl echnique fr arge Rati Dc-Dc Cnverter Current cntrller ha been ued in many cnverter applicatin[6]-[8]. Current cntrl ha the advantage in current prtectin epecially when hrt circuit ccurred. In additin, the ue f current cntrller enable parallel peratin f tw r mre imilar cnverter. hu the pwer capacity can be increaed. Cmmnly, in dc-dc cnverter applicatin, the current cntrl i ued in duble-lp cntrller. In thi cheme, vltage cntrller i in the uter lp while current cntrller i in the inner lp. he utput f vltage cntrller will be the input fr current cntrller. In the prped cntrller, hyterei current cntrller i ued while PI cntrller i ued a vltage cntrller a can be een in Fig. 3. he errr ignal between utput and reference vltage will be the input fr hyterei current cntrller. he utput ignal frm hyterei current cntrller will determine witching ignal. Since tw eparated witching ignal are required, additinal lgic circuit i needed t prduce thee ignal frm hyterei utput ignal. Whenever utput vltage i lwer than reference vltage, the required inductr current will be increaed. Hence, the duty cycle will be increaed. In cntrat, the duty cycle will be decreaed whenever utput vltage i higher than reference vltage in which the inductr current will be leened. In rder t maintain well peratin, the current cntrller ha t be fater in repne than the vltage cntrller. he prped cntrl technique blck diagram i

15 hwn in Fig. 4. Fig. 3 Cntrl technique fr high rati bt cnverter. Fig. 4 Blck diagram f cntrl ytem in high rati bt cnverter. he implicity and tability f hyterei cntrller i applied in the prped cntrl technique. Baically, hyterei current cntrller i the cntrller in which the allwed errr ignal i limited t the given hyterei band. If the inductr current exceed the upper band limit, then the witch i ff and the current i decreaing. hen if the inductr current exceed the lwer band limit, the witch turn n prvided the riing in current. he prce keep n ging a t keep the inductr current fllw the hyterei band path (Fig. 5). he intantaneu inductr current can be written a the um f average cmpnent and ripple cmpnent a fllw: Fig. 5 Current cntrller with hyterei band in bt cnverter.

16 i = i + i (76) where i and i are average and ripple cmpnent f inductr current repectively. Fig. 5 depict that the average inductr current i equal t the reference while the maximum inductr current ripple i ±, where i hyterei half band and can be expreed a: i ± imax iref ± (77) In bt cnverter the inductr current can be written a fllw: i = ( vs vo) dt+ i (78) where i i the initial inductr current. When the witch i n then v in (78) i zer, hence the inductr current i a fllw: vs i = t+ ( i ) ; fr < t < O (79) Frm Eq. (77) and (79), we get O witch a fllw O = vs (8) Inductr current when the witch i ff can be written a vs vo i = t+ ( i + ) ; fr < t < OFF (8) Nte that in (8) the utput vltage i bigger than input vltage; therefre the inductr current will decreae. Frm equatin (77) and (8), we get OFF f the witch a OFF = v v (8) O S A bt cnverter, then the requirement i k + k < (83) minimize current ripple caued by witching prce, then k = k (84) Fr balancing the witching pattern and fulfilling the Eq. (83) (84), 4vO S = S = S = ( O + OFF ) = (85) v v v ( ) S O S Frm Eq (85), the peratin frequency can be written a v f ; with S = fs = = (86) 4 v Fr extreme input-utput rati, the witching frequency can be apprximated t f S (87) 4 he witching ignal in bth witche are differed and eparated. In rder t keep the balance and ne after anther peratin f witching ignal, lgic circuit i required t be added t hyterei current cntrller. hu, it can be btained that

17 = (88) O O ( S ) ( ) t = t + n ; n=,,,... t = t + n ; n=,,,... S ( ) ( ) t = t + n+ ; n =,,,... S t = t + n+ ; n =,,,... S (89) (9) Where Sx and t x are witching perid and tate at the time t repectively. Frm equatin (89) and (9) it can be een that the witching ignal are never cllided. Becaue f the hyterei cntrl ytem ued i nn-linear; the implificatin can be dne t eae the analyi. In deigning the vltage cntrller we can aume that the current cntrller i well-perated prvided the reference i equal t the inductr current. he utput vltage f bt cnverter can be expreed a fllw: vo = iodt ; untuk t O C < < (9) vo = ( i io) dt ; untuk < t < OFF C With the aumed well-perated current cntrller, the blck diagram in Fig. 4 can be implified t the ne in Figure 6. Frm the figure, G c *() i when the witch i n and when the witch i ff. he cnequence f thi cnditin made the prped vltage cntrller i nn-linear. implify the analyi, the linearizatin prce can be ued. Eq. (9) can be written a dvo C = ( k) i io (9) dt where k i the variu duty factr and can be expre a k = k + k% (93) with the ign ~ indicate the ripple cmpnent with the prpertie a fllw: k % = ( k ) ; < t < O (94) k% = k ; < t < O S We can expre the Eq. (9) in repect t the vltage rati fr bt cnverter a dvo vs C = ( * ) i io ; * = (95) dt v O Splitting the Eq. (95) t the average and ripple cmpnent we can get d( v + v ) C = ( * + *)( i + i ) ( i + i ) (96) dt Becaue f average cmpnent in the left ide f the equatin i zer, and auming that the multiplicatin f ripple cmpnent i negligible, we can expre Eq. (96) a

18 dv C dt = ( *. i ) + ( *. i ) ( i ) (97) he Eq. (97) i valid fr mall ignal analyi. Uing the abve equatin, the repne f utput vltage becaue f mall duty cycle r lad deviatin can be analyzed. Fr each repne, we get v ( ) I *( ) C + *. G v( ) I ( ) C + *. G = (98) v v ( ) = (99) ( ) Frm Eq. (97), the blck diagram can be redrawn a can be een in Figure 6. he prped vltage cntrller i the cmmnly ued prprtinal-integral (PI). hi PI cntrller can eliminate teady-tate errr. We can get the deired tranient and teady-tate repne uing the ptimally adjuted cntrl ytem parameter. Applying prprtinal and integral cntant t G v *() in Figure 6 we can get utput vltage repne in repect t reference and lad current a fllw: V ( ) I *( ) + V ( ) I ( ) C + * K + * K = () C + * K p * Ki = () p i Uing witching frequency f khz and hyterei band f 4mA, frm (87) we get the inductance a large a.65mh. In rder t make the vltage cntrller repne lwer than the current cntrller, we can take the minimum criteria in which current cntrller repne i ten time greater than vltage cntrller repne. Hence, uing ytem parameter C = µf, it i btained that K p =. and K i = in which the gd tranient repne can be btained. Bde diagram f utput vltage repne in repect t the duty cycle and lad current change can be een in Fig. 7. (a) (b) Figure 6 (a) vltage cntrller blck diagram and (b) implified vltage cntrller blck diagram

19 6 Bde Diagram Magnitude (db) Phae (deg) Frequency (rad/ec) (a) Bde Diagram 4 Magnitude (db) Phae (deg) Frequency (rad/ec) (b) Fig. 7 (a) bde diagram f utput vltage repne v. duty cycle and (b) lad current 5. Experimental Reult In rder t verify the prped tplgy, a mall prped large rati dc-dc cnverter tplgy ha been cntructed baed n Fig. (e) fr buck cnverter and Fig. 3 fr bt cnverter. A. Ripple Analyi Fig. 8 and Fig. 9 hw experimented reult f utput current ripple and urce current ripple in large rati buck dc-dc cnverter. A can be een, the experimented reult apprpriate t the calculated reult..8.7 perhitungan ekperimen Riak Output Aru Current Keluaran Ripple (A) Duty Cycle Fig. 8. Experimented reult f utput current ripple.

20 .35.3 perhitungan ekperimen Surce Riak Aru Current Sumber Ripple (A) Rai egangan Fig. 9. Experimented reult f urce current ripple. B. Analyi Fig. hw the experimented reult cmpared with calculated reult. A can be een that the experimented reult appraching the calculated reult. he difference are caued by either inaccurate parameter and utput current cntain ripple in experiment perhitungan rugi ttal perhitungan rugi knduki ekperimen rugi ttal ekperimen rugi knduki Rugi-rugi e (W) (W) Aru Keluaran (A) Fig. Experimented reult f ttal le. C. Cntrl echnique Experiment i dne t ee the ytem repne a the cnequence f lad diturbance and reference vltage change. In current cntrller, current enr ued ha the parameter f A/V and hyterei band f 4mA. Experiment reult fr lad diturbance can be een in Fig.. With the exitence f lad diturbance, the utput vltage i cntant. he experiment reult uing input vltage with me ripple cmpnent i drawn in Fig.. We can ee that utput vltage i nt altered by high frequency ripple cmpnent in input vltage. With the reference vltage changed, experiment reult i a can be een in Fig. 3. In the lw frequency, the utput vltage will fllw the vltage given by the reference. But in higher frequency, the utput vltage cannt fllw the reference anymre.

21 > > Fig. Output vltage ignal (5V/div) when lad i changed (5mA/div) at 5m/div. > > Fig. Output vltage ignal (5V/div) when input vltage cntain me ripple (5V/div) at m/div. > > Fig. 3 Output vltage ignal (5V/div) in repect t reference (V/div) at 5m/div.

22 6. Cncluin A large rati dc-dc cnverter tplgy i derived. hi high rati dc-dc cnverter tplgy i able t cnvert it input vltage int very mall/big utput vltage withut need t perate it witching device in the extreme duty cycle a in the cnventinal dc-dc cnverter. Analytic equatin fr input and utput ripple f large rati ha been dicued. At extreme vltage rati, large rati dc-dc cnverter ha maller r equal ripple than tw-phae and threelevel dc-dc cnverter. Analytic equatin f witching and cnductin le ha been derived. he ttal l f large rati dc-dc cnverter i larger than the ther. Cntrl technique f large rati bt dc-dc cnverter ha been dicued. Duble lp cntrl technique with hyterei current cntrller and PI vltage cntrller i prven t wrk well in exitence f lad diturbance t maintain utput vltage. arge rati bt dc-dc cnverter i apprpriate fr renewable energy pwer generatr with lw dc vltage utput. Experimental reult ha been included t verify the prped tplgy. Reference [] Agu Purwadi, K.A. Nugrh, F. Sangk, K.F. Sutrina, and P.A. Dahn, Perfrmance Evaluatin and Cntrl echnique f arge Rati DC-DC Cnverter, t be publihed in ICEEI 9. Malayia. [] Agu Purwadi, P.A. Dahn and A. Rizqiawan, A New Apprach t Synthei f Static Pwer Cnverter, t be publihed in ICEEI 9. Malayia [3] A. Hunan Arfat, P. A. Dahn. Output Current Ripple Analyi f Multiphae Chpper. Electrical Machine and Pwer Electrnic (SMED) 5, Dec. 5. Malang [4] J.H. Rcktt. e in High-Pwer Biplar ranitr. IEEE ran. Pwer Electrnic, PE-, N., [5] P. A. Dahn, Y. Sat, and. Kataka. Analyi f Switching and Cnductin e in Hyterei Current-Cntrlled Inventer, ran IEE f Japan, Vl. 3-D, N., Oct., 993. [6] Dixn Juan. W., Oi Bn., Serie and Parallel Operatin f Hyterei Current- Cntrlled PWM Rectifier, IEEE ran. n Indutry Applicatin, Vl. 5, N. 4, 989. [7] Shin Eun-Chun. et. al, A Nvel Hyterei Current Cntrller t reduce the Switching Frequency and Current Errr in D-SACOM, he 3th Ann. Cnf. f the IEEE Indutrial Elect. Sciety, Nvember, 4. [8] illi Andrea, nielli Albert, Sequential Deign f Hyterei Current Cntrller fr hree-phae Inverter, IEEE ran. n Indutrial Electrnic, Vl. 45, N. 5, 998. [9] Dahn P.A., et al., Output Ripple Analyi f Multiphae DC-DC Cnverter, Prc. IEEE PEDS 99, July 999, Hngkng, pp [] Dahn, P.A., A New Multi evel DC-DC Cnverter, Internatinal Cnference n Electrical Engineering, Sappr, 4.

23 Parameter w-phae hree-level arge rati Output Current Ripple ( I % fr / fr / Ed ( ) ) Ed ( ) Ed ( +.5) f 4 3 ( ) f 3 f 4 3 fr / fr / Ed ( )( ) Ed ( )( ) ( ) f 3 f 4 3 Output Vltage if : Ed ( ) + Ripple Ed ( )( ) C 48 5 f f C( + M ) 4 5 if : Ed ( )( )( 3+ 8 ) f C( + M ) 4 5 ( ) Surce Current I ~ ) Ripple ( fr / ( ) I C f! fr / ( ) C f! 48 5 I ( ) fr / ( ) I C f! 48 5 fr / ( ) I ( ) 3+ 8 C f! 48 5 ( ) I 8 C f! + 8 able. Ripple equatin fr dc-dc cnverter.

24 arameter w-phae hree-level arge rati itching e E f C + C DI + C DI E f C C DI C DI d 4 ( ) ( + ) + ( + ) d ( ) E f C C D I C D I d nductin V DI + R DI + VD D I + RD ( D) I e ( ) RD ( ) ( ) D I V DI R DI V D D I ( ) ( ) ( ) + ( ) V + D I + R + D I + VD D I RD D I tal e Ed f C + CDI + CDI + 4 V DI + R DI + VD ( D) I + RD ( D) I Ed f ( C + CDI + CDI ) + V DI + R DI + V D ( D) I + RD ( D) I Ed f ( C + C ( + ) I + C ( + ) I ) + V ( + ) I + R ( + ) I + VD ( ) I + RD ( ) I able. e equatin fr dc-dc cnverter.

Lecture 13 - Boost DC-DC Converters. Step-Up or Boost converters deliver DC power from a lower voltage DC level (V d ) to a higher load voltage V o.

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