Features. = 25 C unless otherwise noted. Symbol Parameter Q2 Q1 Units. A - Pulsed (Note 1c & 1d)

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1 May 28 Dual Notebook Power Supply N-Channel PowerTrench in SO-4 Package General Description The is designed to replace two single SO- 8 MOSFETs in DC to DC power supplies. The high-side switch () is designed with specific emphasis on reducing switching losses while the low-side switch () is optimized to reduce conduction losses using Fairchild s SyncFET TM technology. The includes a patented combination of a MOSFET monolithically integrated with a Schottky diode. Features : 4 A, 3V. R DS(on) = 8.7 V GS = V R DS(on) =.5 V GS = 4.5V : A, 3V. R DS(on) = 3.2 V GS = V R DS(on) = 6 V GS = 4.5V SO-4 pin S2 S2 S2 G G2 Vin Absolute Maximum Ratings T A = 25 C unless otherwise noted Symbol Parameter Units V DSS Drain-Source Voltage 3 3 V V GSS Gate-Source Voltage ±2 ±2 V I D Drain Current - Continuous (Note a) 4 A - Pulsed 5 5 P D Power Dissipation for Single Operation (Note a & b) W (Note c & d).3. T J, T STG Operating and Storage Junction Temperature Range 55 to +5 C Thermal Characteristics Thermal Resistance, Junction-to-Ambient (Note a & b) R θja (Note c & d) 94 8 C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 3 6mm 25 units 28 Fairchild Semiconductor Corporation Rev A(X)

2 Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Test Conditio Type Min Typ Max Units Off Characteristics BV DSS Drain-Source Breakdown V GS = V, I D = ma 3 V Voltage V GS = V, I D = 25 µa 3 BVDSS T J Breakdown Voltage Temperature Coefficient I D = ma, Referenced to 25 C I D = 25 µa, Referenced to 25 C mv/ C I DSS Zero Gate Voltage Drain Current V DS = 24 V, V GS = V 5 µa V DS = 24 V, V GS = V, T J = 25 C ma µa I GSS Gate-Body Leakage V GS = ±2 V, V DS = V ALL ± na On Characteristics (Note 2) V GS(th) Gate Threshold Voltage V DS = V GS, I D = ma V DS = V GS, I D = 25 µa VGS(th) Gate Threshold Voltage I D = ma, Referenced to 25 C T J Temperature Coefficient I D = 25 µa, Referenced to 25 C R DS(on) Static Drain-Source V GS = V, I D = 4 A On-Resistance V GS = 4.5 V, I D = 3 A V GS = V, I D = 4A, T J = 25 C V GS = V, I D = A V GS = 4.5 V, I D = A V GS = V, I D =, T J = 25 C I D(on) On State Drain Current V GS = V, V DS = 5 V V GS = V, V DS = 5 V g FS Forward Traconductance V DS = V, I D = 4 A V DS = V, I D = A Dynamic Characteristics C iss Input Capacitance V DS = 5 V, V GS = V, C oss Output Capacitance f =. MHz C rss Reverse Trafer Capacitance R g Gate Resistance V GS = 5mV, f =. MHz V mv/ C mω A S pf pf pf Ω Rev A (X)

3 Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Test Conditio Type Min Typ Max Units Switching Characteristics (Note 2) t d(on) Turn-On Delay Time t r Turn-On Rise Time V DD = 5 V, I D = A, t d(off) Turn-Off Delay Time V GS = V, R GEN = 6 Ω t f Turn-Off Fall Time t d(on) Turn-On Delay Time t r Turn-On Rise Time V DD = 5 V, I D = A, t d(off) Turn-Off Delay Time V GS = 4.5V, R GEN = 6 Ω t f Turn-Off Fall Time Q g(tot) Total Gate Charge, V GS = V V DS = 5 V, I D = 4A Q g(tot) Total Gate Charge, V GS = 5V Q gs Gate-Source Charge V DS = 5 V, I D = A Q gd Gate-Drain Charge Drain-Source Diode Characteristics and Maximum Ratings I S Maximum Continuous Drain-Source Diode Forward Current V SD Drain-Source Diode Forward V GS = V, I S = 3.4 A (Note 2).5 V Voltage V GS = V, I S =.9 A (Note 2).4 V GS = V, I S = 2. A (Note 2).7.2 t rr Diode Reverse Recovery Time I F = 4A 22 Q rr Diode Reverse Recovery Charge di F /dt = 3 A/µs 5 nc t rr Diode Reverse Recovery Time I F = A 6 Diode Reverse Recovery Charge di F /dt = A/µs 5 nc Q rr nc nc nc nc A NOTE :. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pi. R θjc is guaranteed by design while R θca is determined by the user's board design. a) 68 C/W when mounted on a in 2 pad of 2 oz copper (). c) 8 C/W when mounted on a minimum pad of 2 oz copper (). b) 52 C/W when mounted on a in 2 pad of 2 oz copper (). d) 94 C/W when mounted on a minimum pad of 2 oz copper (). Scale : on letter size paper 2. Pulse Test: Pulse Width < 3µs, Duty Cycle < 2.% 3 4 Rev A(X)

4 Typical Characteristics: V GS = V 6.V 4.5V 4.V 3.5V 3.V 2.5V V DS, DRAIN-SOURCE VOLTAGE (V) Figure. On-Region Characteristics. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS = 3.V 3.5V 4.V 4.5V 6.V.V Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = 4A V GS =V R DS(ON), ON-RESISTANCE (OHM) I D = 7A T J, JUNCTION TEMPERATURE ( o C) Figure 3. On-Resistance Variation with Temperature V GS, GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance Variation with Gate-to-Source Voltage V DS = 5V 25 o C -55 o C V GS, GATE TO SOURCE VOLTAGE (V) I S, REVERSE DRAIN CURRENT (A).... V GS = V 25 o C -55 o C V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Trafer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. Rev A (X)

5 Typical Characteristics : V GS, GATE-SOURCE VOLTAGE (V) I D = 4A 8 V DS = V 2V 6 5V 4 2 CAPACITANCE (pf) C oss C iss f = MHz V GS = V Q g, GATE CHARGE (nc) Figure 7. Gate Charge Characteristics. C rss V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 8. Capacitance Characteristics.. R DS(ON) LIMIT V GS = V R θja = 94 o C/W s s DC ms ms ms µs P(pk), PEAK TRANSIENT POWER (W) R θja = 94 C/W T A = 25 C... V DS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area.... t, TIME (sec) Figure. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE.. D = t, TIME (sec) P(pk) R θja (t) = r(t) * R θja R θja = 94 C/W t t 2 TJ - TA = P * R θja(t) Duty Cycle, D = t / t2 Figure. Traient Thermal Respoe Curve. Thermal characterization performed using the conditio described in Note d. Traient thermal respoe will change depending on the circuit board design Rev A (X)

6 Typical Characteristics : SyncFET Schottky Body Diode Characteristics Fairchild s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 2 shows the reverse recovery characteristic of the. CURRENT:.8A/div Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power dissipated in the device. I DSS, REVERSE LEAKAGE CURRENT (A)..... T A = o C V DS, REVERSE VOLTAGE (V) Figure 4. SyncFET body diode reverse leakage versus drain-source voltage and temperature. TIME : 2nS/div Figure 2. SyncFET body diode reverse recovery characteristic. For comparison purposes, Figure 3 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET(FDS667A). CURRENT:.4A/div TIME : 2nS/div Figure 3. Non-SyncFET (FDS667A) body diode reverse recovery characteristic. Rev A (X)

7 Typical Characteristics: V GS = V 6.V 4.5V 4.V 3.5V 3.V 2.5V V DS, DRAIN-SOURCE VOLTAGE (V) Figure 5. On-Region Characteristics. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS = 3.V 3.5V 4.V 4.5V 6.V.V Figure 6. On-Resistance Variation with Drain Current and Gate Voltage. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = A V GS = V R DS(ON), ON-RESISTANCE (OHM) I D = 5.5A T J, JUNCTION TEMPERATURE ( o C) Figure 7. On-Resistance Variation with Temperature V GS, GATE TO SOURCE VOLTAGE (V) Figure 8. On-Resistance Variation with Gate-to-Source Voltage V DS = 5V 25 o C -55 o C I S, REVERSE DRAIN CURRENT (A)... V GS = V 25 o C -55 o C V GS, GATE TO SOURCE VOLTAGE (V) Figure 9. Trafer Characteristics V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 2. Body Diode Forward Voltage Variation with Source Current and Temperature. Rev A (X)

8 Typical Characteristics: V GS, GATE-SOURCE VOLTAGE (V) I D = A 8 V DS = V 2V 6 5V 4 2 CAPACITANCE (pf) C oss C iss f = MHz V GS = V Q g, GATE CHARGE (nc) C rss V DS, DRAIN TO SOURCE VOLTAGE (V) Figure 2. Gate Charge Characteristics. Figure 22. Capacitance Characteristics. 5. R DS(ON) LIMIT V GS = V R θja = 8 o C/W ms ms s s DC ms µs P(pk), PEAK TRANSIENT POWER (W) R θja = 8 C/W T A = 25 C... V DS, DRAIN-SOURCE VOLTAGE (V)... t, TIME (sec) Figure 23. Maximum Safe Operating Area. Figure 24. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE.. D = t, TIME (sec) P(pk) R θja (t) = r(t) * R θja R θja = 8 C/W t t 2 T J - T A = P * R θja (t) Duty Cycle, D = t / t 2 Figure 25. Traient Thermal Respoe Curve. Thermal characterization performed using the conditio described in Note c Traient thermal respoe will change depending on the circuit board design. Rev A (X)

9 tm tm TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx Build it Now CorePLUS CorePOWER CROSSVOLT CTL Current Trafer Logic EcoSPARK EfficentMax EZSWITCH * Fairchild Fairchild Semiconductor FACT Quiet Series FACT FAST FastvCore FlashWriter * FPS F-PFS FRFET Global Power Resource SM Green FPS Green FPS e-series GTO IntelliMAX ISOPLANAR MegaBuck MICROCOUPLER MicroFET MicroPak MillerDrive MotionMax Motion-SPM OPTOLOGIC OPTOPLANAR PDP-SPM Power-SPM PowerTrench Programmable Active Droop QFET QS Quiet Series RapidConfigure Saving our world mw at a time SmartMax SMART START SPM STEALTH SuperFET SuperSOT -3 SuperSOT -6 SuperSOT -8 SuperMOS The Power Franchise TinyBoost TinyBuck TinyLogic TINYOPTO TinyPower TinyPWM TinyWire µserdes UHC Ultra FRFET UniFET VCX VisualMax * EZSWITCH and FlashWriter are trademarks of System General Corporation, used under licee by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with itructio for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary No Identification Needed Obsolete Formative or In Design First Production Full Production Not In Production This datasheet contai the design specificatio for product development. Specificatio may change in any manner without notice. This datasheet contai preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. This datasheet contai final specificatio. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. This datasheet contai specificatio on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I34 Rev.A(X)

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