Virtual Induction Machine Strategy for Converters in Power Systems with Low Rotational Inertia

Transcription

1 Virtual Inuctin Machine Strategy fr Cnverters in Pwer Systems with Lw Rtatinal Inertia Urs Markvic, Petrs Aristiu, Gabriela Hug EEH - Pwer Systems Labratry, ETH Zurich, Physikstrasse 3, 892 Zurich, Switzerlan Schl f Electrnic an Electrical Engineering, University f Lees, Lees LS2 9JT, UK s: {markvic, hug}@eeh.ee.ethz.ch, p.aristiu@lees.ac.uk Abstract This paper presents a nvel cmprehensive cntrl strategy fr gri-cnnecte Vltage Surce Cnverters (VSCs) in pwer systems with lw rtatinal inertia. The prpse mel is base n emulating the physical prperties f an Inuctin Machine (IM) an taking avantage f its inherent gri-frienly prperties, i.e. self-synchrnizatin, virtual inertia, pwer an freuency scillatin amping. Fr that purpse, a etaile mathematical mel f the IMs wrking principles is erive, which inclues the pssibility f btaining the unknwn gri freuency withut a eicate synchrnizatin unit, but rather via prcessing the vltage an current magnitue measurements at the cnverter utput. This eliminates the nee fr an inherently nnlinear phase-lcke lp, characteristic fr virtual synchrnus machines, while simultaneusly preserving the synchrnizatin an amping prperties f a cnventinal electrical machine. Several case stuies are presente that valiate the mathematical principles f the prpse mel an cnclusins n VSC perfrmance are rawn. Inex Terms vltage surce cnverter (VSC), inuctin machine, phase-lcke lp (PLL), self-synchrnizatin, virtual inertia emulatin I. INTRODUCTION Vltage Surce Cnverters (VSCs) ften represent the interface between the Distribute Generatin (DG) an the gri. As a result, large-scale integratin f Renewable Energy Surces (RES) has le t an increase share f Pwer Electrnic (PE) evices in the pwer system. This can have a negative impact n the system stability margin ue t the verall reuctin f rtatinal inertia [] [3]. On the ther han, imprtant uestins regaring the peratin an hanling f cnverters in a pwer system with multiple traitinal Electrical Machines (EMs) have been raise ver the previus years, in particular fcusing n the unpreictable behavir f cnventinal PE cntrl strategies in the presence f such machines [4] [6]. One f the mst cmmn appraches t reslving the assciate faster freuency ynamics an larger eviatins in the system is thrugh alternative cnverter cntrl cncepts that wul repruce the stabilizing behavir f the ecreasing rtatinal inertia. Assuming that in the future the gri wul cnsist f bth machine- an PE-base units, the iea f This prject has receive funing frm the Eurpean Unin s Hrizn 22 research an innvatin prgramme uner grant agreement N 698. This paper reflects nly the authrs views an the Eurpean Cmmissin is nt respnsible fr any use that may be mae f the infrmatin it cntains. eriving a unifie cntrl cnfiguratin fr bth unit types s that the gri experiences them in a similar fashin prevails as the mst investigate apprach in the literature [7] [3]. These stuies present smewhat similar variatins f the cmmn emulate Synchrnus Machine (SM), efine as: synchrnus VSC [7], virtual synchrnus generatr [8], [], virtual SM [9], synchrnus cnverter [], [3] an VISMA [2]. Alternatively, the apprach in [4] aims at replicating the characteristics f a VSC in a synchrnus generatr. Hwever, all f the afrementine methlgies result in the same unesirable effects ue t the prperties f SM, such as a nee fr a synchrnizatin unit, ptential f freuency hunting an insufficient saturatin f fault currents [5]. In rer t regulate a gri-cnnecte inverter as a vltage surce, a cntrl seuence cnsisting f a synchrnizatin unit, an uter pwer lp an a cascae f inner vltage an current cntrl lps has becme an inustry stanar fr prviing aeuate vltage, active an reactive pwer utputs [6]. Furthermre, the nrm f having a Phase-Lcke Lp (PLL) as a synchrnizatin unit has been establishe [7], tgether with its numerus variants [8], [9]. Hwever, espite being wiely use, this aitinal, inherently nnlinear, uter lp intruces cmplexity an time elay int the riginal cntrl system an may be extremely ifficult t tune [2], [2]. Recent stuies have aresse this issue an cncepts f PLL-less cnverter regulatin in the frm f pwer-synchrnizatin [22] an self-synchrnizing synchrnverters [2] have emerge. While seemingly prviing synchrnizatin prperties, the prpse meths als have sme wnsies. The pwer-synchrnizatin is mstly riente twars VSC-HVDC applicatins an faces challenges with weak AC system cnnectins, whereas the synchrverter cncept still reuires a back-up PLL an imprvements in peratin uner unbalance an istrte gri vltages. A recently prpse VSC cntrl meth uner the name f inucverter intruces the iea f a gri-cnnecte cnverter perating uner Inuctin Machine (IM) wrking principles an n eicate PLL unit [23]. Althugh the cncept is still at its early stages, it can ptentially reslve the issues assciate with the cnventinal uter synchrnizatin lp, while still preserving the amping an synchrnizatin prperties f a virtual inertia. This wrk refrmulates the mathematical principles f a virtual machine frm [23] an extens n it in several

2 irectins by: (i) integrating it n tp f the fully evelpe VSC rp cntrl; (ii) implementing a cmplete inner cntrl seuence instea f an aaptive lea/lag cmpensatr; an (iii) re-rienting the frame cntrl frm a hybri (abc/) t a synchrnusly rtating ()-frame. First, we prpse a etaile cntrl cnfiguratin f a vltage surce-perate cnverter regulate as an IM. The cntrllers are esigne accring t the machine s electrmechanical principles, an tune fr the ptential VSC mes f peratin. Secn, a etaile cnverter cntrl mel is incrprate an teste in a simulatin envirnment, which enables us t raw aeuate cnclusins regaring the verall emulatin prperties an the system respnse. The remainer f the paper is structure as fllws. In Sectin II, a etaile mathematical mel f a VIM is presente. Sectin III escribes the prperties f a VSC emulate as an IM an prpses a cmprehensive cntrl scheme. Sectin IV shwcases the preliminary results f transient simulatins, whereas Sectin V iscusses the utlk f the stuy an cnclues the paper. II. VIRTUAL INDUCTION MACHINE MODEL A. Inuctin vs Synchrnus Machine: Wrking Principles One f the main ifferences between the synchrnus an inuctin machine is the physical cncept behin the rtr mvement an the subseuent synchrnizatin t the gri. While the SM always perates at synchrnus spee, the IM reuires a mismatch between the synchrnus an the machine spee t perate, a s-calle slip (ν): ν = ω r = ω ν () In (),, ω r an ω ν ente the synchrnus, rtr an slip freuency, respectively. Furthermre, unlike synchrnus generatrs, inuctin machines nt have an excitatin system in the rtr. This means that the ElectrMagnetic Fiel (EMF) inuce in the rtr f an IM is a cnseuence f its rtatin an the subseuent change f the magnetic flux linkage thrugh the circuit. Since the rtr is clse thrugh either an external resistance r a shrt-circuit ring, the inuce EMF generates a current flw in the rtr cnuctr. Therefre, the machine can never be perating at the synchrnus spee, since there wul be n EMF in the rtr frame t initiate its mvement. Base n the previusly escribe prperties, ne can bserve that the IM with an arbitrary initial rtr spee smewhat clse t the synchrnus spee has self-start capability, i.e. has the ptential t synchrnize with a gri f an unknwn freuency an vltage magnitue. This implies that the PLL units, tgether with their inherent wnsies in the frm f time elay an stability margins, cul be avie frm the cnverter mel. Nnetheless, all f the avantageus inertia prperties, such as pwer an freuency scillatin amping, can be apprpriately repruce via a clse-lp cnverter cntrl. B. Inuctin Machine Emulatin Cncept Fr the purpse f emulating the perating principles f an IM thrugh VSC cntrl, let us bserve the mel f an IM in a synchrnus ()-frame [24]: v s = R s i s + ψ s ψ s (2) v s = R s i s + ψ s + ψ s (3) v r = = R r i r + ψ r ω ν ψ r (4) v r = = R r i r + ψ r + ω ν ψ r (5) where v s, v r, ψ s, ψ r are respectively the statr an rtr vltages an flux linkages. The superscripts an refer t the crrespning axis f the ()-reference frame, rtating at the time-variant synchrnus spee. Base n the afrementine euivalent circuit mel, the set f euatins fr the statr an rtr flux linkages can be efine as: ψ s = L s i s + L m i r (6) ψ r = i r + L m i s (7) with vectrs ψ T s = [ ψs, ψs], ψ T r = [ ψr, ψr], i T s = [ ] i s, i s an i T r = [ i r, ir] enting the flux linkage an current cmpnents in ifferent axes. Finally, the electric pwer passing between statr an rtr can be expresse in the fllwing frm: 3 ( p e = ψ 2 s i s ψsi 3 ( s) = ωs ψ 2 r i r ψr i r) (8) which yiels the virtual electrical true τ e = p e = 3 ( ψ 2 s i s ψsi 3 s) = 2 L ( m i r i s i ri s) (9) It can be bserve that the expressin f τ e in (9) is the same as a synchrnus machine [24]. While the synchrnus spee ( ) appears in (2)-(5), the cntrl cncept prpse in [23] es nt inclue a PLL evice. Therefre, is an unknwn variable that nees t be cmpute. Fr that purpse, a fiel-riente IM cntrl, first presente in [25], is emplye expressing as a functin f ther system parameters. Since the irectin f the ()-frame is arbitrary, it is assume that in steay state the virtual rtr flux is aligne with the -axis, resulting in a simplifie mel with ψ r =. The escribe prceure is similar t nes use in cnventinal PLLs, where the calculatin f the vltage angle is base n aligning the vltage vectr with the -axis f the synchrnus reference-frame [26]. Having in min the suggeste apprximatin, (7) is refrmulate as: i r = ψ r L m i s () i r = L m i s () Furthermre, the expressins fr rtr vltage cmpnents in (4) an (5) can nw be rewritten as: = R r i r + ψ r (2) = R r i r + ω ν ψ r (3)

3 Substituting () int (2) an applying the Laplace transfrm yiels: ψ r = R r i r = R r ( ψ L m i ) L s r ψ r = R rl m R r + s i s = K ψ i s (4) In a similar fashin, the virtual slip f the IM is cmpute by cmbining euatins (), (3) an (4): ω ν = R r ψr i r = R rl m L ( ) r Rr i ω ν = + s s i s i s ψr = K ν i s i s L (5) The final term in (5) escribes the ynamics f the freuency slip, which is aaptable t the variatins in gri freuency an machine pwer utput. Hwever, an exact estimatin f the rtr angle an freuency is necessary t remve the PLL an cmpletely replace its functins. This can be achieve by bserving the swing euatin f a VIM an btaining the mechanical ynamics f the rtr: J ω r = τ m τ e τ (6) where J is the virtual rtr s mmentum f inertia, an τ m, τ e an τ crrespn t the mechanical, electrical an amping true. If we set ω r as eviatin f ω r frm an initial value ω, the expressin (6) becmes: ω r = J (τ m τ e τ ) (7) The electrical true cmpnent is efine in (9), but can be further simplifie by substituting the expressins f statr flux linkage cmpnents: ( ) ψs = L s L2 m L ( r ψs = L s L2 m i s + L m ψ r (8) ) i s (9) Euatins (8) an (9) are btaine frm (6) an (7). The electrical true is nw refrmulate as fllws: where τ e = 3 L m ψr i L s τ e = K e i 2 L si s (2) r K e = 3 L m K ψ = R r L 2 m R r + sl 2 r (2) The mechanical true is etermine by the inverter mechanical pwer input an the angular spee f the rtr. Assuming a lssless cnverter, the input pwer can be apprximate by the utput pwer measure at the cnverter terminal (p), as given by: τ m = p m ω r p ω r (22) The ntatin (s) f cmplex variable terms in freuency main is mitte frm euatins fr simplicity. Finally, the amping true is prprtinal t the rtr freuency eviatin: τ = K ω r (23) which yiels the fllwing lw-pass filter characteristic f the VIM in the freuency main: ω r = Js + K (τ m τ e ) (24) Similar t the synchrnus machine mel, the amping factr K represents an euivalent f the VM t the active pwer rp. The synchrnus spee an angle reference can be btaine frm ω, ω ν, an ω r, as fllws: ω r = ω + ω r (25) = ω r + ω ν (26) L θ = θ = s (ω + ω r + ω ν ) (27) Base n the mel escribe by (2)-(27), it is shwn that the clse-lp cntrller aeuately emulates the inertia an amping f an IM, base nly n the vltage (v c ) an current (i c ) measurements at the cnverter terminal. Furthermre, it prvies synchrnizatin prperties thrugh cmputing the vltage angle an freuency reference necessary fr the Park transfrmatin, thus fully replacing the cnventinal PLL. Euatins (25)-(27) reflect the wrking principles f an IM an shw that the ifference between the synchrnus an initial rtr freuency can have a significant impact n the freuency eviatin. The prper selectin f ω prir t the gri cnnectin f the VSC reuces ω r an the subseuent transients. This cncept resembles the behavir f an inuctin generatr in a similar peratin me presente in [23]. It can be reasnably assume that the VSC is cnnecte t the gri uring steay-state peratin. Thus, a very basic PLL can be use nly t estimate ω. Hwever, even if this functinality is nt available, any reasnable ω will still allw the VIM t synchrnise, while intrucing sme transients (as shwn in Sectin IV-B). III. VSC CONTROL SCHEME An verview f the VIM mel is shwn in Fig., where the VSC is cnnecte t the gri thrugh an RLC filter an a phase reactr. The utput vltage angle an magnitue references are generate by an uter active an reactive pwer cntrller, respectively. The reference vltage vectr signal is sent t the inner cntrl lp cnsisting f cascae vltage an current cntrllers perating in a Synchrnusly-rtating Reference Frame (SRF). The istinctin frm a virtual SM mel lies in the Virtual Machine Emulatr (VME). The stanar SM emulatin techniues cntrl the active pwer utput f the cnverter in such a way that it replicates the reuce mathematical mel f a synchrnus machine, i.e. emulating the inertial characteristic an amping. These terms are incrprate int the swing euatin tgether with the actual gri freuency measure with a PLL. On the cntrary, the prpse VIM apprach

4 ω Pwer Calculatin Unit p v i abc i abc v abc C f R pr L pr Gri v Reactive Pwer Cntrller v c Virtual Machine Emulatr L f R f [v, i ] θ c [v c, i c ] p Active Pwer Cntrller ω c SRF Vltage Cntrller i c SRF v c Current PWM m Cntrller Inner cntrl lp v c C c v c Fig. : VSC cntrl scheme fr an emulate inuctin machine. ω i abc p abc p p i v ωf ωf +s i i p ωf ωf +s D p (c) D K ν K e ω ν τ e Js+K s ω r Fig. 2: Main cntrl blcks f an inuctin machine emulatr: Virtual machine emulatr. Active pwer cntrller. (c) Reactive pwer cntrller. incrprates a mre stable VME lp an ecuples it frm the actual pwer cntrllers, as escribe in Sectin III-A. Furthermre, it can be bserve in Fig. that the SRF rientatin f the inner cntrl lp is inepenent f any synchrnizatin evice as it is etermine by the balancing mechanism f the inertial respnse [27]. The cnfiguratin f τ m v c ω r θ c ω c the afrementine main cntrl blcks is epicte in Fig. 2 an the mathematical reasning behin it is elabrate in mre etail belw base n [9], [23], [28]. A. Virtual Machine Emulatr This blck represents the central emulatin unit f a VIM. It generates the internal freuency reference use as an input fr the Active Pwer Cntrller (APC), thus eliminating the nee fr a PLL. The cntrl esign is base n es. (5), (2)- (24) an presente in Fig. 2a. One f the main avantages f this apprach is that the unknwn gri freuency can be btaine by simply measuring the current (i abc ) an active pwer (p) magnitues, i.e. current an vltage at the filter utput terminal (i abc, v abc ). Thus, the rawbacks f using a PLL unit fr freuency estimatin are reslve. Anther necessary input fr the VME is the initial rtr freuency (ω ), which etermines the IM scillatin level at start-up. Hwever, the reuirements fr the value f ω are nt very strict, as it shul nly be clse enugh t the synchrnus spee an subseuently let the emulate physical machine prperties bring the VSC t synchrnism. Besies replicating the synchrnizatin capabilities, VME als prvies current an pwer amping prperties, all unifie within a single cntrl blck. Unlike the mst virtual SM mels, this cnfiguratin fully ecuples active pwer an inertia/amping emulatin cntrls. B. Active Pwer Cntrller Drp cntrl clsely represents the relatinship between the freuency an active pwer, an is therefre traitinally use as a meth f cntrlling the cnverter s active pwer utput in rer t slw wn an stabilize freuency eviatin in case f a isturbance. Alternatively, varius cntrl meths erive frm the swing euatin an the crrespning pwer-balancing an scillatin-amping prperties cul be

5 emplye [28] [3]. Hwever, it has been prven that a lwpass-filtere rp regulatr with a cnstant angular freuency an active pwer setpint is euivalent t the VSM mel base n the swing euatin, with n filtering crrespning t a machine f zer inertia [9]. Due t the presence f an explicit synchrnizatin lp, an in cntrast t the wrk in [28], the prpse cncept is implemente nly thrugh a pwer-freuency rp. Hence, the APC epicte in Fig. 2b is esigne as a rp gain (D p ) impse nt the ifference between the setpint (p ) an the filtere pwer measurement ( p): ω c = D p (p p) (28) The cntrller s utput (ω c, θ c ) is then further use as an inicatr f the SRF rientatin in bth inner an uter cntrl lps. C. Reactive Pwer Cntrller The reactive pwer regulatin cnsists f a simple rp cntrller escribe by v c = v D ( ) (29) an shwn in Fig. 2c. The Reactive Pwer Cntrller (RPC) etermines the initial vltage magnitue reference f a VSC terminal ( v c ) using a rp gain (D ) an a eviatin between the filtere reactive pwer measurement ( ) an the external reactive pwer reference ( ) signal. D. Inner Cntrl Lp an Mulatin The cnfiguratin f a VIM cntrl scheme base n prviing a vltage reference utput is avantageus ue t its explicit an ecuple active an reactive pwer cntrllers. Hwever, a irect use f such signal fr Pulse-With Mulatin (PWM) raises prblems regaring the limitatins an cntrlle saturatin f the cnverter s currents an vltages [9]. These issues are cnveniently reslve with a cascae inner cntrl scheme where the initial reference ( v c ) is prcesse thrugh a seuence f vltage an current lps, yieling a mre rbust cnverter setpint (v c). This apprach increases the flexibility f prtectin strategies an is cmmnly use in rp-cntrlle micrgris [3], [32]. Assuming an RLC-type filter cnnecting the cnverter an the phase reactr, the state-space euatins f the cnverter s terminal vltage an current cmpnents are erive in the ()-frame: v c = v + L f ic + R f i c (3) i c = i + C f v (3) where L f, R f, an C f are the static filter parameter. The cnfiguratin f the inner cascae lps an the mulatin blck is erive frm (3)-(3) an etaile belw. ) SRF Vltage Cntrller: The structure f the SRF vltage cntrller fllws the same principles as the cntrllers in [9], [28]: ( ) i c = Kf i i + ( v c v ) Kp v + Kv i + ω c C f ˆv (32) s where ˆv T = [ v, v]. We use a stanar PI cntrller, with Kp v an Ki v being respectively the prprtinal an integral gains, t minimize the errr between the setpint ( v c ) an the utput vltage ( v ). Furthermre, a fee-frwar signal f the measure currents can be enable r isable by changing the gain Kf i [, ]. The utput current reference (i c) is then use as an input setpint t the current cntrller. 2) SRF Current Cntrller: Similar t its vltage cunterpart, the cnfiguratin f the SRF current cntrller is base n a PI cntrl with ecupling terms: ( v c = Kf v v + (i c i ) Kp i + Ki i s ) + ω c L f î (33) where [ K ] p v, Ki v an Kf v are the cntrller gains, an ît = i, i. The generate utput vltage reference (v c ) is use t etermine the final mulatin signal as explaine in the next subsectin. 3) Pulse-With Mulatin: Fr the purpse f an actual implementatin f the VSC switching seuence, the vltage reference signal (v c) frm the current cntrller must be prcesse an cnverte int the mulatin inex (m). This can be achieve thrugh means f instantaneus averaging applie t the utput vltage f the cnverter. Furthermre, the time elay effect f PWM is neglecte, which yiels the fllwing expressin: m abc = (T p T c ) m = (T p T c ) v c (34) v c 2 T c = (35) 3 2 [ ] cs θ αβ sin θ T p = αβ sin θ αβ cs θ αβ (36) where T c an T p ente the Clarke an Park transfrmatin matrices use fr cnverting the vltage measurements int the ()-frame. The inclusin f the DC vltage (v c ) enables the averaging an ensures that the actual VSC utput is clse t the initial reference. Aitinally, it reuces the AC sie sensitivity t the scillatins f the DC vltage [28]. IV. RESULTS In this sectin, the perfrmance f the prpse cntrl scheme is stuie fr varius mes f peratin. Fr this purpse, an average cnverter mel was implemente in MATLAB Simulink with the use f SimPwerSystems tlbx fr meling f the external cmpnents (netwrk lines, las, etc.). The full parameters f the cnverter use are given in Table I.

6 TABLE I: VIM Simulatin Parameters Parameter Symbl Value Nminal active pwer P n GW Nminal ph-ph vltage V n 32 kv DC link vltage V c 64 kv Nminal freuency f n 5 Hz Inertia cnstant H 5 s Damping cnstant K Nm ra/s Rtr resistance R r.5 p.u. Rtr inuctance.5 p.u. Mutual inuctance L m.6 p.u. Active rp gain D p.2 p.u. Reactive rp gain D. p.u. v [p.u.] v g v c v The respnse f the VIM is highly epenent n the selectin f the euivalent physical machine parameters. This mainly refers t the rtr resistance an inuctance, as well as the mutual inuctance inclue in the cntrller transfer functin K e. Aitinally, prper inertia an amping cnstants are crucial t crrectly calculate the rtr freuency. In turn, this affects the sinusial nature f the vltage an current at the cnverter utput terminal. T select the parameters f the VIM, we have use the prperties f a.5 MW win turbine inuctin generatr (type- win turbine) an scale-up its per unit parameters accringly. The ynamics f the freuency slip are escribe via K ν in (5) an melle with a PD blck. The prprtinal an erivative gains are Kν p = R r / an Kν =, respectively. During the transient respnse f the cnverter, the current erivative gain can be extremely high an estabilize the mel. This prblem is vercme by emplying the Ziegler- Nichls meth [33] fr tuning f a PD cntrller, i.e. etermining the ptimal Kν cmpnent, while assuming the same prprtinal gain Kν p. As a result, an ptimal gain f Kν =. has been cmpute an use thrughut this stuy. The parameters f the PI cntrllers in the inner vltage an current cntrl lps have been kept the same as fr the stanar VSC perating me, since their time cnstants rastically iffer frm the nes in the uter cntrllers an eliminate any ptentially isruptive interactins. Furthermre, it enables us t test the plug-n-play prperties f the virtual emulatr. The remainer f this sectin fcuses n analyzing the transient behavir f the prpse VIM uring varius peratins, such as start-up an synchrnizatin, respnse t setpint variatin an vltage an pwer reference tracking. Finally, the impact f the initial rtr spee estimate (ω ) n the cnverter synchrnizatin prcess with the gri is stuie. A. Start-up an Synchrnizatin In this subsectin, the cnnectin f a VSC t the gri is stuie. The cnverter is cnnecte t the gri at t = s, while the initial rtr freuency is assume t be f = 5 Hz, same as the gri freuency. The vltage reference is initialize at v = p.u., whereas the active an reactive pwer setpints i [p.u.] p, [p.u.] (c) Fig. 3: Behavir f the cnverter emulate as a virtual inuctin machine uring start-up: RMS utput vltages (befre an after the filter). RMS utput current with -cmpnents. (c) Active an reactive pwer utput an reference tracking. are p =.5 p.u. an = p.u., respectively. Figure 3 cnfirms the sft-start an self-synchrnizatin capabilities f the VIM, as well as an aeuate amping characteristic. The setpints are crrectly fllwe an the vltage an current vershts uring start-up are acceptable. Furthermre, the initial transient respnse can be explaine by bserving the estimate synchrnus freuency an its cmpnents in Fig. 4. As shwn in Fig. 4b, the freuency i c i c i c p p

7 f [Hz] f [Hz] f f s f c f r f ν Fig. 4: Freuency respnse f the virtual machine emulatr uring start-up: Initial an cmpute freuency terms. Cntributin f ifferent freuency cmpnents. slip term (f ν ) is very vlatile uring the first ms, unlike the rtr freuency ynamics term ( f r ). This is ue t tw reasns: (i) freuency slip is prprtinal t the utient i s/i s, which can reach very high values when i c ; (ii) K ν behaves as a PD cntrller, with its erivative actins (Kν ) being mstly use thrughut the first ms f the startup. After 4 ms bth freuency cmpnents stabilize an the synchrnus freuency reaches a steay state value f f s 5.3 Hz, whereas the active pwer rp cntrller brings it back t the nminal value (f c ). The initial VSC vercurrent respnse shwn in Fig. 5b fllws the characteristic respnse f an IM an the synchrnizatin f all three phases is achieve within ten cycles. Aitinally, the lack f a PLL unit simplifies the mel an eliminates ptential instabilities cause by the synchrnizatin lp. It can be cnclue that, unlike the cnventinal synchrnizatin appraches, this strategy enables the cntrller t easily track the preefine setpints immeiately after the start-up prcess. Nnetheless, it shul als be pinte ut that, espite fllwing the reference, the active pwer utput f the cnverter will never be exactly the same as the setpint p, but rather have a small steay-state mismatch. The reasn fr this can be explaine by bserving (28) an Fig. 4, which vc [p.u.] ic [p.u.] Fig. 5: Three-phase cmpnents at the cnverter utput uring start-up: Instantaneus utput vltages. Instantaneus utput currents. inicates that the freuencies an ω c are nt ientical an, therefre, lea t a small ifference between the active pwer measurement an the respective setpint. B. Sensitivity t estimate initial freuency One f the reuirements f the prpse VME blck is the estimatin f the initial rtr freuency, ente as f. In the previus example, it was shwn that assuming f = f n leas t a very respnsive system with g synchrnizatin an amping prperties. Hwever, having knwlege f the exact gri freuency prir t the cnnectin f the VSC might nt be feasible. Thus, the impact f selecting f ifferent frm the real gri freuency is stuie in this subsectin. The f values f 5 Hz, 49.9 Hz an 5. Hz have been use an the crrespning behavir f the VIM is epicte in Fig. 6. While the synchrnus spee cmpute thrugh the VME unit tens t stay clser t f, the final freuency term resulting frm an active pwer rp cntrl eventually synchrnizes with the gri. This cnfirms that fr f inputs that are bth reasnably higher an lwer that the actual gri freuency, the synchrnizatin prperties f VIM remain stable uring start-up. C. Setpint Variatin an Reference Tracking Anther imprtant aspect f the cntrller perfrmance is the reference tracking capability, such as a vltage reference

8 f [Hz] f s(f = 5 Hz) f c(f = 5 Hz) f s(f = 49.9 Hz) f c(f = 49.9 Hz) f s(f = 5. Hz) f c(f = 5. Hz) v [p.u.] v v vc [p.u.].2..9 f = 5 Hz f = 49.9 Hz f = 5. Hz p, v, f [p.u.] p p v c f s ic [p.u.] (c) f = 5 Hz f = 49.9 Hz f = 5. Hz Fig. 6: Impact f initial rtr freuency term n the synchrnizatin prcess f a VIM uring start-up: Freuency. Output vltage. (c) Output current. variatin r a step change in the active pwer setpint. Bth scenaris are presente in Fig. 7, with setpint changes ccurring at t =.25 s in each case. The vltage reference is suenly increase by 5 %, whereas the active pwer reference spikes frm p =.5 p.u. t p =.6 p.u., i.e. 2 %. Bth steps last fr.25 s, befre returning t the initial values. The vltage respnse in Fig. 7a shws that the utput vltage (v ) is fllwing the reference with reasnable scillatin amping. Hwever, at bth step changes vervltages ccur fr a shrt peri f time ( 2 ms). Nnetheless, after the initial Fig. 7: VIM respnse t the variatin f cntrller setpints: Variatin f the vltage setpint. Variatin f the active pwer setpint. transient behavir the vltage stabilizes arun the preefine setpint value. On the ther han, vltage an freuency spikes uring the step change f active pwer setpints are uite negligible. Similar t the previus case stuy, the pwer utput fllws the reference, but with a small steay state errr escribe previusly. V. CONCLUSION In this paper, a nvel cntrl strategy fr gri-cnnecte VSCs with the use f inuctin generatr emulatin has been prpse. In particular, a etaile IM mathematical mel was erive, tgether with a crrespning cnverter cntrl scheme. The prpse apprach eliminates the nee fr a eicate PLL unit, while simultaneusly preserving the synchrnizatin an amping prperties f a virtual inuctin machine. It can easily be integrate with the existing inner an uter cnverter cntrl lps, withut any negative interactins, ue t its universal esign an plug-n-play characteristics. Several test cases have been cnucte an the fllwing prmising cnclusins can be rawn: The start-up f the VIM an the synchrnizatin with the gri are smth, with reasnably small current vershts. The cmputatin f all freuency cmpnents is accurate, even when the initial rtr

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