Relationship Between Amplifier Settling Time and Pole-Zero Placements for Second-Order Systems *

Transcription

1 Relatinship Between Amplifier Settling Time and Ple-Zer Placements fr Secnd-Order Systems * Mark E. Schlarmann and Randall L. Geiger Iwa State University Electrical and Cmputer Engineering Department Ames, IA 5 Abstract-Due t the fact that a nnlinear equatin has t be slved t determine the settling time f a linear time-invariant system, the relatinship between the ple-zer cnstellatin and settling time is nt readily apparent. This makes it difficult t design amplifiers with ptimal r near-ptimal settling perfrmance. This wrk attempts t instill a deeper understanding f hw ple-zer placement relates t the settling perfrmance f secnd-rder systems. I. INTRODUCTION Secnd-rder mdels are frequently used t characterize the behavir f linear time-invariant systems and have been widely studied. Hwever, due t the fact that a nnlinear equatin has t be slved t determine the settling time, the relatinship between the ple lcatins and settling time is nt readily apparent. Ecepting the facts that mving the ples further int the left half-plane (LHP) results in faster settling and that the characteristic equatins f a systems with widely spaced ples can ften be apprimated as first-rder, mst designers have limited insight int eactly hw ple placements relate t settling time. Designer intuitin is especially lacking fr cases that include a finite zer in the transfer functin. In 93, using a nrmalized transfer functin, Waldhauer [] demnstrated that a clsely-spaced lw-frequency ple and zer results in an ften undesirable slw-settling cmpnent in the transient respnse. He derived an epressin fr the maimum amunt f clsed-lp ple-zer mismatch that can be tlerated t ensure that the unwanted settling cmpnent is n larger than a specified level. Finally, he mapped the clsed-lp mismatch requirements int pen-lp accuracy requirements using the standard negative feedback equatin. Kamath, Meyer, and Gray [] later etended his wrk t include finite amplifier slew effects. The treatments in [] and [] nly cnsider the special case f a secnd-rder system with a clsely spaced ple and zer that are psitined much lwer in frequency than the ther system ple. Many ther types f physically realizable and advantageus secnd-rder systems are frequently encuntered but several unanswered questins must be addressed t derive ptimal benefit frm these systems. Hw fast will these alternative systems settle t a specified accuracy level? Where shuld the ples and zers be placed t btain the best pssible settling perfrmance? Hw sensitive t prcess, temperature, and aging will the resultant systems be? T keep the fllwing analysis simple, it is assumed thrughut that the systems are linear. Nnlinearities such as finite slew capabilities f amplifiers will be neglected. Mst amplifier structures that have accurate gain requirements eplit negative feedback t stabilize the gain. Such systems are ften characterized by tw sets f ples, thse f the pen-lp amplifier, and thse f the clsed-lp amplifier. The ple lcatins cited thrughut this paper refer t the clsed-lp ple lcatins which are the psitins the ples migrate t after the feedback lp is clsed. Varius definitins f settling time eist. Fr this paper it is assumed that the settling time is the minimum amunt f time that must elapse after a step change in the input befre it can be guaranteed that the present and all future values f the utput will lie within a specified tlerance f the utput signal's asympttic value. The specified tlerance is characterized by the parameter h as depicted in Fig.. A (+h) A A (-h) y(t) T s Fig.. Graphical depictin f settling time All-ple systems are cnsidered in Sectin II. Systems that cntain a finite LHP zer are addressed in Sectin III. Separate subsectins are prvided in each case t cnsider systems with real and cmple ples. II. ALL-POLE SECOND-ORDER SYSTEM The settling time f an arbitrary asympttically-stable all-ple secnd-rder system is cnsidered in this sectin. The cases f real and cmple ples are cnsidered separately in Subsectins A and B respectively. A. Secnd-Order System with Real Left Half-Plane Ples Fig. (a) depicts a linear system with tw real left halfplane (LHP) ples. Fr this discussin, the lwer frequency ple is dented as P while the higher frequency ple is dented as P. time * Supprt fr this prject has been prvided, in part, by Teas Instruments Inc., RcketChips Inc., and the Ry J. Carver Charitable Trust.

2 Time Scale by /P 4 Increasing ple separatin -P -P -ρ - (a) Fig.. Ple-zer map f a linear system with tw real LHP ples (a) riginal system (b) after time scaling by /P (the nrmalized system) The settling time, T s, is a functin f P, P, and the level f settling accuracy required, h. Thus, there are 3 independent degrees f freedm t cnsider. By utilizing the time-scaling prperty f the Laplace Transfrm t nrmalize the transfer functin, the number f variables required fr the visualizatin can be reduced frm 3 t. The time-scaling prperty f the Laplace Transfrm is given by: f ( a t) F (b) s () a a Scaling the time-dmain respnse crrespnds t frequency scaling its Laplace Transfrm. Therefre, as depicted in Fig. (b), time scaling by /P results in a translatin f the system ples in the frequency dmain s that the lwest frequency ple lies at s=- and the higher frequency ple is lcated at -ρ where: P ρ = () P The time-scaled system will be referred t as the nrmalized system. The number f degrees f freedm that affect the settling time in the nrmalized system is ne less than that f the riginal system because the lwest frequency ple is always situated at s=-. Fig. 3 cntains a plt f the nrmalized settling time btained by simulatin fr values f ρ and h that are cmmnly encuntered in amplifier design. The nrmalized tables r equivalently, the nrmalized data in the plt f Fig. 3 can be used t determine the settling time f an arbitrary secnd-rder system with real ples simply by reading the crrect value ut f the table and denrmalizing the result. The fllwing eample illustrates the technique. Eample: Secnd-Order System with Real Ples Suppse we have an applicatin that requires settling t.% accuracy and a nd rder system with clsed-lp ples lcated at -8MHz and - MHz. Hw much time is required fr settling? Since P = MHz and P = 8 MHz P /P =.8 (3) The pint where the ple rati line f.8 intersects with the.% accuracy curve is apprimately. Thus is the nrmalized settling time. T find the actual settling time, the result must be denrmalized: T S = / P = µs (4) Nrmalized Settling Time: T s p 8 4 Ple Rati: p /p.. Fig. 3. Nrmalized settling time f a linear system cnsisting f tw real LHP ples Using the plt f Fig. 3, designers can gain sme understanding abut hw settling time is affected as the ple spacing varies. Pints n the y-ais (P /P =.) crrespnd t cases where the ples are cincident in the s-plane (critical damping). Fr these cases, the nrmalized settling time can be reasnably apprimated by the fllwing linear equatin: ( ). 54 T s =.54 lg h + (5) where h is the required settling accuracy (e.g.. fr.% settling). Pints further t the right in the plt represent increasing ple separatin. Fr a fied value f P, it is evident that settling time degrades as the ples are psitined clser tgether. It is als bserved that reasnably accurate estimates f the settling time can be achieved by apprimating a tw ple system with a single ple when the ple-rati eceeds a factr f apprimately. B. Secnd-Order System with Cmple LHP Ples Since nt all clsed-lp secnd-rder systems have real ples, ur study f settling time requires the cnsideratin f systems with cmple ples. A ple-zer map f a secndrder system with cmple LHP ples is cntained in Fig. 4. The angle t the ple is dented by θ. The same nrmalizatin technique that was used fr a system with tw real LHP ples can be used fr the cmple case. In this case thugh, the nrmalizatin factr is chsen t be ω p ζ which ensures that the ples lie n the line = -. The ple-angle, θ, is nt affected by scaling. Fig. 5 cntains a plt f the nrmalized settling time as a functin f θ fr settling accuracies cmmnly encuntered in amplifier design. Pints n the y-ais, (θ= ), crrespnd t critical damping. Pints further t the right crrespnd t increasingly under-damped respnses. Neglecting nnlinearities such as finite amplifier slew capability, it is interesting t bserve that the wrst-case settling is btained fr lw-q ples. Settling t a given accuracy level actually imprves as the ples initially mve away frm the real ais.

3 Nrmalized Settling Time: T s Re(P) ω ζ p ω p ς θ Fig. 4. Ple-zer map f a linear system with tw cmple LHP ples Increasing ple Q C B A θ, Angle t the clsed lp ples (degrees) Fig. 5. Nrmalized settling time f a linear system cnsisting f tw cmple LHP ples It is als interesting t bserve that as θ appraches 9, the settling time appraches a value that is equivalent t that f a system with a single ple lcated at s=-. The discntinuities, present in the curves (vertical segments in the plts) can be understd by cnsidering pints n each side f the discntinuity. Fr eample, cnsider pints A and B marked in the plt f Fig. 5. The crrespnding time-dmain step respnses are shwn in Fig.. Curve A crrespnds t a θ=9 while curve B crrespnds t an angle f A In Fig., the regin crrespnding t settling is shaded in gray. Ntice that curve B crsses the lwer bund f the settling regin at.35 sec. while curve A barely remains within the settling regin there. Thus curve A has a shrter settling time because it last crsses the bundary f the settling regin at.35 sec. Althugh these tw curves crrespnd t nearly equal θ's, there is a significant difference in their settling times. In fact, as θ is varied cntinusly between A and B, at sme pint there is a discntinuity in the settling time as the last pint in time that the step respnse wavefrm crsses the settling regin bundary switches frm the upper bundary t the lwer bundary and vice-versa. Using Fig. 5, designers can gain insight abut the sensitivity f a system's settling time t prcess, aging and envirnmental variatins. Cnsider a system that was intended t perate at pint C marked in Fig. 5. In the presence f variatins, the ples may be dislcated frm their desired psitins. As a cnsequence, the resultant angle t the ples might be slightly smaller r larger than desired. One can see frm the slpe f and the discntinuity present in the.% settling accuracy curve near pint C, that slight variatins in θ result in substantial increases in settling time. It is apparent frm the plt that systems with lw-q ples and thse with very high-q ples ehibit lwer sensitivities t variatins in the phase angle θ than systems with intermediate-q ples. Using Fig. 5, it is pssible t determine the settling time withut slving a nnlinear equatin simply by reading the apprpriate value ff f the plt and denrmalizing the result. T illustrate, cnsider the fllwing eample. Eample: Secnd-Order System with Cmple Ples As an eample, assume.% settling accuracy is required with clsed-lp ples lcated at ( 3 ± i ) Hz. Hw much time is required fr settling? The angle t the ples is given by: tan θ = = 3 3 The pint where the ple angle line f 3 intersects with the.% accuracy curve is apprimately 9.. Denrmalizing this value results in the actual settling time T S = 5.3µ s Re( P) 3 B T SA T SB t Fig. Illustratin used t eplain the discntinuus nature f the curves in Fig. 5 III. SECOND-ORDER SYSTEMS WITH A LHP ZERO In this sectin, the settling time fr an arbitrary asympttically stable secnd-rder system with a LHP zer is cnsidered. The cases f real and cmple ples will be cnsidered separately in Subsectins A and B respectively. Befre prceeding, sme terminlgy needs clarificatin. Fr many years in the integrated circuit design literature, the term dublet has been used t refer t a ple and zer that are spaced relatively clse t each ther with respect t the distance t the ther system ples and zers. This is

4 incnsistent with the terminlgy used in ther disciplines. In the current cntet, the term dublet is mre apprpriately used t dente tw clsely spaced ples r tw clsely spaced zers but nt a ple and zer that are clsely spaced. In ther disciplines and thrughut the rest f this paper, the term diple is used t dente a ple and zer that are clsely spaced. A. Systems with Real LHP Ples The ple-zer plt f a system with tw real LHP ples and a LHP zer is depicted in Fig. 7. Time Scale by /P -P -z -P -ρ -ζ - (a) Fig. 7. Ple-zer map f a linear system with tw real LHP ples and a LHP zer (a) riginal system (b) after time-nrmalizatin by scaling by /P The time-nrmalizatin technique that was used previusly t simplify the visualizatin f the relatinship between plezer placement and settling time is used here. In this case an additinal degree f freedm is intrduced due t the presence f the zer. Designating the lwer and higher frequency ples as P and P respectively and using a time-nrmalizatin factr f /P puts the nrmalized lwest frequency ple at s=-. The zer and the remaining ple are designated in the nrmalized system as ζ and ρ respectively where ζ = z / P and ρ = P / P. Fig. 8 cntains a plt f the settling time as a functin f ζ and ρ that was btained fr a settling accuracy requirement f.%. In an attempt t cver the pints cmmnly f interest t amplifier designers, ζ was varied frm E-4 t E while ρ was swept frm t E. The mst distinguishing feature f Fig. 8 is the sharp reductin in settling time fr systems with ζ's in the vicinity f.. Dramatic imprvements in settling time ccur in these cases due t the ple-zer cancellatin that ccurs as the zer passes ver the lw-frequency ple lcated at s=-. These cases will be eamined in mre detail later. The zer passes ver and cancels the higher frequency ple as well. The pints where this ccurs d nt stand ut n the plt because in thse cases the settling time is dminated by the lw-frequency ple's slw-settling cmpnent. Settling time diverges as ζ appraches zer. As a result, it is nt advantageus t psitin the zer at frequencies significantly lwer than that f the dminant ple. One can bserve that fr a fied value f P, settling time imprves as the ple spacing is widened. (b) Fig. 8. Nrmalized settling time as a functin f ρ=p /P and ζ=z/p fr a settling accuracy f.% Lw-frequency diples are cmmnly avided because they result in slw-settling cmpnents in the transient respnse [][3]. Depending upn the amunt f mismatch and the accuracy requirements f the applicatin, these slw-settling cmpnents may r may nt be significant. Thus, t determine hw much mismatch is allwable fr a given settling accuracy and speed requirement, a careful study f the sensitivity f settling time t ple-zer mismatch is warranted. In this regard, we will fcus ur attentin n the settling behavir in a regin arund where ζ=z/p =. Observe frm Fig. 8 that in the designated regin, the settling time depends upn ρ=p /P. There, the settling time imprves as the ple rati, ρ, increases. T mre clearly visualize the relatinship, the case where the ples are spaced clsely tgether is first cnsidered. Later the case f larger ple ratis is investigated. Fig. 9 cntains a plt f the settling time fr different settling accuracy requirements in the regin arund where the lw-frequency ple cancellatin ccurs fr cases where the ples are nearly cincident (ρ=.). Nrmalized Settling Time: Ts P Zer Lcatin Relative t Ple: z/p Fig. 9. Nrmalized settling time fr clsely spaced ples (p/p =.)

5 The 5 hrizntal dashed lines in Fig. 9 represent the settling times that result when eact cancellatin f the lw-frequency ples ccurs fr each f the different settling accuracy cases (i.e. the tpmst line crrespnds t the.% settling accuracy case, the net lwer line t.%, and s n). Cntrary t statements in [], it is bserved that settling time is nt minimized when eact cancellatin f the lw-frequency diple ccurs. Rather, the settling time is minimized when the zer is lcated at frequencies that are slightly lwer than the dminant ple. This bservatin indicates that if a methd fr accurately placing the zer relative t the ple culd be achieved, a system with a lwfrequency diple culd be built that settles faster than an equivalent system withut the diple. Fig. 9 depicts cases where the clsed-lp ples are nearly cincident in the s-plane, (ρ ). Infinitely many ther cases are pssible as well. Since all cases can nt be cnsidered here, it is instructive t cnsider a case with mre widely spaced ples. Fig. cntains a blw-up f the regin near where the lw-frequency ple cancellatin ccurs fr the case where ρ = P /P =. When cancellatin f the lw-frequency ple ccurs, the system effectively becmes a single-ple system with a settling time determined by the lcatin f the high-frequency ple. As a result, the larger the ple-rati becmes, the mre dramatic the imprvement in settling time becmes when the lw-frequency ple is cancelled. This fact is bservable by cmparing Fig. t Fig. 9. Fr eact lw-frequency ple-zer cancellatins, the settling times f the ρ= cases are each /'th f the ρ= cases. Unfrtunately, hwever, accmpanying the reductin in settling time fr lw-frequency ple-zer cancellatin due t larger ple ratis is an increased sensitivity t ple-zer mismatch. The sensitivity f settling time t ple-zer mismatch is a functin f the ple-rati and the required settling accuracy. As previusly mentined, by psitining the zer slightly belw the lw-frequency ple, the settling time fr a system with a lw-frequency diple can be better than that f an equivalent system withut the diple. T gauge the sensitivity t mismatch, ne can cnsider the maimum allwable percentage diple mismatch that results in settling perfrmance that is at least as gd as an equivalent system withut a diple. Fig. cntains a plt f such a sensitivity measure where diple mismatch was defined as: Z P % Z r in terms f the nrmalized system: () ζ % (7) ζ Nrmalized Settling Time: Ts P Maimum Diple Mismatch (%) Zer Lcatin Relative t Ple: z/p Fig.. Nrmalized settling time fr widely separated ples (p/p = ) Increasing ple separatin 3 3 ρ = P /P.. Fig.. Maimum allwable diple mismatch that results in a system that settles at least as fast as ne withut a diple Frm Fig., it is bserved that t achieve settling times that are as gd as an equivalent system withut the lw-frequency diple, the accuracy required in the ple-zer placement increases with required settling accuracy and ple-rati, ρ. Fr eample, cnsider a system with a ple-rati f in an applicatin that requires.% settling accuracy. The pint n the plt where the.% curve intersects the ρ= line is at %. This indicates that t ensure the settling time f the system will be at least as fast as an equivalent system withut a diple, ζ must lie between.99 and.. Fr higher settling accuracies r larger ple-ratis, the required precisin in ple-zer placement increases.

6 B. Systems with Cmple LHP Ples A ple-zer plt f the system with tw cmple LHP ples lcated at ω p( ζ ± ζ ) and a LHP zer lcated at s=-z is shwn in Fig. (a). Fig. 5 t a fied-η slice f Fig. 3 fr a large value f η. Given that fact, inspectin f Fig. 3 reveals that a tw-ple system with a LHP zer can settle faster than ne withut a zer. That is, if the LHP zer is psitined in the vicinity f η=, the presence f the zer can significantly reduce the settling time. Time Scale by /(ω p ζ) ω ζ p -z θ - -η θ ω p ς (a) (b) Fig.. Ple-zer plt f a linear system with tw cmple LHP ples and a LHP zer (a) riginal system (b) after time-nrmalizatin by scaling by /(ω p ζ) Fig. (b) shws the effect f time nrmalizatin by /(ω p ζ) n the ple and zer lcatins in the s-plane. After nrmalizatin, the real-parts f the ples lie at s=-. The angle t the ples, θ, is nt affected by the nrmalizatin. The pst-nrmalizatin lcatin f the zer is dented as -η where η<. Althugh the nrmalized settling time varies fr different settling accuracy requirements, it is instructive t eamine the relatinship fr a particular case with the knwledge that ther cases will have similar characteristics. Fig. 3 cntains a -d surface f the settling time as a functin f θ and η that was btained fr settling accuracy requirement f.%. In an attempt t cver the pints cmmnly f interest t amplifier designers, θ was varied frm. t while η was swept frm. t E. Assuming fied ple lcatins, the effect f the lcatin f the zer can be bserved by lking at fied-θ slices in Fig. 3. Accrdingly, settling time degradatin appears when the zer is lcated clser t the jω-ais than the ples with the initial degradatin nset ccurring when the zer and ples are nearly equidistant frm the jω-ais and increasing as the zer mves tward the jω-ais. Cnversely, it is als bserved that the settling time is largely independent f the zer lcatin when the zer is situated at distances that are at least ten times larger than the separatin between the ples and the jω-ais. Therefre, in applicatins where settling time is imprtant, systems with zers clser t the jω-ais than the ples shuld be avided and systems with zers lcated mre than ten times farther frm the jω-ais than the ples can be apprimated as all-ple systems. The effect f varying ple-q can be eamined by lking at fied-η slices f Fig. 3. Frm the plt it is bserved that varying the angle t the ples, θ, dramatically affects settling time. As epected, in the limit as η appraches infinity the settling respnse f the tw-ple system with a zer asympttically appraches the respnse f ne withut a zer. This can be bserved by cmparing the.% curve in Fig. 3. Nrmalized settling time as a functin f θ and η=z/(ω p ζ) CONCLUSION Due t the fact that a nnlinear equatin has t be slved t determine the settling time f a linear time-invariant system, the relatinship between settling time and the ple and zer lcatins is nt readily apparent. Settling characteristics f nrmalized secnd-rder systems were eamined t prvide a cmprehensive graphical relatinship between the ple and zer lcatins and the settling time. REFERENCES [] F.D. Waldhauer, "Analg Integrated Circuits f Large Bandwidth," in 93 IEEE Cnv. Rec., Part, pp. -7 [] B.Y. Kamath, R.G. Meyer, and P.R. Gray, Relatinship Between Frequency Respnse and Settling Time f Operatinal Amplifiers, IEEE J. Slid-State Circuits, vl. SC-9, pp , Dec [3] P.R. Gray and R.G. Meyer, "Recent Advances in Mnlithic Operatinal Amplifier Design," IEEE Trans. Circuits Syst., vl. CAS-, pp , May 974.