8-channel analog multiplexer/demultiplexer

Transcription

1 Rev ugust 2009 Product data sheet 1. General description 2. Features The is an with three digital select inputs (S0 to S2), an active-low enable input (), eight independent inputs/outputs (Y0 to Y7) and a common input/output (). It is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC4051 and 74HCT4051. With LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. and GND are the supply voltage pins for the digital control inputs (S0 to S2, and ). The to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and ) can swing between as a positive limit and V as a negative limit. V may not exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, V is connected to GND (typically ground). Optimized for low-voltage applications: 1.0 V to 6.0 V ccepts TTL input levels between = 2.7 V and = 3.6 V Low ON resistance: 145 Ω (typical) at V = 2.0 V 80 Ω (typical) at V = 3.0 V 60 Ω (typical) at V = 4.5 V Logic level translation: To enable 3 V logic to communicate with ±3 V analog signals Typical break before make built in SD protection: HBM JSD exceeds 2000 V MM JSD exceeds 200 V Multiple package options Specified from 40 C to+85 C and from 40 C to +125 C

2 3. Ordering information Table 1. Type number Ordering information Package Temperature range Name Description Version N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 D 40 C to +125 C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; SOT338-1 body width 5.3 mm PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body mm SOT Functional diagram Y0 S Y1 15 Y2 S Y3 LOGIC LVL CONVRSION 1-OF-8 DCODR 1 Y4 S2 9 5 Y5 2 Y6 6 4 Y GND V 001aad543 Fig 1. Functional diagram _4 Product data sheet Rev ugust of 26

3 X Y0 6 G8 S0 S1 S Y Y2 12 Y3 1 Y4 5 Y5 2 Y6 4 Y7 001aad541 3 MUX/DMUX aad Fig 2. Logic symbol Fig 3. IC logic symbol Y V V from logic V 001aad544 Fig 4. Schematic diagram (one switch) _4 Product data sheet Rev ugust of 26

4 5. Pinning information 5.1 Pinning Y4 Y6 Y Y2 Y1 Y0 Y4 Y Y2 terminal 1 index area Y6 Y7 Y4 VCC Y2 Y1 Y0 Y5 V GND Y3 S0 S1 S2 Y7 Y5 V GND Y1 Y0 Y3 S0 S1 S2 Y5 V V (1) 11 CC 7 10 GND S2 8 9 Y3 S0 S1 001aak aak aak407 Transparent top view Fig 5. Pin configuration SOT38-4 and SOT109-1 Fig 6. Pin configuration SOT338-1 and SOT403-1 Fig 7. Pin configuration for SOT Pin description Table 2. Pin description Symbol Pin Description 6 enable input (active LOW) V 7 supply voltage GND 8 ground supply voltage S0, S1, S2 11, 10, 9 select input Y0, Y1, Y2, Y3, Y4, Y5, Y6, Y7 13, 14, 15, 12, 1, 5, 2, 4 independent input or output 3 common output or input 16 supply voltage _4 Product data sheet Rev ugust of 26

5 6. Functional description 7. Limiting values 6.1 Function table Table 3. Function table [1] Input Channel ON S2 S1 S0 L L L L Y0 to L L L H Y1 to L L H L Y2 to L L H H Y3 to L H L L Y4 to L H L H Y5 to L H H L Y6 to L H H H Y7 to H X X X switches off [1] H = HIGH voltage level; L = LOW voltage level; X = don t care. Table 4. Limiting values In accordance with the bsolute Maximum Rating System (IC 60134). Voltages are referenced to V SS = 0 V (ground). Symbol Parameter Conditions Min Max Unit supply voltage [1] V I IK input clamping current V I < 0.5 V or V I > V [2] - ±20 m I SK switch clamping current V SW < 0.5 V or V SW > V [2] - ±20 m I SW switch current V SW > 0.5VorV SW < V; [2] - ±25 m source or sink current T stg storage temperature C P tot total power dissipation T amb = 40 C to +125 C [3] DIP16 package mw SO16 package mw TSSOP16 package mw DHVQFN16 package mw [1] To avoid drawing current out of terminal, when switch current flows into terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal, no current will flow out of terminals Yn, and in this case there is no limit for the voltage drop across the switch, but the voltages at Yn and may not exceed or V. [2] The minimum input voltage rating may be exceeded if the input current rating is observed. [3] For DIP16 packages: above 70 C the value of P tot derates linearly with 12 mw/k. For SO16 packages: above 70 C the value of P tot derates linearly with 8 mw/k. For SSOP16 and TSSOP16 packages: above 60 C the value of P tot derates linearly with 5.5 mw/k. For DHVQFN16 packages: above 60 C the value of P tot derates linearly with 4.5 mw/k. _4 Product data sheet Rev ugust of 26

6 8. Recommended operating conditions Table 5. Recommended operating conditions [1] Symbol Parameter Conditions Min Typ Max Unit supply voltage see Figure V V I input voltage 0 - V V SW switch voltage 0 - V T amb ambient temperature in free air C t/ V input transition rise and fall rate = 1.0 V to 2.0 V ns/v = 2.0 V to 2.7 V ns/v = 2.7 V to 3.6 V ns/v [1] The static characteristics are guaranteed from = 1.2 V to 6.0 V, but LV devices are guaranteed to function down to = 1.0 V (with input levels GND or ) aak344 - GND (V) operating area V (V) Fig 8. Guaranteed operating area as a function of the supply voltages _4 Product data sheet Rev ugust of 26

7 9. Static characteristics Table 6. Static characteristics t recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max V IH HIGH-level input voltage = 1.2 V V = 2.0 V V = 2.7 V to 3.6 V V = 4.5 V V = 6.0 V V V IL LOW-level input voltage = 1.2 V V = 2.0 V V = 2.7 V to 3.6 V V = 4.5 V V = 6.0 V V I I input leakage current V I = or GND = 3.6 V µ = 6.0 V µ I S(OFF) OFF-state leakage current V I = V IH or V IL ; see Figure 9 = 3.6 V µ = 6.0 V µ I S(ON) ON-state leakage current V I = V IH or V IL ; see Figure 10 = 3.6 V µ = 6.0 V µ I CC supply current V I = or GND; I O = 0 = 3.6 V µ = 6.0 V µ I CC additional supply current per input; V I = 0.6 V; µ = 2.7 V to 3.6 V C I input capacitance pf C sw switch capacitance independent pins Yn pf common pin pf [1] Typical values are measured at T amb = 25 C. _4 Product data sheet Rev ugust of 26

8 9.1 Test circuits V IH or V IL I S S0 to S2 Yn GND = V I S V IH or V IL GND S0 to S2 Yn GND = V I S VO VI VI VO 001aak aak410 Fig 9. V I = or V and V O = V or. Test circuit for measuring OFF-state leakage current V I = or V and V O = open circuit. Fig 10. Test circuit for measuring ON-state leakage current 9.2 ON resistance Table 7. ON resistance t recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 11 and Figure 12. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit R ON(peak) ON resistance (peak) V I = 0 V to V R ON ON resistance mismatch between channels Min Typ [1] Max Min Max = 1.2 V; I SW = 100 µ [2] Ω = 2.0 V; I SW = 1000 µ Ω = 2.7 V; I SW = 1000 µ Ω = 3.0 V to 3.6 V; Ω I SW = 1000 µ = 4.5 V; I SW = 1000 µ Ω = 6.0 V; I SW = 1000 µ Ω V I = 0 V to V = 1.2 V; I SW = 100 µ [2] Ω = 2.0 V; I SW = 1000 µ Ω = 2.7 V; I SW = 1000 µ Ω = 3.0 V to 3.6 V; Ω I SW = 1000 µ = 4.5 V; I SW = 1000 µ Ω = 6.0 V; I SW = 1000 µ Ω _4 Product data sheet Rev ugust of 26

9 Table 7. ON resistance continued t recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 11 and Figure 12. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max R ON(rail) ON resistance (rail) V I = GND = 1.2 V; I SW = 100 µ [2] Ω = 2.0 V; I SW = 1000 µ Ω = 2.7 V; I SW = 1000 µ Ω = 3.0 V to 3.6 V; Ω I SW = 1000 µ = 4.5 V; I SW = 1000 µ Ω = 6.0 V; I SW = 1000 µ Ω R ON(rail) ON resistance (rail) V I = V = 1.2 V; I SW = 100 µ [2] Ω = 2.0 V; I SW = 1000 µ Ω = 2.7 V; I SW = 1000 µ Ω = 3.0 V to 3.6 V; Ω I SW = 1000 µ = 4.5 V; I SW = 1000 µ Ω = 6.0 V; I SW = 1000 µ Ω [1] Typical values are measured at T amb =25 C. [2] When supply voltages ( V ) near 1.2 V the analog switch ON resistance becomes extremely non-linear. When using a supply of 1.2 V, it is recommended to use these devices only for transmitting digital signals. _4 Product data sheet Rev ugust of 26

10 9.3 On resistance waveform and test circuit V VSW V IH or V IL GND S0 to S2 Yn GND = V ISW VI 001aak411 Fig 11. R ON =V SW /I SW. Test circuit for measuring R ON aak412 R ON (Ω) = 2.0 V 120 = 3.0 V 60 = 4.5 V V I (V) Fig 12. V i = 0 V to V Typical R ON as a function of input voltage _4 Product data sheet Rev ugust of 26

11 10. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 15. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max t pd propagation delay Yn to, to Yn; see Figure 13 [2] = 1.2 V ns = 2.0 V ns = 2.7 V ns = 3.0 V to 3.6 V [3] ns = 4.5 V ns = 6.0 V ns t en enable time to Yn, ; see Figure 14 [2] = 1.2 V ns = 2.0 V ns = 2.7 V ns = 3.0 V to 3.6 V; C L =15pF [3] ns = 3.0 V to 3.6 V [3] ns = 4.5 V ns = 6.0 V ns Sn to Yn; see Figure 14 [2] = 1.2 V ns = 2.0 V ns = 2.7 V ns = 3.0 V to 3.6 V; C L =15pF [3] ns = 3.0 V to 3.6 V [3] ns = 4.5 V ns = 6.0 V ns _4 Product data sheet Rev ugust of 26

12 Table 8. Dynamic characteristics continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 15. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit t dis disable time to Yn, ; see Figure 14 [2] C PD power dissipation capacitance = 1.2 V ns = 2.0 V ns = 2.7 V ns = 3.0 V to 3.6 V; C L =15pF [3] ns = 3.0 V to 3.6 V [3] ns = 4.5 V ns = 6.0 V ns Sn to Yn; see Figure 14 [2] = 1.2 V ns = 2.0 V ns = 2.7 V ns = 3.0 V to 3.6 V; C L =15pF [3] ns = 3.0 V to 3.6 V [3] ns = 4.5 V ns = 6.0 V ns C L = 50 pf; f i = 1 MHz; [4] pf V I = GND to [1] ll typical values are measured at T amb =25 C. [2] t pd is the same as t PLH and t PHL. t en is the same as t PL and t PH. t dis is the same as t PL and t PH. [3] Typical values are measured at nominal supply voltage ( = 3.3 V). [4] C PD is used to determine the dynamic power dissipation (P D in µw). P D =C PD V 2 CC f i N+Σ((C L + C SW ) V 2 CC f o ) where: f i = input frequency in MHz, f o = output frequency in MHz C L = output load capacitance in pf C SW = maximum switch capacitance in pf; = supply voltage in Volts N = number of inputs switching Σ(C L V 2 CC f o ) = sum of the outputs. Min Typ [1] Max Min Max _4 Product data sheet Rev ugust of 26

13 10.1 Waveforms Yn or input V V M t PLH t PHL V O or Yn output V M V 001aak418 Fig 13. Measurement points are given in Table 9. V OL and V OH are typical voltage output levels that occur with the output load. Propagation delay input (n) to output (Yn) Sn, input V M V SS t PL t PL Yn or output LOW-to-OFF OFF-to-LOW V O V 10 % 90 % t PH t PH Yn or output HIGH-to-OFF OFF-to-HIGH V O V 90 % 10 % switch ON switch OFF switch ON 001aak419 Fig 14. Measurement points are given in Table 9. V OL and V OH are typical voltage output levels that occur with the output load. nable and disable times Table 9. Measurement points Supply voltage Input Output V M V M V X V Y < 2.7 V V OL V OH V to 3.6 V 1.5 V 1.5 V V OL V V OH 0.3 V > 3.6 V V OL V OH 0.1 _4 Product data sheet Rev ugust of 26

14 V I negative pulse 0 V 90 % V M 10 % t W V M t f t r t r t f V I positive pulse 0 V 10 % 90 % V M t W V M V XT G V I DUT V O RL RT V CL RL 001aak353 Fig 15. Test data is given in Table 10. Definitions for test circuit: R L = Load resistance. C L = Load capacitance including jig and probe capacitance. R T = Termination resistance should be equal to output impedance o of the pulse generator. V XT = xternal voltage for measuring switching times. Test circuit for measuring switching times Table 10. Test data Supply voltage Input Load V XT V I t r, t f C L R L t PHL, t PLH t PH, t PH t PL, t PL < 2.7 V 6 ns 50 pf 1 kω open V V to 3.6 V 2.7 V 6 ns 15 pf, 50 pf 1 kω open V 2 > 3.6 V 6 ns 50 pf 1 kω open V 2 _4 Product data sheet Rev ugust of 26

15 10.2 dditional dynamic parameters Table 11. dditional dynamic characteristics t recommended operating conditions; voltages are referenced to GND (ground = 0 V); V I = GND or (unless otherwise specified); t r = t f 6.0 ns; T amb = 25 C. Symbol Parameter Conditions Min Typ Max Unit THD total harmonic distortion f i = 1 khz; C L = 50 pf; R L =10kΩ; see Figure 20 = 3.0 V; V I = 2.75 V (p-p) % = 6.0 V; V I = 5.5 V (p-p) % f i = 10 khz; C L = 50 pf; R L =10kΩ; see Figure 20 = 3.0 V; V I = 2.75 V (p-p) % = 6.0 V; V I = 5.5 V (p-p) % f ( 3dB) 3 db frequency C L = 50 pf; R L =50Ω; see Figure 16 [1] response = 3.0 V MHz = 6.0 V MHz α iso isolation (OFF-state) f i = 1 MHz; C L = 50 pf; R L = 600 Ω; see Figure 18 [2] = 3.0 V db = 6.0 V db V ct crosstalk voltage between digital inputs and switch; f i = 1 MHz; C L = 50 pf; R L = 600 Ω; see Figure 21 [2] = 3.0 V V = 6.0 V V Xtalk crosstalk between switches; f i = 1 MHz; C L = 50 pf; R L = 600 Ω; see Figure 22 = 3.0 V db = 6.0 V db [1] djust f i voltage to obtain 0 dbm level at output for 1 MHz (0 dbm = 1 mw into 50 Ω). [2] djust f i voltage to obtain 0 dbm level at output for 1 MHz (0 dbm = 1 mw into 600 Ω). _4 Product data sheet Rev ugust of 26

16 Test circuits 5 001aak361 (db) V IH or V IL S0 to S2 0 Yn GND 0.1 µf GND = V CL db fi 001aak f (khz) = 3.0 V; GND = 0 V; V = 3.0 V; R L =50Ω; R SOURC =1kΩ. Fig 16. Test circuit for measuring frequency response Fig 17. Typical frequency response 0 001aak360 (db) V IH or V IL S0 to S2 50 Yn 0.1 µf GND = V CL db fi 001aak f (khz) = 3.0 V; GND = 0 V; V = 3.0 V; R L =50Ω; R SOURC =1kΩ. Fig 18. Test circuit for measuring isolation (OFF-state) Fig 19. Typical isolation (OFF-state) as function of frequency _4 Product data sheet Rev ugust of 26

17 V IH or V IL S0 to S2 Yn GND 10 µf GND = V CL D fi 001aak422 Fig 20. Test circuit for measuring total harmonic distortion S0 to S2 Yn G V IH or V IL GND = V CL V VO 001aak423 a. Test circuit logic input (Sn, ) off on off V O V ct 001aaj908 b. Input and output pulse definitions V I may be connected to Sn or. Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch _4 Product data sheet Rev ugust of 26

18 V IH or V IL RL S0 to S2 Y0 Yn GND 0.1 µf GND = V VO CL db VI 001aak434 a. Switch closed condition V IH or V IL S0 to S2 Y0 Yn GND GND = V RL VI VO CL db 001aak435 b. Switch open condition Fig 22. Test circuit for measuring crosstalk between switches _4 Product data sheet Rev ugust of 26

19 11. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 D M seating plane 2 L 1 16 e b b 1 9 b 2 w M c (e ) 1 M H pin 1 index mm scale DIMNSIONS (inch dimensions are derived from the original mm dimensions) UNIT 1 2 (1) (1) (1) max. b 1 b 2 c D e L M min. max. b e 1 M H w max mm inches Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included OUTLIN VRSION RFRNCS IC JDC JIT UROPN PROJCTION ISSU DT SOT Fig 23. Package outline SOT38-4 (DIP16) _4 Product data sheet Rev ugust of 26

20 SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D X c y H v M 16 9 Q 2 1 ( ) 3 pin 1 index θ L p 1 8 L e b p w M detail X mm scale DIMNSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches max b p c D (1) (1) e H (1) L L p Q v w y Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included θ o 8 o OUTLIN VRSION RFRNCS IC JDC JIT UROPN PROJCTION ISSU DT SOT MS Fig 24. Package outline SOT109-1 (SO16) _4 Product data sheet Rev ugust of 26

21 SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 D X c y H v M 16 9 Q 2 1 ( ) 3 pin 1 index 1 8 L detail X L p θ e b p w M mm scale DIMNSIONS (mm are the original dimensions) UNIT b p c D (1) (1) e H L L p Q v w y (1) max. mm θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT UROPN PROJCTION ISSU DT SOT338-1 MO Fig 25. Package outline SOT338-1 (SSOP16) _4 Product data sheet Rev ugust of 26

22 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D X c y H v M 16 9 pin 1 index 2 1 Q ( ) 3 θ 1 8 e b p w M L detail X L p mm scale DIMNSIONS (mm are the original dimensions) UNIT b p c D (1) (2) e H (1) L L p Q v w y max. mm θ o 8 o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT SOT403-1 MO-153 UROPN PROJCTION ISSU DT Fig 26. Package outline SOT403-1 (TSSOP16) _4 Product data sheet Rev ugust of 26

23 DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm SOT763-1 D B 1 c terminal 1 index area detail X terminal 1 index area e 1 e b 2 7 v M w M C C B y 1 C C y L 1 8 h e D h X mm scale DIMNSIONS (mm are the original dimensions) UNIT (1) max. 1 b c D (1) D h (1) h e e 1 L v w y y 1 mm Note 1. Plastic or metal protrusions of mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT SOT MO UROPN PROJCTION ISSU DT Fig 27. Package outline SOT763-1 (DHVQFN16) _4 Product data sheet Rev ugust of 26

24 12. bbreviations Table 12. cronym CMOS SD HBM MM TTL bbreviations Description Complementary Metal-Oxide Semiconductor lectrostatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 13. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes _ Product data sheet - _3 Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. dded type number BQ (DHVQFN16 package) _ Product specification - _2 _ Product specification - _1 _4 Product data sheet Rev ugust of 26

25 14. Legal information 14.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail Disclaimers General Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. pplications pplications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. xposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. xport control This document as well as the item(s) described herein may be subject to export control regulations. xport might require a prior authorization from national authorities Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com _4 Product data sheet Rev ugust of 26

26 16. Contents 1 General description Features Ordering information Functional diagram Pinning information Pinning Pin description Functional description Function table Limiting values Recommended operating conditions Static characteristics Test circuits ON resistance On resistance waveform and test circuit Dynamic characteristics Waveforms dditional dynamic parameters Test circuits Package outline bbreviations Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com Date of release: 10 ugust 2009 Document identifier: _4

27 Mouser lectronics uthorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: NXP: D D-T DB DB-T N PW BQ,115 D,112 DB,112 DB,118 D,118 N,112 PW,112 PW,118 D/UJ PW/UJ