8-channel analog multiplexer/demultiplexer with injection-current effect control

Transcription

1 8-channel analog multiplexer/demultiplexer with injection-current effect control Rev March 2007 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is specified in compliance with JDC standard no. 7. The is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-low enable input (), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). The device features injection-current effect control, which has excellent value in automotive applications where voltages in excess of the supply voltage are common. With LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. The injection-current effect control allows signals at disabled analog input channels to exceed the supply voltage without affecting the signal of the enabled analog channel. This eliminates the need for external diode/resistor networks typically used to keep the analog channel signals within the supply-voltage range. Injection-current cross coupling < 1 mv/m Wide supply voltage range from 2.0 V to 6.0 V SD protection: HBM JSD22-114D Class 2. xceeds 2000 V MM JSD exceeds 200 V CDM JSD22-C101C exceeds 1000 V Latch-up performance exceeds 100 m per JSD 78 Class II Low ON-state resistance: 400 Ω (typical) at V CC = 2.0 V 215 Ω (typical) at V CC = 3.0 V 120 Ω (typical) at V CC = 3.3 V 76 Ω (typical) at V CC = 4.5 V 59 Ω (typical) at V CC = 6.0 V

2 3. pplications nalog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating utomotive application 4. Ordering information Table 1. Type number Ordering information Package Temperature range Name Description Version D 40 C to +125 C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body mm SOT Functional diagram X G8 13 Y0 S0 S1 S Z Y Y2 12 Y3 1 Y4 5 Y5 2 Y6 4 Y7 001aad541 3 MUX/DMUX aad Fig 1. Logic symbol Fig 2. IC logic symbol _1 Product data sheet Rev March of 20

3 V CC 16 INJCTION CURRNT CONTROL 13 Y0 S0 11 INJCTION CURRNT CONTROL 14 Y1 INJCTION CURRNT CONTROL 15 Y2 S1 10 INJCTION CURRNT CONTROL 12 Y3 1-OF-8 DCODR INJCTION CURRNT CONTROL 1 Y4 S2 9 INJCTION CURRNT CONTROL 5 Y5 INJCTION CURRNT CONTROL 2 Y6 6 INJCTION CURRNT CONTROL 4 Y7 INJCTION CURRNT CONTROL 3 Z 8 001aaf875 GND Fig 3. Functional diagram _1 Product data sheet Rev March of 20

4 6. Pinning information 6.1 Pinning Y4 Y6 Z V CC Y2 Y1 terminal 1 index area Y6 Z Y4 1 VCC Y2 Y1 Y Y0 Y Y0 Y Y3 S0 Y5 n.c GND (1) Y3 S0 S1 n.c S1 8 9 GND 8 9 S2 GND S2 001aaf aaf876 Transparent top view (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO16 and TSSOP16 Fig 5. Pin configuration DHVQFN Pin description Table 2. Pin description Symbol Pin Description Y4 1 independent input/output Y4 Y6 2 independent input/output Y6 Z 3 common input/output Z Y7 4 independent input/output Y7 Y5 5 independent input/output Y5 6 enable input (active LOW) n.c. 7 not connected GND 8 ground (0 V) S2 9 select input S2 S1 10 select input S1 S0 11 select input S0 Y3 12 independent input/output Y3 Y0 13 independent input/output Y0 Y1 14 independent input/output Y1 Y2 15 independent input/output Y2 V CC 16 positive supply voltage _1 Product data sheet Rev March of 20

5 7. Functional description Table 3. Function table [1] Input Channel ON S2 S1 S0 L L L L Y0 to Z L L L H Y1 to Z L L H L Y2 to Z L L H H Y3 to Z L H L L Y4 to Z L H L H Y5 to Z L H H L Y6 to Z L H H H Y7 to Z H X X X - [1] H = HIGH voltage level; L = LOW voltage level; X = don t care. 8. Limiting values Table 4. Limiting values In accordance with the bsolute Maximum Rating System (IC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply voltage V V I input voltage 0.5 V CC V V SW switch voltage enable and disable mode 0.5 V CC V I IK input clamping current V I < 0 V or V I >V CC - ±20 m I SK switch clamping current V I < 0 V or V I >V CC - ±20 m I SW switch current V SW = 0 V to V CC - ±25 m I CC supply current - 50 m I GND ground current 50 - m T stg storage temperature C P tot total power dissipation T amb = 40 C to +125 C [1] mw [1] For SO16 package: P tot derates linearly with 8 mw/k above 70 C. For TSSOP16 package: P tot derates linearly with 5.5 mw/k above 60 C. For DHVQFN16 packages: P tot derates linearly with 4.5 mw/k above 60 C. _1 Product data sheet Rev March of 20

6 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit V CC supply voltage V V I input voltage 0 - V CC V V SW switch voltage 0 - V CC V T amb ambient temperature C t/ V input transition rise and fall rate V CC = 2.0 V ns/v V CC = 3.0 V ns/v V CC = 3.3 V ns/v V CC = 4.5 V ns/v V CC = 6.0 V ns/v 10. Static characteristics Table 6. R ON resistance For test circuit see Figure 8. Symbol Parameter Conditions Min Typ Max Unit T amb = 25 C R ON(peak) ON resistance (peak) V I = V CC to GND; = V IL V CC = 2.0 V; I SW = 2 m Ω V CC = 3.0 V; I SW 2 m Ω V CC = 3.3 V; I SW 2 m Ω V CC = 4.5 V; I SW 2 m Ω V CC = 6.0 V; I SW 2 m Ω R ON ON resistance mismatch between V I = 0.5 V CC ; = V IL channels V CC = 2.0 V; I SW = 2 m Ω V CC = 3.0 V; I SW 2m Ω V CC = 3.3 V; I SW 2m Ω V CC = 4.5 V; I SW 2m Ω V CC = 6.0 V; I SW 2m Ω T amb = 40 C to +85 C R ON(peak) ON resistance (peak) V I = V CC to GND; = V IL V CC = 2.0 V; I SW = 2 m Ω V CC = 3.0 V; I SW 2 m Ω V CC = 3.3 V; I SW 2 m Ω V CC = 4.5 V; I SW 2 m Ω V CC = 6.0 V; I SW 2 m Ω _1 Product data sheet Rev March of 20

7 Table 6. R ON resistance continued For test circuit see Figure 8. Symbol Parameter Conditions Min Typ Max Unit R ON ON resistance mismatch between channels V I = 0.5 V CC ; = V IL V CC = 2.0 V; I SW = 2 m Ω V CC = 3.0 V; I SW 2m Ω V CC = 3.3 V; I SW 2m Ω V CC = 4.5 V; I SW 2m Ω V CC = 6.0 V; I SW 2m Ω T amb = 40 C to +125 C R ON(peak) ON resistance (peak) V I = V CC to GND; = V IL V CC = 2.0 V; I SW = 2 m Ω V CC = 3.0 V; I SW 2 m Ω V CC = 3.3 V; I SW 2 m Ω V CC = 4.5 V; I SW 2 m Ω V CC = 6.0 V; I SW 2 m Ω R ON ON resistance mismatch between channels V I = 0.5 V CC ; = V IL V CC = 2.0 V; I SW = 2 m Ω V CC = 3.0 V; I SW 2m Ω V CC = 3.3 V; I SW 2m Ω V CC = 4.5 V; I SW 2m Ω V CC = 6.0 V; I SW 2m Ω Table 7. Injection current coupling For test circuit see Figure 9. Symbol Parameter Conditions Min Typ [1] Max Unit T amb = 40 C to +125 C V O output voltage I SW 1 m; R S 3.9 kω [2][3] variation V CC = 3.3 V mv V CC = 5.0 V mv I SW 10 m; R S 3.9 kω V CC = 3.3 V mv V CC = 5.0 V mv I SW 1 m; R S 20 kω V CC = 3.3 V mv V CC = 5.0 V mv I SW 10 m; R S 20 kω V CC = 3.3 V mv V CC = 5.0 V mv [1] Typical values are measured at T amb =25 C. [2] V O here is the maximum variation of output voltage of an enabled analog channel when current is injected into any disabled channel. [3] I SW = total current injected into all disabled channels. _1 Product data sheet Rev March of 20

8 Table 8. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit T amb = 25 C V IH HIGH-level input voltage control inputs V CC = 2.0 V V V CC = 3.0 V V V CC = 3.3 V V V CC = 4.5 V V V CC = 6.0 V V V IL LOW-level input voltage control inputs V CC = 2.0 V V V CC = 3.0 V V V CC = 3.3 V V V CC = 4.5 V V V CC = 6.0 V V I I input leakage current control inputs; V I = GND or V CC V CC = 6.0 V - - ±0.1 µ I S(OFF) OFF-state leakage current = V IH ; V I = GND or V CC ; V O =V CC or GND; V CC = 6.0 V; see Figure 6 per channel - - ±0.1 µ all channels - - ±0.2 µ I S(ON) ON-state leakage current = V IL ; V I = GND or V CC ; V O =V CC or GND; V CC = 6.0 V; see Figure ±0.1 µ I CC supply current V I = GND or V CC V CC = 6.0 V µ C I input capacitance S0, S1, S2 and pf C sw switch capacitance Z; OFF-state pf Yn; OFF-state pf T amb = 40 C to +85 C V IH HIGH-level input voltage control inputs V CC = 2.0 V V V CC = 3.0 V V V CC = 3.3 V V V CC = 4.5 V V V CC = 6.0 V V V IL LOW-level input voltage control inputs V CC = 2.0 V V V CC = 3.0 V V V CC = 3.3 V V V CC = 4.5 V V V CC = 6.0 V V _1 Product data sheet Rev March of 20

9 Table 8. Static characteristics continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit I I input leakage current control inputs; V I = GND or V CC V CC = 6.0 V - - ±0.1 µ I S(OFF) OFF-state leakage current = V IH ; V I = GND or V CC ; V O =V CC or GND; V CC = 6.0 V; see Figure 6 per channel - - ±0.5 µ all channels - - ±2.0 µ I S(ON) ON-state leakage current = V IL ; V I = GND or V CC ; V O =V CC or GND; V CC = 6.0 V; see Figure ±2.0 µ I CC supply current V I = GND or V CC V CC = 6.0 V µ C I input capacitance S0, S1, S2 and pf C sw switch capacitance Z; OFF-state pf Yn; OFF-state pf T amb = 40 C to +125 C V IH HIGH-level input voltage control inputs V CC = 2.0 V V V CC = 3.0 V V V CC = 3.3 V V V CC = 4.5 V V V CC = 6.0 V V V IL LOW-level input voltage control inputs V CC = 2.0 V V V CC = 3.0 V V V CC = 3.3 V V V CC = 4.5 V V V CC = 6.0 V V I I input leakage current control inputs; V I = GND or V CC V CC = 6.0 V - - ±1.0 µ I S(OFF) OFF-state leakage current = V IH ; V I = GND or V CC ; V O =V CC or GND; V CC = 6.0 V; see Figure 6 per channel - - ±2.0 µ all channels - - ±10.0 µ I S(ON) ON-state leakage current = V IL ; V I = GND or V CC ; V O =V CC or GND; V CC = 6.0 V; see Figure ±10.0 µ I CC supply current V I = GND or V CC V CC = 6.0 V µ _1 Product data sheet Rev March of 20

10 Table 8. Static characteristics continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit C I input capacitance S0, S1, S2 and pf C sw switch capacitance Z; OFF-state pf Yn; OFF-state pf IS Yn V CC selected channel (1) VI V IH V CC IS IS Yn Z VI GND VO V IL VO Yn any disabled channel GND Z n.c. 001aaf aaf879 (1) Channel is selected by S0, S1 and S2. Fig 6. Test circuit for measuring OFF-state leakage current Fig 7. Test circuit for measuring ON-state leakage current V I (1) Yn V CC any disabled channel VSW ISW V Z V IL V CC Yn Z VI GND ISW V IL V I (2) RS VI Yn selected channel (1) GND V VO 001aaf aaf881 R ON = V SW / I SW. (1) Channel is selected by S0, S1 and S2. V I (1) < GND or V I (1) > V CC. GND < V I (2) < V CC. Fig 8. Test circuit for measuring ON resistance Fig 9. Test circuit for injection current coupling _1 Product data sheet Rev March of 20

11 11. Dynamic characteristics Table 9. Dynamic characteristics GND = 0 V; C L = 50 pf; R L = 10 KΩ unless specified otherwise; for test circuit see Figure 12. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max V CC = 2.0 V t pd propagation delay see Figure 10 [1] Z, Yn to Yn, Z ns Sn to Z, Yn ns t en enable time see Figure 11 [2] to Z, Yn ns t dis disable time see Figure 11 [3] to Z, Yn ns V CC = 3.0 V t pd propagation delay see Figure 10 [1] Z, Yn to Yn, Z ns Sn to Z, Yn ns t en enable time see Figure 11 [2] to Z, Yn ns t dis disable time see Figure 11 [3] to Z, Yn ns V CC = 3.3 V t pd propagation delay see Figure 10 [1] Z, Yn to Yn, Z ns Sn to Z, Yn ns t en enable time see Figure 11 [2] to Z, Yn ns t dis disable time see Figure 11 [3] to Z, Yn ns V CC = 4.5 V t pd propagation delay see Figure 10 [1] Z, Yn to Yn, Z ns Sn to Z, Yn ns t en enable time see Figure 11 [2] to Z, Yn ns t dis disable time see Figure 11 [3] to Z, Yn ns _1 Product data sheet Rev March of 20

12 Table 9. Dynamic characteristics continued GND = 0 V; C L = 50 pf; R L = 10 KΩ unless specified otherwise; for test circuit see Figure 12. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max V CC = 6.0 V t pd propagation delay see Figure 10 [1] Z, Yn to Yn, Z ns Sn to Z, Yn ns t en enable time see Figure 11 [2] toz,yn ns t dis disable time see Figure 11 [3] toz,yn ns Power dissipation capacitance C PD power dissipation per channel [4] capacitance V CC = 3.3 V pf V CC = 5.0 V pf [1] t pd is the same as t PLH and t PHL. [2] t en is the same as t PZH and t PZL. [3] t dis is the same as t PLZ and t PHZ. [4] C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V 2 CC f i + {(C L +C sw ) V 2 CC f o } where: f i = input frequency in MHz; f o = output frequency in MHz; {(C L +C sw ) V 2 CC f o } = sum of outputs; C L = output load capacitance in pf; C sw = switch capacitance in pf; V CC = supply voltage in V. 12. Waveforms V I Z, Yn or SN input GND t PLH t PHL V OH Yn or Z input V OL 001aaf882 Measurement points are given in Table 10. Logic levels: V OL and V OH are typical output voltage drops that occur with the output load. Fig 10. Input (Z, Yn or Sn) to output (Yn, Z) propagation delays _1 Product data sheet Rev March of 20

13 V I input 0 V t PLZ t PZL V CC Z or Yn output Z or Yn output V OL V OH GND t PHZ V X V Y t PZH switch ON switch OFF switch ON 001aaf884 Measurement points are shown in Table 10. Fig 11. nable and disable times Table 10. Measurement points Supply voltage Input Output V CC V I V X V Y 2.0 V to 6.0 V 0.5 V CC GND to V CC 0.5 V CC V OL (V CC V OL ) 0.9 V OH _1 Product data sheet Rev March of 20

14 V I negative pulse 0 V V I positive pulse 0 V t W 90 % 90 % 10 % t THL (t f ) t TLH (t r ) t TLH (t r ) t THL (t f ) 90 % 10 % 10 % t W 001aac221 a. Input pulse definition V CC switch V CC open PULS GNRTOR VI DUT VO RL RT CL GND 001aaf883 Definitions for test circuit: R L = load resistance. C L = load capacitance including jig and probe capacitance. R T = termination resistance should be equal to the output impedance Z o of the pulse generator. b. Load circuitry Test data is given in Table 11. Fig 12. Switching times Table 11. Test data Test Input Switch t r, t f t PZH, t PHZ 6ns V CC GND t PZL, t PLZ 6 ns GND V CC t PHL, t PLH 6 ns pulse open V I _1 Product data sheet Rev March of 20

15 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D X c y H v M Z 16 9 Q 2 1 ( ) 3 pin 1 index θ L p 1 8 L e b p w M detail X mm scale DIMNSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches max b p c D (1) (1) e H (1) L L p Q v w y Z Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included θ o 8 o OUTLIN VRSION RFRNCS IC JDC JIT UROPN PROJCTION ISSU DT SOT MS Fig 13. Package outline SOT109-1 (SO16) _1 Product data sheet Rev March of 20

16 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 D X c y H v M Z 16 9 pin 1 index 2 1 Q ( ) 3 θ 1 8 e b p w M L detail X L p mm scale DIMNSIONS (mm are the original dimensions) UNIT b p c D (1) (2) e H (1) L L p Q v w y Z max. mm θ o 8 o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT SOT403-1 MO-153 UROPN PROJCTION ISSU DT Fig 14. Package outline SOT403-1 (TSSOP16) _1 Product data sheet Rev March of 20

17 DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm SOT763-1 D B 1 c terminal 1 index area detail X terminal 1 index area e 1 e b 2 7 v M w M C C B y 1 C C y L 1 8 h e D h X mm scale DIMNSIONS (mm are the original dimensions) UNIT (1) max. 1 b c D (1) D h (1) h e e 1 L v w y y 1 mm Note 1. Plastic or metal protrusions of mm maximum per side are not included. OUTLIN VRSION RFRNCS IC JDC JIT SOT MO UROPN PROJCTION ISSU DT Fig 15. Package outline SOT763-1 (DHVQFN16) _1 Product data sheet Rev March of 20

18 14. bbreviations Table 12. cronym CDM CMOS DUT SD HBM MM bbreviations Description Charged Device Model Complementary Metal Oxide Semiconductor Device Under Test lectrostatic Discharge Human Body Model Machine Model 15. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes _ Product data sheet - - _1 Product data sheet Rev March of 20

19 16. Legal information 16.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail Disclaimers General Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. pplications pplications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. xposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For additional information, please visit: For sales office addresses, send an to: salesaddresses@nxp.com _1 Product data sheet Rev March of 20

20 18. Contents 1 General description Features pplications Ordering information Functional diagram Pinning information Pinning Pin description Functional description Limiting values Recommended operating conditions Static characteristics Dynamic characteristics Waveforms Package outline bbreviations Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com Date of release: 9 March 2007 Document identifier: _1