74AHC244; 74AHCT244. Octal buffer/line driver; 3-state. The 74AHC244; 74AHCT244 is a high-speed Si-gate CMOS device.
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1 Rev December 2007 Product data sheet. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device. The has octal non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs (noe). HIGH on noe causes the outputs to assume a high-impedance OFF-state. Balanced propagation delays ll inputs have a Schmitt-trigger action Inputs accepts voltages higher than V CC For 74HC244 only: operates with CMOS input levels For 74HCT244 only: operates with TTL input levels ESD protection: HBM JESD22-4E exceeds 2000 V MM JESD22-5- exceeds 200 V CDM JESD22-C0C exceeds 000 V Multiple package options Specified from 40 C to +85 C and from 40 C to +25 C Table. Ordering information Type number Package Temperature range Name Description Version 74HC244D 40 C to +25 C SO20 plastic small outline package; 20 leads; SOT63-74HCT244D 74HC244PW 40 C to +25 C TSSOP20 body width 7.5 mm plastic thin shrink small outline package; 20 leads; SOT360-74HCT244PW 74HC244BQ 40 C to +25 C DHVQFN20 body width 4.4 mm plastic dual-in-line compatible thermal enhanced SOT764-74HCT244BQ very thin quad flat package; no leads; 20 terminals; body mm
2 4. Functional diagram 2 0 Y0 8 4 Y Y Y3 2 OE Y Y Y Y OE mna70 Fig. Functional diagram EN Y Y Y Y OE Y2 2 Y OE 7 2Y2 9 2Y3 mna EN mna873 Fig 2. Logic symbol Fig 3. IEC logic symbol Product data sheet Rev December of 6
3 5. Pinning information 5. Pinning 74HC244 74HCT244 terminal index area OE VCC 74HC244 74HCT OE OE 0 2Y V CC 2OE Y0 2Y0 2Y Y0 20 Y Y 2 2Y2 3 2Y3 GND Y 2 Y2 22 Y3 23 2Y2 3 2Y GND () GND 23 Y2 22 Y3 00aah079 00aae258 Transparent top view () The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO20, TSSOP20 Fig 5. Pin configuration DHVQFN Pin description Table 2. Pin description Symbol Pin Description OE output enable input (active LOW) [0:3] 2, 4, 6, 8 data input 2[0:3] 7, 5, 3, data input Y[0:3] 8, 6, 4, 2 data output 2Y[0:3] 3, 5, 7, 9 data output GND 0 ground (0 V) 2OE 9 output enable input (active LOW) V CC 20 supply voltage Product data sheet Rev December of 6
4 6. Functional description Table 3. Function table [] Control Input Output noe nn nyn L L L H H H X Z [] H = HIGH voltage level; L = LOW voltage level; X = don t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the bsolute Maximum Rating System (IEC 6034). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply voltage V V I input voltage V I IK input clamping current V I < 0.5 V [] 20 - m I OK output clamping current V O < 0.5 V or V O >V CC V [] - ±20 m I O output current V O = 0.5 V to (V CC V) - ±25 m I CC supply current - 75 m I GND ground current 75 - m T stg storage temperature C P tot total power dissipation T amb = 40 C to +25 C SO20 package [2] mw TSSOP20 package [3] mw DHVQFN20 package [4] mw [] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] P tot derates linearly with 8 mw/k above 70 C. [3] P tot derates linearly with 5.5 mw/k above 60 C. [4] P tot derates linearly with 4.5 mw/k above 60 C. Product data sheet Rev December of 6
5 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HC244 74HCT244 Unit 9. Static characteristics Min Typ Max Min Typ Max V CC supply voltage V V I input voltage V V O output voltage 0 - V CC 0 - V CC V T amb ambient temperature C t/ V input transition rise and fall rate V CC = 3.3 V ± 0.3 V ns/v V CC = 5.0 V ± 0.5 V ns/v Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit For type 74HC244 V IH HIGH-level input voltage V IL V OH V OL I OZ I I LOW-level input voltage HIGH-level output voltage LOW-level output voltage OFF-state output current input leakage current Min Typ Max Min Max Min Max V CC = 2.0 V V V CC = 3.0 V V V CC = 5.5 V V V CC = 2.0 V V V CC = 3.0 V V V CC = 5.5 V V V I = V IH or V IL I O = 50 µ; V CC = 2.0 V V I O = 50 µ; V CC = 3.0 V V I O = 50 µ; V CC = 4.5 V V I O = 4.0 m; V CC = 3.0 V V I O = 8.0 m; V CC = 4.5 V V V I = V IH or V IL I O = 50 µ; V CC = 2.0 V V I O = 50 µ; V CC = 3.0 V V I O = 50 µ; V CC = 4.5 V V I O = 4.0 m; V CC = 3.0 V V I O = 8.0 m; V CC = 4.5 V V V I =V IH or V IL ; - - ± ±2.5 - ±0.0 µ V O =V CC or GND; V CC = 5.5 V V I = 5.5 V or GND; V CC = 0 V to 5.5 V I CC supply current V I =V CC or GND; I O = 0 ; V CC = 5.5 V µ µ Product data sheet Rev December of 6
6 Table 6. Static characteristics continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit Min Typ Max Min Max Min Max C I input pf capacitance C O output capacitance pf For type 74HCT244 V IH HIGH-level V CC = 4.5 V to 5.5 V V input voltage V IL LOW-level V CC = 4.5 V to 5.5 V V input voltage V OH HIGH-level output voltage V I = V IH or V IL ; V CC = 4.5 V I O = 50 µ V I O = 8.0 m V V OL LOW-level output voltage V I = V IH or V IL ; V CC = 4.5 V I O = 50 µ V I O = 8.0 m V I OZ OFF-state output current per input pin; V I =V IH or V IL ; V CC = 5.5 V; I O =0 V O =V CC or GND; other pins at V CC or GND - - ± ±2.5 - ±0.0 µ I I input leakage current V I = 5.5 V or GND; V CC = 0 V to 5.5 V I CC supply current V I =V CC or GND; I O = 0 ; V CC = 5.5 V I CC C I C O additional supply current input capacitance output capacitance per input pin; V I =V CC 2. V; I O = 0 ; other pins at V CC or GND; V CC = 4.5 V to 5.5 V µ µ m pf pf Product data sheet Rev December of 6
7 0. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure 8. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit Min Typ [] Max Min Max Min Max For type 74HC244 t pd propagation nn to nyn; see Figure 6 [2] delay V CC = 3.0 V to 3.6 V C L = 5 pf ns C L = 50 pf ns V CC = 4.5 V to 5.5 V C L = 5 pf ns C L = 50 pf ns t en enable time noe to nyn; see Figure 7 [2] V CC = 3.0 V to 3.6 V C L = 5 pf ns C L = 50 pf ns V CC = 4.5 V to 5.5 V C L = 5 pf ns C L = 50 pf ns t dis disable time noe to nyn; see Figure 7 [2] C PD power dissipation capacitance V CC = 3.0 V to 3.6 V C L = 5 pf ns C L = 50 pf ns V CC = 4.5 V to 5.5 V C L = 5 pf ns C L = 50 pf ns C L = 50 pf; f i = MHz; [3] pf V I = GND to V CC Product data sheet Rev December of 6
8 Table 7. Dynamic characteristics continued GND = 0 V. For test circuit see Figure 8. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +25 C Unit Min Typ [] Max Min Max Min Max For type 74HCT244 t pd propagation nn to nyn; see Figure 6 [2] delay V CC = 4.5 V to 5.5 V C L = 5 pf ns C L = 50 pf ns t en enable time noe to nyn; see Figure 7 V CC = 4.5 V to 5.5 V C L = 5 pf ns C L = 50 pf ns t dis disable time noe to nyn; see Figure 7 [2] C PD power dissipation capacitance [] Typical values are measured at nominal supply voltage (V CC = 3.3 V and V CC = 5.0 V). [2] t pd is the same as t PLH and t PHL. t en is the same as t PZL and t PZH. t dis is the same as t PLZ and t PHZ. [3] C PD is used to determine the dynamic power dissipation P D (µw). P D =C PD V CC 2 f i + (C L V CC 2 f o ) where: f i = input frequency in MHz; f o = output frequency in MHz; C L = output load capacitance in pf; V CC = supply voltage in Volts.. Waveforms V CC = 4.5 V to 5.5 V C L = 5 pf ns C L = 50 pf ns per buffer; [3] pf C L =50pF;f= MHz; V I = GND to V CC V I nn input GND t PLH t PHL V OH nyn output V OL mna7 Fig 6. Measurement points are given in Table 8. V OL and V OH are typical voltage output levels that occur with the output load. Propagation delay input (nn) to output (nyn) Product data sheet Rev December of 6
9 V I noe input GND t PLZ t PZL nyn output LOW-to-OFF OFF-to-LOW V CC V OL V X t PHZ t PZH V OH nyn output HIGH-to-OFF OFF-to-HIGH GND outputs enabled V Y outputs disabled outputs enabled 00aae04 Measurement points are given in Table 8. V OL and V OH are typical voltage output levels that occur with the output load. Fig 7. enable and disable times Table 8. Measurement points Type Input Output V X V Y 74HC V CC 0.5V CC V OL V V OH 0.3 V 74HCT244.5 V 0.5V CC V OL V V OH 0.3 V Product data sheet Rev December of 6
10 V I negative pulse 0 V 90 % 0 % t W t f t r t r t f V I positive pulse 0 V 0 % 90 % t W V CC V CC PULSE GENERTOR VI DUT VO RL S open RT CL 00aad983 Fig 8. Test data is given in Table 9. Definitions test circuit: R T = Termination resistance should be equal to output impedance Z o of the pulse generator C L = Load capacitance including jig and probe capacitance R L = Load resistor S = Test selection switch Load circuitry for switching times Table 9. Test data Type Input Load S position V I t r, t f C L R L t PHL, t PLH t PZH, t PHZ t PZL, t PLZ 74HC244 V CC 3.0 ns 5 pf, 50 pf kω open GND V CC 74HCT V 3.0 ns 5 pf, 50 pf kω open GND V CC Product data sheet Rev December of 6
11 2. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT63- D E X c y H E v M Z 20 Q 2 ( ) 3 pin index L p L θ e b p 0 w M detail X mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches max b p c D () E () e H () E L L p Q v w y Z Note. Plastic or metal protrusions of 0.5 mm (0.006 inch) maximum per side are not included θ o 8 o OUTLINE VERSION REFERENCES IEC JEDEC JEIT EUROPEN PROJECTION ISSUE DTE SOT63-075E04 MS Fig 9. Package outline SOT63- (SO20) Product data sheet Rev December 2007 of 6
12 TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360- D E X c y H E v M Z 20 Q pin index 2 ( ) 3 θ 0 w M e b p detail X L p L mm scale DIMENSIONS (mm are the original dimensions) UNIT 2 3 b p c D () E (2) e H () E L L p Q v w y Z max. mm θ o 8 o 0 Notes. Plastic or metal protrusions of 0.5 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEIT SOT360- MO-53 EUROPEN PROJECTION ISSUE DTE Fig 0. Package outline SOT360- (TSSOP20) Product data sheet Rev December of 6
13 DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764- D B E c terminal index area detail X terminal index area e e b 2 9 v M w M C C B y C C y L 0 E h e D h X mm scale DIMENSIONS (mm are the original dimensions) UNIT () max. b c D () D h E () E h e e L v w y y mm Note. Plastic or metal protrusions of mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEIT SOT MO EUROPEN PROJECTION ISSUE DTE Fig. Package outline SOT764- (DHVQFN20) Product data sheet Rev December of 6
14 3. bbreviations Table 0. cronym CDM CMOS DUT ESD HBM MM TTL bbreviations Description Charge Device Model Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 4. Revision history Table. Revision history Document ID Release date Data sheet status Change notice Supersedes Product data sheet - 74HC_HCT244_4 Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Section 3: DHVQFN20 package added. Section 7: derating values added for DHVQFN20 package. Section 2: outline drawing added for DHVQFN20 package. 74HC_HCT244_ Product data sheet - 74HC_HCT244_3 74HC_HCT244_ Product specification - 74HC_HCT244_2 74HC_HCT244_ Product specification - 74HC_HCT244_ 74HC_HCT244_ Product specification - - Product data sheet Rev December of 6
15 5. Legal information 5. Data sheet status Document status [][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [] Please consult the most recently issued document before initiating or completing a design. [2] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 5.3 Disclaimers General Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use Nexperia products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia accepts no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. pplications pplications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IEC 6034) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by Nexperia. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 5.4 Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 6. Contact information For additional information, please visit: For sales office addresses, send an to: salesaddresses@nexperia.com Product data sheet Rev December of 6
16 7. Contents General description Features Ordering information Functional diagram Pinning information Pinning Pin description Functional description Limiting values Recommended operating conditions Static characteristics Dynamic characteristics Waveforms Package outline bbreviations Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents For more information, please visit: For sales office addresses, please send an to: salesaddresses@nexperia.com Date of release: 20 December 2007
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Rev. 03 12 November 2004 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL).
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Rev. 05 13 July 2009 Product data sheet 1. General description 2. Features The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance
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Rev. 3 21 January 2013 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an 8-bit inverting buffer/line driver with 3-state outputs. The device features
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Rev. 6 20 November 2012 Product data sheet 1. General description The has eight edge-triggered D-type flip-flops with individual inputs (D) and outputs (Q). common clock input (CP) loads all flip-flops
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