AKD4554-E Evaluation board Rev.0 for AK4554

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1 SHI KSI [K4554] K4554- valuation boar Rev.0 for K4554 GNRL SRIPTION K4554- is an evaluation boar for the portable igital auio 6bit / an / converter, K4554. The K4554- can evaluate / converter an / converter separately in aition to loopback moe (/ /). The / section can be evaluate by interfacing with KM s evaluation boars irectly. The K4554 has the interface with KM s evaluation boars. Therefore, it s easy to evaluate the / section. The K4554- also has the igital auio interface an can achieve the interface with igital auio systems via opt-connector. Orering guie K valuation boar for K4554 FUNTION ompatible with 2 types of interface - irect interface with KM s / & / converter evaluation boars - IT/IR with optical input/output K4554 Figure. K4554- lock iagram * ircuit iagram an P layout are attache at the en of this manual. - -

2 SHI KSI [K4554] valuation oar Manual Operation sequence ) Set up the power supply lines. [] (Orange) =.6 3.6V : for of K4554 [RG] (Re) = 5.0V : for regulator [GN] (lack) = 0V : for analog groun (incluing VSS of K4554) [GN] (lack) = 0V : for logic groun ach supply line shoul be istribute from the power supply unit. 2) Set up the evaluation moe, jumper pins an IP switches. (See the followings.) 3) Power on. The K4554 shoul be reset once bringing SW2 (PN) OFF upon power-up

3 SHI KSI [K4554] valuation moe pplicable valuation Moe ) valuation of loopback moe (efault) 2) valuation of / using / converte ata 3) valuation of / using IR (Optical Link) 4) valuation of / using / converte ata 5) valuation of / using IT (Optical Link) 6) ll interface signals incluing master clock are fe externally. 5) 4) K43XX / oar PORT2 IT K4554- PORT3 0pin-Heaer ) Player PORT IR 3) K53XX / oar 2) ) valuation of loopback moe. (efault) Nothing shoul be connecte to PORT/PORT3. JP4 JP5 JP6 JP MLK SLK LRK STI IR - 3 -

4 SHI KSI [K4554] 2) valuation of / using / converte ata. / part can be evaluate by connecting with KM s / evaluation boars via PORT3. Nothing shoul be connecte to PORT JP4 JP5 JP6 JP MLK SLK LRK STI IR 3) valuation of / using IR. (Optical link) PORT (TORX4) is use. IR generates MLK, SLK, LRK an ST from the receive ata through optical connector (TORX4). Use for the evaluation using test isk. Nothing shoul be connecte to PORT2/PORT3. JP4 JP5 JP6 JP MLK SLK LRK STI IR 4) valuation of / using / converte ata. / part can be evaluate by connecting with KM s / evaluation boars via PORT3. Nothing shoul be connecte to PORT. JP4 JP5 JP6 JP MLK SLK LRK STI IR - 4 -

5 SHI KSI [K4554] 5) valuation of / using IT. (Optical link) PORT2 (TOTX4) is use. IT generates auio bi-phase signal from receive ata an which is output through optical connector (TOTX4). It is possible to connect KM s / converter evaluation boars on the igital-amplifier, which equips IR input. JP4 JP5 JP6 JP MLK SLK LRK STI IR 6) ll interfacing signals (MLK, SLK, LRK) are fe from the external circuit through PORT3. Uner the following set-up, all external signals neee for the K4554 to operate coul be fe through PORT3. JP4 JP5 JP6 JP MLK SLK LRK STI IR - 5 -

6 SHI KSI [K4554] IP switch set up Upper-sie is ON ( H ) an lower sie is OFF ( L ). [SW]: Set up the K4554 an K44.. SW No. SW Name Moe IF2, 0 K4554 an K44 uio Format Setting lways OFF. 2 M Set up the e-emphasis of K M0 (See table 2) 4 N No use Table. IPswitch set-up of K44 M M0 (SW-#2) (SW-#3) Moe OFF OFF 44.kHz OFF ON OFF ON OFF 48kHz ON ON 32kHz Table 2. IPswitch set up of e-emphasis - 6 -

7 SHI KSI [K4554] Other jumper pins set up [JP] (GN): onnection between GN an GN open: oth grouns are separate on boar.<efault> short: oth grouns are connecte on boar. [JP2] (RG): Select to regulator open: On-boar regulator is not use. <efault> short: On-boar regulator is use.(the connector can be open.) [JP3] (PWR): Pull up power supply select for STO. : onnecte to of K4554. <efault> 3V: Supplie from regulator (3V). The function of the toggle SW. Upper-sie is ON an lower sie is OFF. [SW2] (PN): Resets the K4554 an K44. Keep ON uring normal operation. Inication for L [L] (RF): Monitor INT0 pin of the K44. L turns on when some error has occurre to K

8 SHI KSI [K4554] Input ircuit J INL/INR R u + INR 29 4.u + INL R2 560 Figure 2. Input circuit on boar Output ircuit OUTR u R23 0k R J2 OUTL u R22 0k R OUTL/OUTR Figure 3. Output circuit on boar * KM assumes no responsibility for the trouble when using the circuit examples

9 SHI KSI [K4554] MSURMNT RSULTS [Measurement conition] Measurement unit MLK SLK fs it Power Supply Interface Temperature : uio Precision, System two : 256fs : 64fs : 44.kHz : 6bit : = VP = 2.5V, = 5V : IT/IR : Room. Parameter Measure Filter INL INR S/(N+) (-0.5FS) 20kHz LPF V -Range (-60FS) 20kLPF + -weighte S/N (0 ata) 20kLPF + -weighte Parameter Measure Filter OUTL OUTR S/(N+) (0FS) 20kHz LPF V -Range (-60FS) 22kLPF + -weighte S/N (0 ata) 22kLPF + -weighte

10 SHI KSI [K4554] 3.PLOT T 3- KM K4554 TH+N vs.input Level =2.5V, fs=44.khz, fin=khz F S r Fig. TH+N vs. Input Level KM K4554 TH+N vs. Input Frequency =2.5V, fs=44.khz, Input Level=-0.5 F S k 2k 5k 0k 20k Hz Fig.2 TH+N vs. Input Frequency - 0 -

11 SHI KSI [K4554] KM +0 K4554 Linearity =2.5V, fs=44.khz, fin=khz F S r Fig.3 Linearity KM K4554 Frequency Response =2.5V, fs=44.khz, Input level=-0.5 F S k 2k 5k 0k 20k Hz Fig.4 Frequency Response - -

12 SHI KSI [K4554] KM F S K4554 FFT Plot =2.5V, fs=44.khz, fin=khz, Input Level= k 2k 5k 0k 20k Hz Fig.5 FFT Plot (Input Level = -0.5) KM F S K4554 FFT Plot =2.5V, fs=44.khz, fin=khz, Input Level= k 2k 5k 0k 20k Hz Fig.6 FFT Plot (Input Level = -60) - 2 -

13 SHI KSI [K4554] KM F S K4554 FFT =2.5V, fs=44.khz, Input Level= k 2k 5k 0k 20k Hz Fig. FFT Plot (no signal) Fig.8 rosstalk (re : L--->R, blue : R--->L) - 3 -

14 SHI KSI [K4554] 3-2. KM r K4554 TH+N vs. Input Level =2.5V, fs=44.khz, fin=khz FS Fig.9 TH+N vs. Input Level KM r K4554 TH+N vs. Input Frequency =2.5V, fs=44.khz, Input Level= k 2k 5k 0k 20k Hz Fig.0 TH+N vs. Input Frequency - 4 -

15 SHI KSI [K4554] KM +0 K4554 Linearity =2.5V, fs=44.khz, fin=khz r FS Fig. Linearity KM K4554 Frequency Response =2.5V, fs=44.khz, Input Level= r k 4k 6k 8k 0k 2k 4k 6k 8k Hz 20k Fig.2 Frequency Response - 5 -

16 SHI KSI [K4554] KM r K4554 FFT Plot =2.5V, fs=44.khz,fin=khz, Input Level= k 2k 5k 0k 20k Hz Fig.3 FFT Plot (Input Level = 0) KM r K4554 FFT Plot =2.5V, fs=44.khz,fin=khz, Input Level= k 2k 5k 0k 20k Hz Fig.4 FFT Plot (Input Level = -60) - 6 -

17 SHI KSI [K4554] KM r K4554 FFT =2.5V, fs=44.khz, Input Level= k 2k 5k 0k 20k Hz Fig.5 FFT Plot (no ata) Fig.6 rosstalk (re : L--->R, blue : R--->L) - -

18 SHI KSI [K4554] KM r K4554 out-ban-noise =2.5V, fs=44.khz, Input=no ata k 2k 5k 0k 20k 50k 00k Hz Fig. Out ban noise - 8 -

19 SHI KSI [K4554] Revision History ate Manual oar Reason (YY/MM/) Revision Revision 05/03/3 KM First tion ontents IMPORTNT NOTI These proucts an their specifications are subject to change without notice. efore consiering any use or application, consult the sahi Kasei Microsystems o., Lt. (KM) sales office or authorize istributor concerning their current status. KM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information containe herein. ny export of these proucts, or evices or systems containing them, may require an export license or other official approval uner the law an regulations of the country of export pertaining to customs an tariffs, currency exchange, or strategic materials. KM proucts are neither intene nor authorize for use as critical components in any safety, life support, or other hazar relate evice or system, an KM assumes no responsibility relating to any such use, except with the express written consent of the Representative irector of KM. s use here: (a) hazar relate evice or system is one esigne or intene for life support or maintenance of safety or for applications in meicine, aerospace, nuclear energy, or other fiels, in which its failure to function or perform may reasonably be expecte to result in loss of life or in significant injury or amage to person or property. (b) critical component is one whose failure to function or perform may reasonably be expecte to result, whether irectly or inirectly, in the loss of the safety or effectiveness of the evice or system containing it, an which must therefore meet very high stanars of performance an reliability. It is the responsibility of the buyer or istributor of an KM prouct who istributes, isposes of, or otherwise places the prouct with a thir party to notify that party in avance of the above content an conitions, an the buyer or istributor agrees to assume any an all responsibility an liability for an hol KM harmless from any an all claims arising from the use of sai prouct in the absence of such notification

20 J INL/INR R u + RG T45_R RG T45_O V GN T45_K GN T45_K u + R 0k R2 220 R J2 OUTL/OUTR 4 4.u (5V) (.6-3.6V) 3 22u R5 0k + RG T T4803F R6 560 GN JP GN GN 5 0.u IN GN OUT 6 0.u 2 + 4u 8 0.u U V VOM OUTR 6 0 4u 2 L 2 (short) + R 5. JP2 RG LV 0u u INR INL VSS OUTL 5 PWN 4 PWN 3 SLK 2 R8 5 PWN LK 6 M0 MLK R9 5 MLK M LRK 0 R0 5 LRK R 5 8 STO STI 9 R2 5 STI K4554 M0 M 4554_STO Title K4554- Size ocument Number Rev 3 K ate: Monay, February 28, 2005 Sheet of 4

21 L2 4u IP SW K4555 IF2, 0 ON M OFF M0 OFF 44.k PORT V 3 GN 2 OUT TORX u + 3 0u R u u K4550/4 OFF OFF ON OFF ON OFF 48k ON ON 32k 6 0.4u R4 8k RP 4k IF2,0 M M SW MO M0 M U2 IPS0 48 RX3 N 4 46 RX2 45 TST 44 RX N RX0 VSS 4 VOM 40 R INT INT0 36 U H4 R5 k L RF 2 2 N OKS0 3 IF0 4 TST IF N IF2 IPS 2 X.2896MHz 5p 8 5p TP 44_PN XTLK 9 P/SN UX 28 STO 0 XTL0 MKO2 2 XTL IK 26 IR_IK IR_STO T VSS TX0 TX OUT OUT UOUT VOUT VSS MKO 35 OKS 34 M 33 K44 M0 32 PN 3 XTI 30 XTO VIN STO 25 4 LRK 9 0.u u IR_LRK PORT2 IN 3 V 2 GN TOTX u + 2 0u R u IR_MKO Title K4554- Size ocument Number Rev 3 IR/IT 0 ate: Monay, February 0, 2005 Sheet 2 of 4

22 JP3 PWR 3V R k PWN U4 Y8 8 9 STO U LV0NS 4554_STO LV 2 Y 8 MLK 3 Y6 6 JP4MLK IR_MKO LK 4 Y5 5 6 JP5SLK IR_IK LRK 5 Y4 4 5 JP6LRK IR_LRK STI 6 Y3 3 4 Y Y 2 LV 24 0.u 0 20 GN V 4LV54 G2 G 9 MLK IK LRK STI PORT SP GN GN N N STO 2 S588 L H 3 2 SW2 PN R8 0k U H u U H4 for 4H u for 4LV0NS 2 0.u LV 44_PN R9 0k JP STI IR STO IR_STO Title K4554- Size ocument Number Rev 3 LOGI 0 ate: Monay, February 0, 2005 Sheet 3 of 4

23 LV U LV0NS U LV0NS U H4 U LV0NS U H4 U3F H4 U5 0 4 U5F LV0NS 4LV0NS Title K4554- Size ocument Number Rev 3 PIN 0 ate: Monay, February 0, 2005 Sheet 4 of 4

[AKD5384] AK5384 Evaluation Board Rev.A

[AKD5384] AK5384 Evaluation Board Rev.A HI KI [K8] K8 K8 valuation oar Rev. GNRL RIPTION K8 is an evaluation boar for the igital auio bit 9k ch / converter, K8. The K8 inclues the input circuit an also has a igital interface transmitter. urther,