DATASHEET CD4020BMS, CD4024BMS, CD4040BMS. Pinouts. Features. Applications. Description. CMOS Ripple-Carry BinaryCounter/Dividers

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1 DATASHEET CD00BMS, CD0BMS, CD00BMS CMOS ipple-carry BinaryCounter/Dividers FN3300 ev 1.00 Features Pinouts High Voltage Types (0V ating) Medium Speed Operation Fully Static Operation Buffered Inputs and Outputs 0% Tested for Quiescent Current at 0V Standardized Symmetrical Output Characteristics Common eset 5V, V and 15V Parametric atings Maximum Input Current of 1a at 1V Over Full Package-Temperature ange; - 0nA at 1V and 5 o C 3 Q Q5 Q7 Q CD00BMS TOP VIEW Q Q9 ESET Noise Margin (Over Full Package Temperature ange): - 1V at = 5V - V at = V -.5V at = 15V Meets All equirements of JEDEC Tentative Standard No. 13B, Standard Specifications For Description Of B Series CMOS Devices 1 CD0BMS TOP VIEW 1 Applications Control Counters Timers Frequency Dividers Time-Delay Circuits Description CD00BMS - 1 Stage ESET Q7 3 Q Q5 5 Q 7 NC = NO CONNECTION NC Q NC Q3 NC CD0BMS - 7 Stage CD00BMS - 1 Stage CD00BMS TOP VIEW CD00BMS, CD0BMS, and CD00BMS are ripplecarry binary counters. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the ESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered. Q Q5 Q7 Q Q 1 Q9 The CD00BMS, CD0BMS and the CD00BMS is supplied in these 1 lead outline packages: CD00B CD0B CD00B Q3 Q 7 9 Braze Seal DIP HW HQ HX Frit Seal DIP H1F H1B H1F Ceramic Flatpack HW H3W HW FN3300 ev 1.00 Page 1 of

2 Absolute Maximum atings DC Supply Voltage ange, () V to +0V (Voltage eferenced to Terminals) Input Voltage ange, All Inputs V to +0.5V DC Input Current, Any One Input ma Operating Temperature ange to +15 o C Package Types D, F, K, H Storage Temperature ange (TSTG) o C to +150 o C Lead Temperature (During Soldering) o C At Distance 1/1 1/3 Inch (1.59mm 0.79mm) from case for s Maximum eliability Information Thermal esistance ja jc Ceramic DIP and FIT Package o C/W 0 o C/W Flatpack Package o C/W 0 o C/W Maximum Package Power Dissipation (PD) at +15 o C For TA = - to +0 o C (Package Type D, F, K) mW For TA = +0 o C to +15 o C (Package Type D, F, K)..... Derate Linearity at 1mW/ o C to 00mW Device Dissipation per Output Transistor mW For TA = Full Package Temperature ange (All Package Types) Junction Temperature o C TABLE 1. DC ELECTICAL PEFOMANCE CHAACTEISTICS GOUP A PAAMETE SYMBOL CONDITIONS (NOTE 1) SUBGOUPS TEMPEATUE MIN MAX UNITS Supply Current IDD = 0V, VIN = or GND 1 +5 o C - A +15 o C - 00 A = 1V, VIN = or GND A Input Leakage Current IIL VIN = or GND = o C -0 - na +15 o C na = 1V na Input Leakage Current IIH VIN = or GND = o C - 0 na +15 o C - 00 na = 1V na Output Voltage VOL15 = 15V, No Load 1,, 3 +5 o C, +15 o C, mv Output Voltage VOH15 = 15V, No Load (Note 3) 1,, 3 +5 o C, +15 o C, V Output Current (Sink) IOL5 = 5V, VOUT = 0.V 1 +5 o C ma Output Current (Sink) IOL = V, VOUT = 0.5V 1 +5 o C 1. - ma Output Current (Sink) IOL15 = 15V, VOUT = 1.5V 1 +5 o C ma Output Current (Source) IOH5A = 5V, VOUT =.V 1 +5 o C ma Output Current (Source) IOH5B = 5V, VOUT =.5V 1 +5 o C ma Output Current (Source) IOH = V, VOUT = 9.5V 1 +5 o C ma Output Current (Source) IOH15 = 15V, VOUT = 13.5V 1 +5 o C ma N Threshold Voltage VNTH = V, ISS = -A 1 +5 o C V P Threshold Voltage VPTH = 0V, IDD = A 1 +5 o C 0.7. V Functional F =.V, VIN = or GND 7 +5 o C VOH > VOL < V = 0V, VIN = or GND 7 +5 o C / / = 1V, VIN = or GND A +15 o C = 3V, VIN = or GND B - Input Voltage Low (Note ) VIL = 5V, VOH >.5V, VOL < 0.5V 1,, 3 +5 o C, +15 o C, V Input Voltage High (Note ) Input Voltage Low (Note ) Input Voltage High (Note ) VIH = 5V, VOH >.5V, VOL < 0.5V 1,, 3 +5 o C, +15 o C, V VIL VIH = 15V, VOH > 13.5V, VOL < 1.5V = 15V, VOH > 13.5V, VOL < 1.5V 1,, 3 +5 o C, +15 o C, - - V 1,, 3 +5 o C, +15 o C, - - V FN3300 ev 1.00 Page of

3 NOTES: TABLE 1. DC ELECTICAL PEFOMANCE CHAACTEISTICS PAAMETE SYMBOL CONDITIONS (NOTE 1) 1. All voltages referenced to device GND, 0% testing being implemented.. Go/No Go test with limits applied to inputs GOUP A SUBGOUPS TEMPEATUE MIN MAX UNITS 3. For accuracy, voltage is measured differentially to. Limit is 0.050V max. TABLE. AC ELECTICAL PEFOMANCE CHAACTEISTICS GOUP A PAAMETE SYMBOL CONDITIONS (NOTE 1, ) SUBGOUPS TEMPEATUE MIN MAX UNITS TPHL1 = 5V, VIN = or GND 9 +5 o C - 30 ns 0 To TPLH1, +15 o C, - - ns TPHL = 5V, VIN = or GND 9 +5 o C ns Qn To Qn + 1 TPLH, +15 o C, - - ns TPLH3 = 5V, VIN = or GND 9 +5 o C - 0 ns eset To Q TPHL3, +15 o C, ns Transition Time TTHL = 5V, VIN = or GND 9 +5 o C - 00 ns TTLH, +15 o C, ns Maximum Clock Input Frequency FCL = 5V, VIN = or GND 9 +5 o C MHz, +15 o C, -. - MHz NOTES: 1. = 5V, CL = 50pF, L = 00K. - and +15 o C limits guaranteed, 0% testing being implemented. TABLE 3. ELECTICAL PEFOMANCE CHAACTEISTICS PAAMETE SYMBOL CONDITIONS NOTES TEMPEATUE MIN MAX UNITS Supply Current IDD = 5V, VIN = or GND 1, -, +5 o C - 5 A +15 o C A = V, VIN = or GND 1, -, +5 o C - A +15 o C A = 15V, VIN = or GND 1, -, +5 o C - A +15 o C - 00 A Output Voltage VOL = 5V, No Load 1, +5 o C, +15 o C, mv Output Voltage VOL = V, No Load 1, +5 o C, +15 o C, - Output Voltage VOH = 5V, No Load 1, +5 o C, +15 o C, - Output Voltage VOH = V, No Load 1, +5 o C, +15 o C, mv.95 - V V Output Current (Sink) IOL5 = 5V, VOUT = 0.V 1, +15 o C ma ma Output Current (Sink) IOL = V, VOUT = 0.5V 1, +15 o C ma ma Output Current (Sink) IOL15 = 15V, VOUT = 1.5V 1, +15 o C. - ma -. - ma FN3300 ev 1.00 Page 3 of

4 Output Current (Source) IOH5A = 5V, VOUT =.V 1, +15 o C ma ma Output Current (Source) IOH5B = 5V, VOUT =.5V 1, +15 o C ma ma Output Current (Source) IOH = V, VOUT = 9.5V 1, +15 o C ma ma Output Current (Source) IOH15 =15V, VOUT = 13.5V 1, +15 o C - -. ma ma Input Voltage Low VIL = V, VOH > 9V, VOL < 1V 1, +5 o C, +15 o C, V Input Voltage High VIH = V, VOH > 9V, VOL < 1V 1, +5 o C, +15 o C, - Input To QN To QN + 1 eset To Q Transition Time Maximum Clock Input Frequency TABLE 3. ELECTICAL PEFOMANCE CHAACTEISTICS (Continued) PAAMETE SYMBOL CONDITIONS NOTES TEMPEATUE TPHL1 TPLH1 TPHL TPLH 7 - V = V 1,, 3 +5 o C - 10 ns = 15V 1,, 3 +5 o C ns = V 1,, 3 +5 o C - 0 ns = 15V 1,, 3 +5 o C - 0 ns TPHL3 = V 1,, 3 +5 o C - ns = 15V 1,, 3 +5 o C - 0 ns TTHL = V, 3 +5 o C - 0 ns TTLH = 15V, 3 +5 o C - 0 ns FCL = V 1,, 3 +5 o C - MHz = 15V 1,, 3 +5 o C 1 - MHz Minimum eset Pulse TW = 5V 1,, 3 +5 o C - 00 ns Width = V 1,, 3 +5 o C - 0 ns = 15V 1,, 3 +5 o C - 0 ns eset emoval Time TEM = 5V 1,, 3 +5 o C ns = V 1,, 3 +5 o C ns = 15V 1,, 3 +5 o C - 0 ns Minimum Input Pulse TW = 5V 1,, 3 +5 o C - 10 ns Width = V 1,, 3 +5 o C - 0 ns = 15V 1,, 3 +5 o C - 0 ns Input Capacitance CIN Any Input 1, +5 o C pf NOTES: 1. All voltages referenced to device GND.. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, L = 00K, Input T, TF < 0ns. MIN MAX UNITS TABLE. POST IADIATION ELECTICAL PEFOMANCE CHAACTEISTICS PAAMETE SYMBOL CONDITIONS NOTES TEMPEATUE MIN MAX UNITS Supply Current IDD = 0V, VIN = or GND 1, +5 o C - 5 A N Threshold Voltage VNTH = V, ISS = -A 1, +5 o C V FN3300 ev 1.00 Page of

5 N Threshold Voltage Delta VTND = V, ISS = -A 1, +5 o C - 1 V P Threshold Voltage VTP = 0V, IDD = A 1, +5 o C 0.. V P Threshold Voltage VTPD = 0V, IDD = A 1, +5 o C - 1 V Delta Functional F = 1V, VIN = or GND = 3V, VIN = or GND 1 +5 o C VOH > / Time TPHL TPLH NOTES: TABLE. POST IADIATION ELECTICAL PEFOMANCE CHAACTEISTICS (Continued) PAAMETE SYMBOL CONDITIONS NOTES TEMPEATUE 1. All voltages referenced to device GND.. CL = 50pF, L = 00K, Input T, TF < 0ns. VOL < / = 5V 1,, 3, +5 o C x +5 o C Limit 3. See Table for +5 o C limit.. ead and ecord MIN MAX UNITS V ns TABLE 5. BUN-IN AND LIFE TEST DELTA PAAMETES +5 O C PAAMETE SYMBOL DELTA LIMIT Supply Current - MSI- IDD 1.0A Output Current (Sink) IOL5 0% x Pre-Test eading Output Current (Source) IOH5A 0% x Pre-Test eading TABLE. APPLICABLE SUBGOUPS CONFOMANCE GOUP MIL-STD-3 METHOD GOUP A SUBGOUPS EAD AND ECOD Initial Test (Pre Burn-In) 0% 500 1, 7, 9 IDD, IOL5, IOH5A Interim Test 1 (Post Burn-In) 0% 500 1, 7, 9 IDD, IOL5, IOH5A Interim Test (Post Burn-In) 0% 500 1, 7, 9 IDD, IOL5, IOH5A PDA () 0% 500 1, 7, 9, Deltas Interim Test 3 (Post Burn-In) 0% 500 1, 7, 9 IDD, IOL5, IOH5A PDA () 0% 500 1, 7, 9, Deltas Final Test 0% 500, 3, A, B,, Group A Sample ,, 3, 7, A, B, 9,, Group B Subgroup B-5 Sample ,, 3, 7, A, B, 9,,, Deltas Subgroups 1,, 3, 9,, Subgroup B- Sample , 7, 9 Group D Sample ,, 3, A, B, 9 Subgroups 1, 3 NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and. TABLE 7. TOTAL DOSE IADIATION MIL-STD-3 TEST EAD AND ECOD CONFOMANCE GOUPS METHOD PE-IAD POST-IAD PE-IAD POST-IAD Group E Subgroup , 7, 9 Table 1, 9 Table TABLE. BUN-IN AND IADIATION TEST CONNECTIONS FUNCTION OPEN GOUND 9V -0.5V PAT NUMBE CD00BMS OSCILLATO 50kHz 5kHz FN3300 ev 1.00 Page 5 of

6 FUNCTION OPEN GOUND 9V -0.5V Static Burn-In 1 1-7, 9, 1-15,, 1 Static Burn-In Dynamic Burn- In Irradiation Note 1-7, 9, 1-15,, 1 -, 1 1-7, 9, , 9, 1-15,, 1 PAT NUMBE CD0BMS Static Burn-In 1 3 -, ,, 7 1 Static Burn-In Dynamic Burn- In Irradiation Note 3 -, ,, 1,, 13, , 9,, , ,, 1 PAT NUMBE CD00BMS Static Burn-In 1 1-7, 9, 1-15,, 1 Static Burn-In Dynamic Burn- In Irradiation Note TABLE. BUN-IN AND IADIATION TEST CONNECTIONS (Continued) 1-7, 9, 1-15,, 1 -, 1 1-7, 9, , 9, 1-15,, 1 OSCILLATO 50kHz 5kHz NOTE: 1. Each pin except and GND will have a series resistor of K 5%, = 1V 0.5V. Each pin except and GND will have a series resistor of 7K 5%; Group E, Subgroup, sample size is dice/wafer, 0 failures, = V 0.5V Functional Diagrams INPUT PULSES 1 STAGE IPPLE COUNTE 9 7 Q 5 Q5 Q Q7 13 Q 1 Q BUFFEED OUTPUTS 1 INPUT PULSES ESET 7 STAGE IPPLE COUNTE 1 Q 9 Q3 Q 5 Q5 Q 3 Q7 7 BUFFEED OUTPUTS INPUT PULSES 1 STAGE IPPLE COUNTE 9 7 Q Q3 5 Q 3 Q5 Q Q7 13 Q 1 Q BUFFEED OUTPUTS ESET NC =,, 13 7 ESET CD00BMS CD0BMS CD00BMS FN3300 ev 1.00 Page of

7 Logic Diagrams Ø1 Ø Q 3 Ø1 Ø* * FF1 Ø1 FF Ø Q 3 FF1 Ø1 *INPUTS POTECTED BY COS/MOS POTECTION NETWOK FF3 - FF13 Q 3 FIGUE 1. LOGIC DIAGAM FO CD00BMS Ø1 Ø Q Q Ø7 Q7 Ø* * FF1 Ø1 FF Ø Q Q FF1 Ø7 Q7 FF3 - FF *INPUTS POTECTED BY COS/MOS POTECTION NETWOK Q Q3 Q Q7 FIGUE. LOGIC DIAGAM FO CD0BMS Ø1 Ø Q 1 Ø7 Ø* * FF1 Ø1 FF Ø Q 1 FF1 Ø7 FF3 - FF *INPUTS POTECTED BY COS/MOS POTECTION NETWOK Q Q3 1 FIGUE 3. LOGIC DIAGAM FO CD00BMS FN3300 ev 1.00 Page 7 of

8 Typical Performance Characteristics OUTPUT LOW (SINK) CUENT (IOL) (ma) AMBIENT TEMPEATUE (T A ) = +5 o C GATE-TO-SOUCE VOLTAGE (VGS) = 15V V 5V OUTPUT LOW (SINK) CUENT (IOL) (ma) AMBIENT TEMPEATUE (T A ) = +5 o C GATE-TO-SOUCE VOLTAGE (VGS) = 15V V 5V DAIN-TO-SOUCE VOLTAGE (VDS) (V) DAIN-TO-SOUCE VOLTAGE (VDS) (V) FIGUE. TYPICAL OUTPUT LOW (SINK) CUENT CHAACTEISTICS FIGUE 5. MINIMUM OUTPUT LOW (SINK) CUENT CHAACTEISTICS DAIN-TO-SOUCE VOLTAGE (VDS) (V) AMBIENT TEMPEATUE (T A ) = +5 o C GATE-TO-SOUCE VOLTAGE (VGS) = -5V -V -15V OUTPUT HIGH (SOUCE) CUENT (IOH) (ma) DAIN-TO-SOUCE VOLTAGE (VDS) (V) AMBIENT TEMPEATUE (T A ) = +5 o C GATE-TO-SOUCE VOLTAGE (VGS) = -5V -V -15V OUTPUT HIGH (SOUCE) CUENT (IOH) (ma) FIGUE. TYPICAL OUTPUT HIGH (SOUCE) CUENT CHA- ACTEISTICS FIGUE 7. MINIMUM OUTPUT HIGH (SOUCE) CUENT CHA- ACTEISTICS FN3300 ev 1.00 Page of

9 Typical Performance Characteristics (Continued) TANSITION TIME (tthl, ttlh) (ns) AMBIENT TEMPEATUE (T A ) = +5 o C SUPPLY VOLTAGE () = 5V LOAD CAPACITANCE (CL) (pf) V 15V FIGUE. TYPICAL TANSITION TIME AS A FUNCTION OF LOAD CAPACITANCE POPAGATION DELAY TIME (tphl, tplh) (ns) ( TO ) AMBIENT TEMPEATUE (T A ) = +5 o C SUPPLY VOLTAGE () = 5V V 15V LOAD CAPACITANCE (CL) (pf) FIGUE 9. TYPICAL POPAGATION DELAY TIME AS A FUNCTION OF LOAD CAPACITANCE ( TO )) POWE DISSIPATION (PD) (W) 5 3 AMBIENT TEMPEATUE (T A ) = +5 o C SUPPLY VOLTAGE () = 5V 5V V V CD = 15pF CL = 50pF p n p n p n p n * Q 1 Q Q INPUT PULSE FEQUENCY (f) (khz) * ON FIST STAGE ONLY FIGUE. TYPICAL DYNAMIC POWE DISSIPATION AS A FUNCTION OF INPUT PULSE FEQUENCY FO CD00BMS FIGUE. DETAIL OF TYPICAL FLIP-FLOP STAGES FN3300 ev 1.00 Page 9 of

10 Chip Dimensions and Pad Layouts Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils ( -3 inch) DIMENSIONS AND PAD LAYOUT FO CD00BMS. DIMENSIONS AND PAD LAYOUT FO CD00BMS AE IDENTICAL DIMENSIONS AND PAD LAYOUT FO CD0BMSH METALLIZATION: Thickness: kå 1kÅ, AL. PASSIVATION:.kÅ - 15.kÅ, Silane BOND PADS: 0.00 inches X 0.00 inches MIN DIE THICKNESS: inches inches Copyright Intersil Americas LLC All ights eserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN3300 ev 1.00 Page of

DATASHEET CD4015BMS. Pinout. Features. Functional Diagram. Applications. Description

DATASHEET CD4015BMS. Pinout. Features. Functional Diagram. Applications. Description ATASHEET CBMS CMOS ual -Stage Static Shift egister With Serial Input/Parallel Output FN39 ev. Features Pinout High-Voltage Type (V ating) Medium Speed Operation MHz (typ.) Clock ate at V - VSS = OCK B