SN54F175, SN74F175 QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
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1 Contain Four Flip-Flops With Double-ail Outputs Buffered Clock and Direct Clear Inputs Applicatio Include: Buffer/Storage egisters Shift egisters Pattern Generators Package Optio Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 00-mil DIPs description These monolithic, positive-edge-triggered flipflops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear () input. Information at the data (D) inputs meeting setup time requirements is traferred to outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the traition time of the positive-going pulse. When the clock () input is at either the high or low level, the D-input signal has no effect at the output. The SNF is characterized for operation over the full military temperature range of C to C. The SNF is characterized for operation from 0 C to 0 C. SNF...J PACKAGE SNF...D O N PACKAGE (TOP VIEW) GND 8 SNF... FK PACKAGE (TOP VIEW) V CC Q GND 0 Q V CC Q Q D D Q Q No internal connection Q D D Q FUTION TABLE INPUTS OUTPUTS D Q Q L X X L H H H H L H L L H H L X Q0 Q0 PODUCTION DATA information is current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright, Texas Itruments Incorporated POST OFFICE BOX 0 DALLAS, TEXAS
2 logic symbol C 0 D D Q Q Q Q This symbol is in accordance with ANSI/IEEE Std -8 and IEC Publication -. logic diagram (positive logic) C Two Identical Channels Not Shown D Q C Q Pin numbers shown are for the D, J, and N packages. POST OFFICE BOX 0 DALLAS, TEXAS
3 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, V CC V to V Input voltage range, V I (see Note ) V to V Input current range ma to ma Voltage range applied to any output in the high state V to V CC Current into any output in the low state ma Operating free-air temperature range: SNF C to C SNF C to 0 C Storage temperature range C to 0 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditio beyond those indicated under recommended operating conditio is not implied. Exposure to absolute-maximum-rated conditio for extended periods may affect device reliability. NOTE : The input voltage ratings may be exceeded provided the input current ratings are observed. recommended operating conditio SNF SNF MIN NOM MAX MIN NOM MAX VCC Supply voltage.... V VIH High-level input voltage V VIL Low-level input voltage V IIK Input clamp current 8 8 ma IOH High-level output current ma IOL Low-level output current 0 0 ma TA Operating free-air temperature 0 0 C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PAAMETE TEST CONDITIONS SNF SNF MIN TYP MAX MIN TYP MAX VIK VCC =. V, II = 8 ma.. V VOH VCC =. V, IOH = ma.... VCC =. V, IOH = ma. VOL VCC =. V, IOL = 0 ma V II VCC =. V, VI = V ma IIH VCC =. V, VI =. V 0 0 µa IIL VCC =. V, VI = 0. V ma IOS VCC =. V, VO = ma ICC VCC =. V, See Note.. ma All typical values are at VCC = V, TA = C. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. NOTE : ICC is measured with outputs open with. V applied to all data inputs after a momentary ground followed by. V applied to. V POST OFFICE BOX 0 DALLAS, TEXAS
4 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = V, TA = C SNF SNF F MIN MAX MIN MAX MIN MAX fclock Clock frequency MHz high tw Pulse duration low tsu low Setup time, data before High or low Setup time, inactive state, data before high th Hold time, data after High or low Inactive-state setup time is also referred to as recovery time. switching characteristics (see Note ) PAAMETE FOM (INPUT) TO (OUTPUT) VCC = V, CL = 0 pf, L = 00 Ω, TA = C VCC =. V to. V, CL = 0 pf, L = 00 Ω, TA = MIN to MAX F SNF SNF MIN TYP MAX MIN MAX MIN MAX fmax MHz tplh tphl QorQ Q tplh Q tphl Q For conditio shown as MIN or MAX, use the appropriate value specified under recommended operating conditio. NOTE : Load circuits and waveforms are shown in Section. POST OFFICE BOX 0 DALLAS, TEXAS
5 IMPOTANT NOTICE Texas Itruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditio of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specificatio applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CETAIN APPLICATIONS USING SEMICONDUCTO PODUCTS MAY INVOLVE POTENTIAL ISKS OF DEATH, PESONAL INJUY, O SEVEE POPETY O ENVIONMENTAL DAMAGE ( CITICAL APPLICATIONS ). TI SEMICONDUCTO PODUCTS AE NOT DESIGNED, AUTHOIZED, O WAANTED TO BE SUITABLE FO USE IN LIFE-SUPPOT DEVICES O SYSTEMS O OTHE CITICAL APPLICATIONS. ILUSION OF TI PODUCTS IN SUCH APPLICATIONS IS UNDESTOOD TO BE FULLY AT THE CUSTOME S ISK. In order to minimize risks associated with the customer s applicatio, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applicatio assistance or customer product design. TI does not warrant or represent that any licee, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not cotitute TI s approval, warranty or endorsement thereof. Copyright 8, Texas Itruments Incorporated
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