Problem 01 X Y. Logic Testbank. Problem. Problems. Problem 1:
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1 This documet was created by me but that does t mea that I ow this cotet, so I m just sharig it like ayoe else would do, good luck - Sa'eed wad roblems roblem 01 roblem Logic Testbak roblem 1: 4-to-1 MUX, show o the right, ca be used to implemet arbitrary combiatioal logic fuctio of iput bits X ad Y. for each row i the table below, specify the values (0, 1 that should be assiged to iputs I0, I1, I2, ad I3 to implemet the logic fuctios listed i the first colum. XY= uctio I0 I1 I2 I3 X Y B (4 pts Below show how the 8-to-1 multiplexer ca be used to implemet the odd fuctio of four variables which is defied as: (w, x, y, z = w x y z I additio to the MUX, you may use NOT, OR, ad ND gates oly.
2 roblem 2: 8-to-3 priority ecoder is desiged to have the followig iput priority order (highest to lowest: I6, I4, I2, I0, I1, I3, I5, I7. or each row i the table below, eter the ecoder output (D2, D2, D0 that will be geerated for the two rows of iput values. I0 I1 I2 I3 I4 I5 I6 I7 D2 D1 D roblem 3: combiatioal circuit depeds o three iputs, B, ad C. The iput-output behavior of the circuit is show i the followig waveforms. Write the fuctio i miimum two level SO form. You must show all your work. No pts will be awarded for just writig the fial aswer.
3 roblem 4: (a (3 pts Usig oly four blocks, each of which is a half adders, desig a 4-bit combiatioal circuit icremeter. The iput is a 4-bit usiged umber X, {X3, X2, X1, X0, ad the output is Y, {Y3, Y2, Y1, Y0} such that Y = X + 1 with a carry bit C4 roblem 5: Implemet the followig Boolea fuctio usig 2-level NND-NND realizatio (x, y, z = (x+ y+z(x+ y+z usig miimum umber of NND gates. ssume complemets of the iput Boolea variables are available. B Covert the followig logic schematic diagram ito NOR-oly realizatio. You may use two-iput NOR gates ad iverters. ssume the complemets of all iput Boolea variables are NOT available. C Express the followig Boolea logic i a sum of product form. roblem 6: combiatioal circuit is specified by the followig two Boolea fuctios: 1(, B, C = m (0, 3, 6 2(, B, C = m(0, 4, 6, 7
4 Implemet the circuit (1 ad 2 with a decoder costructed with NND gates (show below usig exteral NND gates. iefficiet implemetatio (uecessary use of NND gates will ot receive full credits.
5 Solutio roblem 1: XY= uctio I0 I1 I2 I X Y
6 roblem 2: I 0 I 1 I 2 I 3 I 4 I 5 I 6 D 2 D 1 D roblem 3:
7
8 B C roblem 6: Sice the decoder is costructed with NND gates, we eed to implemet the fuctios as NND-NND (=ND-OR, a sum of miterm expressio. 2(, B, C= Π M (0, 4, 6, 7 = m (1, 2, 3, 5. (a,b,c, d,e
9 roblem 02 roblem roblem 2 sequetial circuit with two D-s ad B, oe iput X, ad oe output Z is show i the figure. Solve the followig: a derive the iput equatios D = DB = Z= b derive the state table reset State Iput Next State Output B X B Z c Derive the state diagram roblem 2 Suppose that Q1 = 1 ad Q2 = 0 is the iitial state of the two JK flip-flop circuit show. What is the state of the circuit after applyig two complete clock pulses?
10 Clk1 Clk2 Q1 Q0 roblem 3 Suppose that i the figure below the state of 3210 is 0111, fill i the table below by determiig the state of the four flip flops after each clock pulse ad for 4 clock pulses. Give that the serial iput SI 1001 is applied Iitial Clk1 Clk2 Clk3 Clk4 roblem 4 sequetial circuit has two JK flip-flops, a iput X, ad a output Y. The logic diagram of this circuit is show below. Complete the state table of the circuit which is also show below.
11 reset State (t B(t Next State: (t+1, B(t+1 Output, Y(t X = 0 X = 1 X = 0 X = 1 roblem 5 I the shift register circuit show i ig 1_a below, The followig was doe: ll lip lops where reset. The Serial Iput has the value "1", ad the a clock pulse was set. Q2 output was coected to the Serial Iput, as show below i ig 1_b. ill the followig table: Reset Clock Serial iput Q0 Q1 Q2 Q
12 roblem 5 (6 pts sequetial circuit has three D flip flops amed, B ad C; oe iput X, ad oe output Y. The state diagram of the circuit is show below. Desig the circuit by treatig the uused states as do't care coditios. Your desig should iclude: (a state table correspodig to the give state diagram (b Three simplified flip flop iput fuctios: D, D B, ad D C.
13 Solutio roblem 2: sequetial circuit with two D-s ad B, oe iput X, ad oe output Z is show i the figure. Solve the followig: a derive the iput equatios [3 marks] D = B + BX DB = X Z= B' X b derive the state table [6 marks, 1 per colum] reset State Iput Next State Output B X B Z c Derive the state diagram [3 marks]
14 0 / /0 1 / /0 1 /1 1 / / /0 roblem 2 Q1 Q0 Clk1 0 1 Clk2 1 1 roblem Iitial Clk Clk Clk Clk roblem 4:
15 roblem 5: Reset Clock Serial iput Q0 Q1 Q2 Q roblem 6: a. state table correspodig to the give state diagram. B C X B C Y D D B D C
16 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X b. Three simplified flip flop iput fuctios: D, D B, ad D C. Oe s simplified fuctio for the output Y : D = ' B' x D B = + C' x' + B C x D C = C x' + x + ' B' x' Y = ' B ' x + ' C' x
17 Quiz Quis 1 Quiz Sprig 2008 CE 231 Digital Logic Quiz 1-,B,C,D Name: Studet ID: Do the followig umber coversio(show your calculatios i the give space: ( = ( 2C9 16 ( = ( (3.16 = ( (1758 = ( (4710 = ( BCD = ( = ( 57 8 ( = ( 23C 16 ( = ( (5D.C16 = ( (2578 = ( (5410 = ( BCD = ( = ( 66 8 ( = ( 3C516 ( = ( (E7.D16 = ( (1578 = ( (6710 = ( BCD = ( = ( ( = ( ( = ( (C.B16 = ( (1358 = (9310 (7610 = ( BCD = ( = (1148
18 Evaluate the followig mathematics, kowig that the give umber are usiged biary: = = = = = = = =
19 Quiz Sprig 2008 CE Digital Logic Quiz 1-,B,C,D Name: Studet ID: Covert the followig umbers from the give base to the other three Decimal Biary Octal Hexadecimal C C D.B E E.5 List the biary ad hexadecimal umbers equivalet to the decimal umbers from 34 to 41. Decima l Biary Hexadec imal Decimal Biary Hexadec imal Decim al Biary
20 Note: lease show the aswers i the dedicated place.
21 Quiz 2 Quiz orm Sprig 2008 CE Digital Logic Quiz 2- Name: Studet ID: id the complemet of the followig Boolea expressios: a'b+b'c+abc (a+b'(b+c'(a'+b'+c' (a+b'+c(a'b'+c a'bc'+(a+bc' id the stadard SO/ OS from for each expressio: ab'c+a'b'+abc'd ab'cd'+ab'cd+a'b'c'd'+a'b'c'd+a'b'cd'+a'b'cd+abc'd a(a+b(a+c'
22 (a+b'+c'(a+b'+c(a+b+c'(a+b+c(a+b+c'(a+b+c(a+b'+c'(a+b+c'
23 Quiz orm B Sprig 2008 CE Digital Logic Quiz 2-B Name: Studet ID: id the complemet of the followig Boolea expressios: x'y+y'z+xyz (x+y'(y+z'(x'+y'+z' (x+y'+z(z'y'+x x'yz'+(z+yx' id the stadard SO/ OS from for each expressio: wx'y+w'x'+wxy'z wx'yz'+wx'yz+w'x'y'z'+w'x'y'z+w'x'yz'+w'x'yz+wxy'z x(x+y(x+z' (x+y'+z'(x+y'+z(x+y+z'(x+y+z(x+y+z'(x+y+z(x+y'+z'(x+y+z'
24 Quiz orm Uiversity of Jorda 2/4/2008 Dept. of Computer Egieerig Digital Logic Desig CE231 االسم : الرقم : Quiz # 2 Q1: Express the followig Boolea fuctio i: - Stadard SO ( otatio: = ( XY + Z ( Y + XZ = XY+XYZ+YZ+XZ = XYZ'+XYZ+X'YZ+XY'Z = (3,5,6,7 - Stadard OS ( Π otatio: = Π(0,1,2,4 Q2: Optimize the followig Boolea expressio usig a map: B + C + B C + B C
25 = ' + B + C'
26 Quiz orm B Uiversity of Jorda 2/4/2008 Dept. of Computer Egieerig Digital Logic Desig CE231 االسم : الرقم : Quiz # 2 Q1: Express the followig Boolea fuctio i: - Stadard SO ( otatio: = ( C + D ( + C D = C + CD + D + CD = CD' + CD + C'D + 'CD = (3,5,6,7 - Stadard OS ( Π otatio: = Π(0,1,2,4 Q2: Optimize the followig Boolea expressio usig a map: X Y + X Z + Y Z + X Y Z
27 = Y' + Z'
28 irst Exam ricess Sumaya Uiversity or Techology Computer Egieerig Dept Digital Logic Desig irst Exam (60 Miutes Dr. Kahhaleh, Dr. Qaralleh, Dr. bu Sharkh 15 Nov 2008
29 وقت المحاضرة : االسم Name: الرقم الجامعي : ID. Studet الشعبة 11-0:: الرقم التسلسلي في No.: Class Grade: 1. a / 2 b / 3 2. / 5 3. / 5 4. a / 3 b / 3 5. / 4 Total / 25
30 1. Use 8 bits (icludig the Sig to solve the followig problem: (2 t (3 ts s w e r: a Represet the value ( i Biary usig sig-magitude ad 2 s complemet forms. b erfom the subtractio ( usig 2 s complemet method. What is the value of the carry output? What does it mea ad what do we do with it? art (a: Sig-Magitude orm: s Complemet orm: (1 t art (b: (1 t (2 ts
31 The value of the carry output = This value of the carry meas: What do we do with the carry? (1 t
32 2. (5 ts Simplify the followig expressio to the least umber of literals: ( ' B' ' C' ' ( D'( ' E'' or B C D ( E مالحظة: المعادلتان مكتوبتان بطريقتين مختلفتين لكنهما تمثالن نفس المعادلة. اختر واحدة منهما فقط وحلها.
33 s w e r: (5 ts
34 3. You are give 4 gates oly: 1 ND, 1 NND, 1 OR, ad 1 NOR. (5 ts Usig these gates, draw the logic diagram for the Boolea fuctio: ( x, y, z ( x y z ( x y z
35 s w e r: (5 ts
36 4. (3 ts a Write the simplified SO expressio for the show K- map. b Write the simplified OS expressio for the show K- map. D C (3 ts s w e r: art (a: (3 ts
37 (3 ts art (b:
38 5. ill the K-map for the followig Boolea fuctio without circlig the 1 s i groups: (4 ts (, B, C, D BC B D BC BC D مالحظة: ضع الواحدات على الخريطة وال تضيع وقتك في ضم المجموعات أو محاولة اختصار الناتج.
39 s w e r: (4 ts
40 ricess Sumaya Uiversity for Techology Computer Egieerig Dept. irst Exam Solutio Digital Logic Desig 15 Nov Use 8 bits (icludig the Sig to solve the followig problem: a Represet the value ( i Biary usig sig-magitude ad 2 s complemet forms. swer: (1 t (1 t Sig-Magitude orm: ( = ( s Complemet orm: ( = ( b erfom the subtractio ( usig 2 s complemet method. swer: (25 10 = ( ( = ( What is the value of the carry output? What does it mea ad what do we do with it? swer: Carry = 1 swer: The result is positive. Igore it (2 ts (1 t
41 2. Simplify the followig expressio to the least umber of literals: '' ' '( ( ' ' ' ' ' ( E D C B s w e r: (5 ts D BC D BC E D BC C B E D BC C B E D C B E D C B ' ' ' (1 ( ' '' ' ( ( ' ( ( '' ' '( ( ' ' ' ' ( ' ' ' ( or ( E D C B D BC D BC E D BC C B E D BC C B E D C B E D C B (1 ( ( ( ( ( ( 3. You are give 4 gates oly: 1 ND, 1 NND, 1 OR, ad 1 NOR. Usig these gates, draw the logic diagram for the Boolea fuctio: ( (,, ( z x y z x y z y x
42 s w e r: z x y z (5 ts 4. s w e r: (3 ts a Write the simplified SO expressio for the show K-map. C BD CD b Write the simplified OS expressio for the show K-map. C D C D
43 s w e r: BC D ( B C ( D (3 ts 5. s w e r: ill the K-map for the followig Boolea fuctio without circlig the 1 s i groups: (, B, C, D BC B D BC BC D C (4 D
44 ts
45 Secod Exam ricess Sumaya Uiversity or Techology Computer Egieerig Dept Digital Logic Desig Secod Exam (75 Miutes Dr. Kahhaleh, Dr. Qaralleh, Dr. bu Sharkh 20 Dec 2008 وقت المحاضرة : االسم Name: 11-0::1 1-11
46 الرقم الجامعي : ID. Studet الشعبة الرقم التسلسلي في No.: Class Grade: 6. / 5 7. / 6 8. / 4 9. / / 5 Total / 25
47 6. (5 ts alyze the show circuit ad determie the output Boolea fuctio as sum of miterms expressed as Σ (1, 2, 3, 4... etc. B C s w e r: (, B, C = Σ ( (6 ts Redraw the show circuit usig NND gates oly. Note: Use, B, C as iputs ad do ot use, B, C. B D C E
48 s w e r:
49 8. (4 ts s w e r: The show circuit was desiged to perform the arithmetic operatio S = X 2 Y + 3. X ad Y are 3-bit operads, i.e. X = X 2 X 1 X 0 ad Y = Y 2 Y 1 Y 0. Complete the desig by coectig all 20 iput lies, some of them to X ad Y, ad the rest to 0 or 1. Note: You must ot leave ay iput lie without a coectio. أو "صفر" أو "واحد". Y 2 Y 1 Y 0 أو Xمالحظة: 2 X 1 X 0 يجب توصيل جميع اسالك المداخل 11 سلك( إما بقيم B 3 B 2 B 1 B 0 C y Biary dder C i S 3 S 2 S 1 S B 3 B 2 B 1 B 0 C y Biary dder C i S 3 S 2 S 1 S B 3 B 2 B 1 B 0. C y Biary dder C i S 3 S 2 S 1 S 0 S 3 S 2 S 1 S 0 9. (5 ts Implemet the Boolea fuctio show below usig some of the followig compoets oly: oe 4-to-1 multiplexer oe ND gate, oe OR gate ad oe Iverter B BC BC
50 s w e r: MUX I 0. I 1. I 2 Y I 3. S 1 S 0
51 10. (5 ts or the show logic diagram, determie for each iput combiatio of X, Y ad Z the value of each output, Y 7 through Y 0. Be careful with the order of the variables, i.e. the most sigificat ad least sigificat bits. X Y X Y Z S I0 MUX I1 I0 I1 I2 E 3-to-8 decoder Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
52 s w e r:
53
54 Secod Exam Solutio ricess Sumaya Uiversity for Techology Computer Egieerig Dept Digital Logic Desig 20 Dec (5 ts alyze the show circuit ad determie the output Boolea fuctio as sum of miterms expressed as Σ (1, 2, 3, 4... etc. swer: B C (,B,C= Σ(2, 4, 5, 7 7. Redraw the show circuit usig NND gates oly. (6 ts swer: B C D B D C E E
55 8. The show circuit was desiged to perform the arithmetic operatio S = X 2 Y + 3. X ad Y are 3-bit operads, i.e. X = X 2 X 1 X 0 ad Y = Y 2 Y 1 Y 0. Complete the desig by coectig all 20 iput lies, some of them to X ad Y, ad the rest to 0 or 1. swer: (4 ts 1 0 Y 2 Y 1 Y 0 0 Y 2 Y 1 Y X 2 X 1 X B 3 B 2 B 1 B B 3 B 2 B 1 B 0 C y Biary dder C i C y Biary dder C i S 3 S 2 S 1 S 0 S 3 S 2 S 1 S B 3 B 2 B 1 B 0. C y Biary dder C i S 3 S 2 S 1 S 0 S 3 S 2 S 1 S 0
56 9. Implemet the Boolea fuctio, show below, usig the followig compoets oly: oe 4-to-1 multiplexer oe ND gate, oe OR gate ad oe Iverter B BC BC swer: (5 ts 1 C 0 C MUX I 0. I 1. I 2 Y I 3. S 1 S 0 B 10. or the show logic diagram, determie for each iput combiatio of X, Y ad Z the value of each output, Y 7 through Y 0. Be careful with the order of the variables, i.e. the most sigificat ad least sigificat bits. X Y X Y Z S I0 MUX I1 I0 I1 I2 E Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 swer: 3-to-8 decoder (5 ts
57
58 ial Exam ial logic 2012 Q1:Covert D clocked. to JK clocked.? Q2:Sequetial circuit 2 iputs,b exteral iput x,j=x JB=x K=B' KB= awhat ext, ext B? bdraw the state diagram? Q3:implemet the followig fuctios usig decoder? 1= 2= 3= Q4:Desig 16 to 1 Multiplexer usig other Multiplexers? Q5:express this fuctio with oe x-or,oe or (x'+y'(x xor z+(x+y(x xor z'
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