Digital Logic and Design (Course Code: EE222) Lecture 0 3: Digital Electronics Fundamentals

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1 Idia Istitute of Techology Jodhpur, Year Digital Logic ad Desig (Course Code: EE222) Lecture 0 3: Digital Electroics Fudametals Course Istructor: Shree Prakash Tiwari sptiwari@iitj.ac.i Office: 20, Phoe: 356 Webpage: Course related documets will be uploaded o Note: The iformatio provided i the slides are take form text books Digital Electroics (icludig Mao & Ciletti), ad various other resources from iteret, for teachig/academic use oly Digital Logic ad Desig Objectives: To itroduce the basic cocepts of digital system ad the use of Boolea algebra i logic aalysis ad desig Uderstad the priciples ad methodology of digital logic desig at the gate ad switch level, icludig both combiatioal ad sequetial logic elemets. To itroduce basic tools of logic desig ad provide hads o experiece desigig digital circuits ad compoets through simple logic circuits to hardware descriptio laguage 2

2 Digital Logic ad Desig Learig Outcomes: Apply Boolea algebra ad other techiques to express ad simplify logic expressios. Aalyze ad desig combiatioal ad sequetial digital systems. Use differet techiques amog them a hardware descriptio laguage ad a programmig laguage, to desig digital systems. 3 Digital Logic ad Desig Course Cotets: Number system: biary umbers, s ad 2s complemet, arithmetic operatios i iteger ad floatig poit systems; ASCII, biary ad gray codes; Boolea algebra: Boolea Equatios, Miimizatio of Boolea fuctios; Desigig i combiatioal Circuits it usig gates ad/or Multiplexers l Combiatioal circuit: Adder, decoder, multiplexers, code coverters (biary, gray ad BCD); Sequetial circuit: Bistable, Moostable, latches ad flip flops, couters (biary, rig ad Johso), shift register, timer circuits; Hardware Descriptio Laguages: Combiatioal Logic, Structural Modelig, Sequetial Logic, More Combiatioal Logic, Fiite State Machies, Parameterized Modules, Testbeches Digital IC families: DTL, TTL, ECL, MOS, CMOSadtheir iterfacig. ADC ad DAC: Sample ad hold circuits, ADCs, DACs. Memories: semicoductor memories, PALs, PLAs ad FPGAs; Pipeliig ad timig issues, PROMs; 4 2

3 Digital Logic ad Desig Laboratory: Laboratory will cotai experimets from followig topics: i) Familiarizatio with logic gates ad logic buildig. ii) Ecoders ad decoders iii) Adder circuits: half adder ad full adder iv) Flip flops adcouters v) Latches ad memories vi) Seve segmet display vii) Arithmetic logic circuits viii) Digital to aalog coverters ix) Aalog to digital coverters x) Serial commuicatio xi) AND, OR ad EX_ OR gates usig Nad (7400) gates; BCD to 6 3 Code coverter; 6 3 to Gray Code coverter; full adder circuit usig AND, OR ad XOR gates; a 4 Bit comparator usig logic gates; Pseudo radom bit geerator; 4 bit ripple carry adder; Master Slave J K Flip Flop usig Logic gates; Bi directioal couter usig J K Flip flops; Priority ecoder, multiplexer ad decoder; VHDL code for simulatio of a 4 Bit fast look ahead carry adder; VHDL code for simulatio of a 8 bit siged iteger multiplier. 5 Digital Logic ad Desig Tetative Assessmet: First Mid Semester Exam = 20%, Secod Mid Semester Exam = 20%, Ed Semester Exam = 35%, Laboratory: 20%, Quizzes: 5% Referece Books M. Morris Mao, Michael D. Ciletti, "Digital Desig: With a Itroductio to the Verilog HDL", 5th editio, Pretice Hall of Idia, 202 Roald J. Tocci, Neal Widmer, Greg Moss, Digital Systems: Priciples ad Applicatios, 0th editio, Pearso, D. M. Harris ad S. L. Harris, Digital Desig ad Computer Architecture, Secod Editio, Morga Kuffma 6 3

4 Evolutio of Electroic Devices 7 Itegrated Circuits 22 m CMOS 8 4

5 Before Electroics Era 9 After Electroics Revolutio 0 5

6 There are two way of represetig the umerical value of quatities: aalog digital Aalog represetatio: A quatity is represeted by a voltage, curret or meter movemet that is proportioal to the value of that quatity Example : Automobile speedometer Audio microphoe Aalog quatities ca vary over a cotiuous rage of values 6

7 Digital represetatio: The quatities are represeted ot by proportioal quatities but by symbols called digits Example :. Digital watch It provides the time of day i the form of decimal digits which represet hours ad miutes (ad sometimes secods) The digital represetatio of the time of day chages i discrete steps Advatages of Digital Techiques. Digital systems are easier to desig as circuits used are oly switchig circuits havig oly HIGH ad LOW rage 2. Iformatio storage iseasy. 3. Accuracy ad precisio are greater 4. Operatio ca be programmed. 5. Digital circuits are less affected by oise, as the spurious fluctuatio i voltage (oise) are ot as critical i digital systems became the exact value of a voltage is ot importat. Limitatio of Digital Techiques The real world is maily aalog 7

8 Desig Hierarchy SYSTEM + MODULE GATE CIRCUIT S + G DEVICE D + 5 Digital Number System May umber systems are i use i digital techology The most commo are Decimal Biary Octal Hexadecimal 8

9 Numbers Every umber system is associated with a base or radix A positioal otatio is commoly used to express umbers ( aaaaaa) r ar ar ar ar ar ar The decimal system has a base of 0 ad uses symbols (0,,2,3,4,5,6,7,8,9) to represet umbers (2009) (23.24) A octal umber system has a base 8 ad uses symbols (0,,2,3,4,5,6,7) (2007) What decimal umber does it represet? (2007) A hexadecimal system has a base of 6 Number Symbol A B 2 C 3 D 4 E 5 F (2 BC 9) 2 6 B 6 C How do we covert it ito decimal umber? 0 (2BC9)

10 Example : the umber Most Sigificat Bit (MSB) Biary Poit Least Sigificat Bit (LSB) A Biary system has a base 2 ad uses oly two symbols 0, to represet all the umbers 2 0 (0) Which decimal umber does this correspod to? 0 (0) (K) (M)

11 Covertig decimal to biary umber Covert 45 to biary umber (45) bb... b b 2 b 2... b 2 b 0 Divide both sides by b 2 b 2... b 2 b b 2 b 2... b 2 b b b 2 b 2... b 2 b 0.5 b b 2 b 2... b 2 b Divide both sides by b b... b2 2 b 0.5 b 0 2 b 2 b 2... b 2 b b 2 b 2... b 2 0.5b b b 2 b 2... b 2 b

12 5 b 2 b 2... b 2 b b 2 b 2... b 2 0.5b b b 2 b 2... b 2 b b 2 b 2... b 2 0.5b b b 5 (45) bbbbbb Covertig decimal to biary umber Method of successive divisio by 2 45 remaider =

13 Covert (53) 0 to octal umber system Divide both sides by 8 (53) ( bb... b) (53) b 8 b 8... b8 b b0 b b8 b 8... b b remaider = (23) 8 Covertig decimal to biary umber Covert (0.35) 0 to biary umber (0.35) 0 0. b b 2b 3... b b 2 b 2... b How do we fid the b b 2 coefficiets? Multiply both sides by b b 2... b 2 b b 2 b 2... b

14 0.7 b 2 b 2... b Multiply both sides by 2.4 b b 2... b Note that ½+/4+/8+ b b 2 b 2... b b b 0 3 b 4 b Covertig decimal to biary umber 0.25 =? 0.25 = (.00) x2 x2 x =? = (.0) x2 x2 x2 x2 4

15 Biary umbers Most sigificat bit or MSB 0000 Least sigificat bit or LSB This is a 0 bit umber decimal 2bit 3bit 4bit 5bit Biary digit = bit N bit biary umber ca represet umbers from 0 to 2 N Covertig Biary to Hex ad Hex to Biary ( bbbbbbbb) ( h, h) b 0 Hex b 2 b 2 b 2 b 2 b 2 b 2 b 2 b h6 h ( b 2 b 2 b 2 b )2 ( b 2 b 2 b 2 b ) h6 h h h0 (000) (0)(00) ( B 3) b (00) ()(00) (33) b Hex Hex Number Symbol 0(0000) 0 (000) 2(000) 2 3(00) 3 4(000) 4 5(00) 5 6(00) 6 7(0) 7 8(000) 8 9(00) 9 0(00) A (0) B 2(00) C 3(0) D 4(0) E 5() F ( EC) (0)(00) (000) Hex b 5

16 Biary Additio/Subtractio Complemet of a umber 9 s complemet Decimal system: 0 s complemet 9 s complemet of digit umber x is 0 x 0 s complemet of digit umber x is 0 x 9 s complemet of 85? 's complemet of 23 = 's complemet of 23 = 9's complemet of

17 Complemet of a biary umber Biary system: s complemet 2 s complemet s complemet of bit umber x is 2 x 2 s complemet of bit umber x is 2 x s complemet of 0? s complemet is simply obtaied by flippig a bit (chagig to 0 ad 0 to ) 's complemet of 000 =? 's complemet of 00 = 's complemet of 's complemet of 000 = Leaveall all least sigificat 0 s 0s asthey are, leave first uchaged ad the flip all subsequet bits

18 Advatages of usig 2 s complemet x x 2 Adder S CY Ca we carry out Y = X X 2 usig such a adder? 2 x x,x 2 : N bit umbers S Y = S if Sig = 0 Y = 2's Complemet of S if Sig = Y x 2 2's Complemet Adder CY Sig = 0 for positive psotive umbers = for egative umbers Sig 2 N x 2 ( CY, S) x 2 N x2 Note that carry will be there oly if x x 2 is positive as 2 N is N+ bits ( followed by N zeros) Advatages of usig 2 s complemet x x,x 2 : N bit umbers S Y = S if Sig = 0 Y = 2's Complemet of S if Sig = Y Adder 2's Complemet CY Sig x 2 Sig = 0 for positive psotive umbers = for egative umbers 2 N x 2 ( CY, S) x 2 N x2 Note that carry will be there oly if x x 2 is positive as 2 N is N+ bits ( followed by N zeros) A zero carry implies a egative umber whose magitude (x 2 x ) ca be foud as follows: S x x 2 N 2 N 2'scomplemet of S 2 ( x 2 x ) x x N 2 2 8

19 Example x = S Y = S if Sig = 0 Y = 2's Complemet of S if Sig = 000 Y x 2 =00 6 2's Complemet 00 Adder CY Sig Sig = 0 for positive psotive umbers = for egative umbers Example x = S Y = S if Sig = 0 Y = 2's Complemet of S if Sig = 000 Y x 2 =00 2's Complemet 0 00 Adder CY Sig 0 Sig = 0 for positive psotive umbers = for egative umbers It makes sese to use adder as a subtractor as well provided additioal circuit required for carryig out 2 s complemet is simple 9

20 Subtractio usig 0 s complemet x,x 2 : N digit umbers x 8 x 2 0's Complemet 3 0 3=7 Adder 5 S CY Y = S if Sig = 0 Y = 0's Complemet of S if Sig = Sig = 0 for positive psotive umbers = for egative umbers 5 Y Sig 0 This way of subtractio would make sese oly if subtractig a umber x 2 from 0 N is much simpler tha directly subtractig it directly from x Represetig positive ad egative biary umbers Oe extra bit is required to carry sig iformatio. Sig bit = 0 represets positive umber ad Sig bit = represets egative umber decimal Siged Magitude decimal Siged s complemet decimal Siged 2 s complemet

21 If we represet umbers i 2 s complemet form carryig out subtractio is same as additio x x,x 2 : N bit umbers S Y = S if Sig = 0 Y = 2's Complemet of S if Sig = Y Adder 2's Complemet CY Sig x 2 Sig = = 00 for for positive psotive umbers = for egative umbers S Aswer is i 2 s x complemet form x 2 Adder CY x,x 2 : N bit umbers i 2's complemet Example S x x 2 Adder CY x,x 2: N bit umbers i 2's complemet s complemet is 00 = 3 2 s complemet is 0 = 7 2

22 CODES Whe umbers, letters or words are represeted by a special group of symbols, we say that they are beig ecoded ad the group of symbols is called code. Biary Coded Decimal Code (BCD) If each digit of a decimal umber is represeted by its biary equivalet, the result is a code called biarycoded decimal. Sice a decimal digit ca be as large as 9, 4 bits are required to code each digit. Ex. 874 = (BCD) 22

23 Gray code It belogs to a class of codes called miimum chage codes, i which oly oe bit i the code groups chages whe goig from oe stage to the ext. The Gray code is a uweighted code. So, this code is ot suited for arithmetic operatio but fids applicatio i iput/output devices ad some types of Aalog to Digital i Coverters (ADCs). Biary Equivalet Gray Code

24 Alphaumeric Codes A alphaumeric code represets all of the various characters ad fuctios that are foud i a stadard typewriter (or computer) keyboard. ASCII Code: The most widely used alphaumeric code, the America stadard code for Iformatio Iterchage as is used i most micro computers ad miicomputers ad i may maiframes. The ASCII code is a 7 bit code ad so it has 2 7 =28 possible code groups. Character 7- Bit ASCII Hex A B C Z 000 5A a, b, blak, etc. 24

25 Example : Whe writig a BASIC Programme, istructio GO TO 25 G 0000 O 000 T O is added because the codes must be stored as bytes (8bits). This addig of a extra bit is called paddig with 0s. Boolea Algebra Algebra o Biary umbers A variable x ca take two values {0,} 0 False No Low voltage Basic operatios: AND: y = x. x 2 Y is if ad oly if both x ad x 2 are, otherwise zero True Yes High voltage Truth Table x x 2 y

26 Basic operatios: OR: y = x + x 2 Y is if either x ad x 2 is. Or y= 0 if ad oly if both variables are zero x x 2 y NOT: y = x x 0 y 0 Digital Cot.. What ext 52 26

Digital Logic and Design (Course Code: EE222) Lecture 1 5: Digital Electronics Fundamentals. Evolution of Electronic Devices

Indian Institute of Technolog Jodhpur, Year 207 208 Digital Logic and Design (Course Code: EE222) Lecture 5: Digital Electronics Fundamentals Course Instructor: Shree Prakash Tiwari Email: sptiwari@iitj.ac.in