Physics 310 Lecture 9a DAC and ADC

Transcription

1 Lecture 9a ad Mo. 3/19 Wed. 3/1 Thurs. 3/ Fri. 3/3 Mo. 3/6 Wed. 3/8 Thurs. 3/9 h 14.1,.6-.10; pp (Samplig Frequecy); 1.6: & More of the same Lab 9: & More of the same; Quiz h 14 Project: ompoet Shoppig eview Exam Sr. Semiar Presetatios(quiz poits) Project Proposal HW 9: * & h 14 Pr 13*, 17* Lab 9 Notebook Project Progress eport (due at the begiig of class) oucemets: Project Proposals due Today Study List for Quiz #9: alog-to-digital coversio () How aalog iput ad digital output are related oversio times Nyquist criterio samplig rate igital-to-aalog coversio () Equatio List: Nyquist criterio: f sample f max Hadout: Lab #9 circuits Flash ( bit) Project order list 14.1 Itro: emember the very first readig for this class, it was about the array of measuremet devices ad actuators thigs that traslate a physical property like a legth, a time, a temperature, a pressure, ito a voltage, or traslate a voltage ito a force, a displacemet, ll of these devices deal with iheretly cotiuous properties ad so produce or respod to a cotiuum of voltages. alog circuitry is called for. O the other had, I do t have to sell you o the power of computers ad other digital devices whe it come to aalyzig iformatio, ad these are iheretly digital. So, if you wat to brig the power of a computer to bear o a measuremet or maipulatio task, the you eed to either covert the alog iformatio to igital iformatio or vice versa. That s the use of s (igital to alog overters) ad s (alog to igital overters). The mai poit of today s readig is that these thigs ca be doe, but you geerally wo t desig a circuit to do them istead you ll use I s. Still, it s importat to kow basically how they work, so you use them correctly / choose the right oes for your applicatios.

2 Lecture 9a ad You might imagie that s ad s are pretty mysterious ad sophisticated thigs. I actuality, most operate o pretty simple priciples. For digital to aalog essetially a adder where each bit lie s value cotrols a gate that does/does ot add i the correspodig voltage. For aalog to digital essetially comparators are used to determie whether each bit should be o or off. igital (iary) ackgroud from h 11 While it was i the readig for h 11, we did t really discuss biary, ad a appreciatio of it is ecessary for a appreciatio of what follows. So we ll pause to catch up o that Numberig Systems It s quite obvious that our old cotiuous-math circuits could represet ad maipulate a cotiuous rage of umeric values: the sigal ca be a voltage of or or That s particularly importat for smooth operatios like itegratio ad differetiatio. There are dowsides though; for example, adders ad itegrators ca t distiguish betwee sigal ad oise they add / itegrate whatever their iput is. log those lies, if you wat to represet umber to seve digits, you eed to have a sigal-to-oise ratio of 10 7! Now, it s quite obvious that our ew discrete-math circuits ca represet ad maipulate 0 s ad 1 s, but what may ot be immediately obvious is that, with 1 s ad 0 s they ca represet ay discrete umber to however may digits you re willig to hadle; the catch is that rather tha beig able to ecode the value i oe cotiuously varyig sigal, you ecode it i N discretely varyig sigals. We just have to represet that value i iary. ecimal a.k.a. ase 10 First let s quickly look at how we represet umbers i ecimal, the we ll see that it s ot so very differet i iary. The two freedoms we have for represetig differet umbers are symbols ad placemet of those symbols. First we step through our basis of te available symbols, 0-9, ad the, if that s ot eough, we add a place ad do it agai. So, whe we write 1,45 we ve ecoded the umeric value i the specific placemet of specific symbols 10 4 Te-thousads place 10 3 Thousads place 10 Hudreds place 10 1 Tes place 10 0 Oes place N M L K J meas N 10 4 M 10 3 L 10 K 10 1 J 10 0 where N,M,L,K,J ca be ay umeral from 0 to 9

3 Lecture 9a ad iary a.k.a. ase gai, we ve got the freedoms of symbols ad placemet with which to ecode a umber. Now, i iary we oly have a basis of two symbols, 0 ad 1. So rather tha havig to move up to the ext place after every 10 th symbol, we have to do it after every d symbol. 4 Sixtees place 3 Eights place Fours place 1 Twos place 0 Oes place N M L K J meas N 4 M 3 L K 1 J 0 Where N, M, L, K, J ca be 0 or 1. So, for example = = = 19 ocabulary it = oe biary digit (which meas oe electroic lie carryig oe sigal) yte = eight biary digits (which meas eight electroic lies, each carryig oe sigal) With eight places, largest value is = = =55 ad of course the smallest is From 0 up to 55, there are 56= 8 discrete possible values. You may have ecoutered this laguage 8 bit, 16 bit, 3bit ad 64bit whe people talk about computers. For example, you ca set your moitor to 16bit or 3bit color: 16 =65,536 shades or 3 =4,94,967,96 shades. 64bit logic meas that a value ca be represeted across 64 discrete lies. We ll get more experiece with this later, but just to relate this biary stuff back to our logic gates, here s a really simple operatio: addig two oe-bit umbers ad ecodig that as a twobit umber: s 1 s 0 Say = 0 ad = 0,the = zero Say = 1 ad = 0, or the other way aroud, the = oe

4 Lecture 9a ad Say = 1 ad = = two 14.6 igital to-alog overters: s Weighted urret Source Here s a very simple. Say you have a 4-bit sigal that s supposed to represet a umeric value i biary with four lies:. 1 s place s place 4 s place 8 s place oceptually, whe we traslate from a biary represetatio to a decimal represetatio, of, say That would represet 9. We add 1 8 (because those are the two lies that are Hi) to get 9. The the simple circuitry aalog is to have a adder that, usig some switches, decides whether or ot to add 1 to to 4 to 8: -10 1k k 800 4k - 8k The little boxes represet trasistor switches. For example, whe is Hi, the bottom switch is coected. So, if we have The the circuit is essetially

5 Lecture 9a ad k 8k So, out 8 10 i.1 1 f i. f Practical isadvatage: wide rage of resistors must be balaced ad a wide rage of currets pass through the switches which are, i practice, trasistors. The curret through the switch for the least sigificat bit (lie i this example) may be fairly large ad thus the capacitace across that switch could be fairly large which meas the switch could be slow. other issue is that resistors of differet values have to be balaced just right, ad that s hard to achieve. related approach would be usig curret sources istead of resistors. Of course, that s i effect what we re doig i the example above. - 8i 4i i i - f out f i f where i f is the sum of whichever currets are switched i. Note that my versio has a egative voltage supply; that s so out will be positive. lteratively, if the voltage supply is positive, out will be egative. The book gives a practical realizatio of a similar circuit (but with a positive voltage lie) usig trasistors ad diodes for the switches. Oe of the switched curret sources is essetially i Equivalet to 1. - Ladder Method Here s a variatio o the theme we re workig with; it addresses oe of the key issues the difficulty of balacig umptee differet resistors. This circuit maages to use just two differet resistor values: ad. Note: I ve tried to make the geometry more similar to that which we ve already see i our adders, but the logic is the same as i the book s versio.

6 Lecture 9a ad ref (d) (c) (b) - (a) So, how does this work? (Followig Faissler p ) 1) egardless of the positio of the switch, the right ed of each coects to groud (or a virtual groud thaks to the op-amp.) So the amout of curret passig through ay oe of these resistors is isesitive to the positio of ay of the switches. ) Just cosider the bottom braches, below ad to the right of poit (a). These two resistor are i parallel to each other, both coect (a) to groud. So, from the perspective of poit (a), there might as well just be a sigle resistor to groud. (a) Equivalet to (a) ut if that s true, the from poit (b) s perspective the circuit below ad to the right of it is equivalet to (b) d thus equivalet to (b)

7 Lecture 9a ad itto for poits (c) ad (d) ad, should we exted this circuit by addig more ad more braches, it would be true for their poits (e), (f), The moral is that each of these juctio poits sees itself as beig just 1 above groud whe it looks dowstream. Now, what does each poit see whe it looks up stream? 3) Now, poit (d) s voltage is clearly d = ref. a. The, from the perspective of poit (c), it s i the middle of a voltage divider so c= ½ d = ½ ref ref d = re (d) f (c) b. Similarly, from the perspective of poit (b), it s i the middle of a voltage divider so b = ½ c = ½½ ref = ¼ ref. c =1/ ref (c) (b) c. d the, of course, from the perspective of poit (a), it s i the middle of a voltage divider so a = ½ b =½ ¼ ref = 1 / 8 ref. b =1/4 ref (b) (a) Okay, labelig these poits with their voltage values, we ca see that we have somethig fairly simple.

8 Lecture 9a ad ref ref ½ ref ¼ ref - 1 / 8 ref The output is the just that of a adder with the appropriate iput voltages switched i ( ) ( ) ( ) ( out out ref ref ref 4 ref 8 ref ) Where,,, ad are either 1 or 0, depedig o whether their switches make the coectios. If ref = -16, the out has the value equivalet to the biary umber represeted by. out.max. For future referece, otice what the maximum output value is: out.max More geerally, if we had data lies / bits, the maximum output would be 1 out. max ref Multiplyig ad e-glitchig s The format of my fial expressio for out gives you a sese of why the - Ladder is classified as a multiplyig the output is the product of a referece voltage ad the logic ecoded i the digital sigal. eglitchig s are relatively expesive they largely compesate for dips i the sigal that occur whe a switch is switched.

9 Lecture 9a ad Summary: ommercial s feature the ecessary resistor etworks, the feedback resistor, f, ad sometimes the referece voltage source, but they do ot geerally cotai the op-amp. For example, ref L K J I H G F E igital gd fb f alog gd OUT1 - p.s. the i this part s ame are the iitials of the compay that makes it, alogue evices, ot a referece to the fuctio it performs that iformatio is mysteriously coveyed by the oversio: If a has digital lies, i.e. bits, comig i, the the largest value it ca represet is with all of them high. I simple biary, that correspods to a value of -1. Where does the -1 come from? osider this example: we have 4 bits so the largest biary umber is = 148=15=16-1= 4-1. The same thig happes i decimal: what s the largest umber that a - digit decimal display ca represet? 99 = = o yway, if this value would yield a full-scale output, the we ve got a coversio factor of out.max out Itegeri Itegeri.max Now, as we saw for the ladder scheme, out.max out Itegeri 1 1 out. max ref that meas that ref out Itegeri Two key qualities by which differet s are distiguished from each other are their resolutio ad their speed. esolutio: Ofte oe says that the resolutio of a or of a is the umber of bits it hadles,. This largely determies how smoothly the output of a ca vary or how small a differece a ca resolve. Sice the possible digital values are

10 Lecture 9a ad itegers, (1,, 3, ), obviously the steps i cosecutive digital values are size 1. The correspodig steps i the aalog output values are out.mi Itegeri.mi 1 out.mi o So that s the smallest differece this ca resolve. To put a value to that, a 1-bit with a 10 referece could output values i steps of.4m. For may purposes, that s as good as zero; it s as good as beig able to output a cotiuum of values. Settlig Time: This is the time it takes for a iput value to propagate through to the iteded output value. Geerally, it s o the order of s to s.