A Proposed Capacitive Position Sensor Timing Synchronization and Distribution Solution. Ben Abbott May 9, 2014 G v1

Size: px
Start display at page:

Download "A Proposed Capacitive Position Sensor Timing Synchronization and Distribution Solution. Ben Abbott May 9, 2014 G v1"

Transcription

1 A Proposed Capacitive Position Sensor Timing Synchronization and Distribution Solution Ben Abbott May, 0 G00-v

2 The Problem From aligo LLO Logbook report 00. Orange trace is ITMX with all chambers CPSs on, Blue trace is ITMX with the other two chambers turned off. G00

3 The Temporary Solution J 0 D Connector STS-_U+ STS-_U- STS-_V+ STS-_V- STS-_W+ STS-_W- STS-_X+ STS-_X- STS-_Y+ STS-_Y- STS-_Z+ STS-_Z- J 0 D Connector J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out STS-_Z- Out 0 J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out STS-_Z- Out 0 STS-_X+ TP C UF C UF - + UA ADARZ A TP Out+ R 0 OHM STS-_X+_Out D Connector J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out 0 STS-_Z- Out D Connector J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out 0 STS-_Z- Out TP Out- STS-_X-_Out STS-_X- TP B UB ADARZ R 0 OHM STS-_Z+ TP C UF C + UA ADARZ R A 0 OHM TP0 Out+ STS-_Z+_Out D Connector D Connector UF J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out STS-_Z- Out 0 J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out STS-_Z- Out 0 STS-_Y+ TP + C UF UA ADARZ R A 0 OHM TP Out+ STS-_Y+_Out TP Out- STS-_Z-_Out STS-_Z- TP - UB ADARZ B R 0 OHM D Connector D Connector C R R Res Res 00K 00K R Res 00K R Res 00K Repeat(STS,,) STS-_Dist_Channel.SchDoc STS-_X+ Repeat(STS-_X+_Out) STS-_X- Repeat(STS-_X-_Out) STS-_Y+ Repeat(STS-_Y+_Out) STS-_Y- Repeat(STS-_Y-_Out) STS-_Z+ Repeat(STS-_Z+_Out) STS-_Z- Repeat(STS-_Z-_Out) STS-_X+ STS-_X- STS-_Y+ STS-_Y- STS-_Z+ STS-_Z- STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out STS-_Z- Out J STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out 0 STS-_Z- Out D Connector J0 STS-_X+ Out STS-_X- Out STS-_Y+ Out STS-_Y- Out STS-_Z+ Out 0 STS-_Z- Out D Connector TP Out- STS-_Y- TP UF - UB ADARZ B R 0 OHM STS-_Y-_Out R R Res Res 00K 00K +Prot D N0 TP +Vin L mh, choke C uf, V Vin C 0.uF TO- D N00 U +V Power Interfaces and Regulation TP +V + + C uf, 0V +Sw -Sw K +Prot Relay-SPST D Diode P Header -Sw +Sw K -Prot Relay-SPST D Diode P Header Distribution Channels ADs Board Power +Sw P -Sw Header H TP -V U - L Vin -V mh, choke D C0 uf, V + C TO- + C TP.uF, V uf, V N0 -Vin -Prot P LED A LED K Header WM00 P LED A LED K Header WM00 R K R K +Sw -Sw TP T STS- Distribution Chassis G00

4 The Temporary Solution G00

5 Preliminary Results You can find attached sample spectra for the CPS sensors of all BSC ISIs. In orange are the measurements from last Wednesday night when all ISIs had different masters ("comb reference"), in black are the measurements from Sunday night with both ITMY and BS on the same master and ITMX still running, and in any other colors are the measurements from last night. In all cases, those measurements were taken with St ISI isolated, St only damped. One can see that there is no more comb visible on those spectra! From aligo LLO Logbook Report 0 G00

6 Problems with the STS- Dist. Approach ADs are analog OpAmps, and are not fast enough to recreate there high-frequency square pulses. The waveforms produced are ugly, sine-ish lumps, and are easily perturbed by people touching the system in any way. There is no synchronization to the site clock. We re going to need that STS- Distribution Chassis back. G00

7 The Proposed Distribution Scheme G00

8 The CPS Synch Board Schematic +V C UF RS Driver.0 MHz Sine Wave R N/P : Turn ratio TP T PRI SEC PRI SEC J ADT-WT C C 0nF C 0nF 0.uF TP ClockIn PSoC Input Clock P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] P[] PSoC Interface Square Pulse Square Pulse Square Pulse +V P Header 0X Pulse Square Pulse Square Pulse Square ClockIn P[] P[] P[] P[] P[] P[0] P[] P[] P[] P[0] P[] P[0] Square Pulse Square Pulse Square Pulse Square Pulse Square Pulse Square Pulse TP TP TP TP TP TP TP0 TP VCC Y A Z Y A Z Y A Z Y A Z G ~G +V C UF VCC Y A Z Y A Z Y A Z Y A Z G ~G +V C UF U Square + Square - Pulse + Pulse - 0 Square + Square - Pulse + Pulse - SNLBCADW RS Driver U Square + Square - Pulse + Pulse - 0 Square + Square - Pulse + Pulse - SNLBCADW RS Driver Square + Square - Pulse + Pulse - Square + Square - Pulse + Pulse - Square + Square - Pulse + Pulse - Square + Square - Pulse + Pulse - Square + Square - Pulse + Pulse - J 0 D Connector J 0 D Connector J 0 D Connector J 0 D Connector J 0 D Connector V Voltage Regulator D RB0M-0 TP U +V IN OUT ADJ Power In From Breaker P D +V STPS0LG Header V Voltage Regulator D RB0M-0 TP U +V +V IN OUT ADJ TP D Diode N +V +V R Board Power.K D R +V DUAL_LED TP TP TP TP A A A A G ~G VCC U Square + Y Square - Z Pulse + Y Pulse - Z 0 Square + Y Square - Z Pulse + Y Pulse - Z SNLBCADW Square + Square - Pulse + Pulse - J 0 D Connector LMT LMT + C 0.uF, 0V Tant. R 0 C 0uF R D RB0M-0 C 0uF + C 0.uF, 0V Tant. R.K C0 0uF R D RB0M-0 C 0uF TP TP G00

9 The PSoC Program G00

10 The PSoC Frequency Divider G00 0

11 Estimated Cost at the Vertex (These numbers are raw, and contain no contingency) To fix the Vertex BSC Chambers only: Stanford DS ( ea.) $,00 CDS Electronics $,000 Cables $0 Total = $,0 per IFO To Add HAMS: CDS Electronics $,000 Cables $00 Total = $,00 additional per IFO G00

12 Estimated Cost at the Ends To fix both End BSC Chambers: Stanford DS ( ea.) $,000 CDS Electronics $,000 Cables $00 Total = $,00 per IFO There is currently no 0MHz clock at the End Station, so another timing synch solution would have to be thought up. $? As there is no crosstalk at the end stations, being that there is only one chamber, the only impetus to make this change would be to synch the CPS synch pulse to the site clock. G00

13 LLO alog Text (00 & 00) L SEI Link celine.ramet@ligo.org - posted :, Wednesday December 0 - last comment - :, Wednesday December 0(00) CPS Comb: ITMX measurements with ITMY+BS CPS powered off [Rich M, Marissa, Ryan, Celine] Yesterday, we confirmed that the "comb" issue was visible on all BSC-ISIs CPSs, and that it affected much more some individual CPSs than others. We were able to change which were the CPS most affected, but not to understand why or how. We did notice though that ITMY and ITMX comb seemed to start at different frequencies, while the BS one looked like a combination of the. Suspecting interaction between chambers, this morning we shut down all CPSs of ITMY and BS (from :0 am to 0: am) and compared ITMX St CPS spectra with the other chambers CPSs powered on (ref in orange on the attached spectra) and off (in blue). Shutting down the other chambers CPSs resulted on having ITMX comb disappear from ITMX St CPS spectra. We are now trying to understand the interaction between chambers in order to mitigate the issue in an effective way. Comments related to this report richard.mittleman@ligo.org - :, Wednesday December 0 (00)Link We are now fairly convinced that the problem (a frequency comb in the CPS spectra) is due to having multiple master oscillators in close proximity (what close means is still to be determined). We measured the frequencies of the sync pulses on the three BSC chambers (~.Khz) and found that the differences between the frequencies was about the same as the observed comb frequencies. We then powered down the ITMY ISI and eliminated the master oscillator on the ITMX ISI. We then added a cable to bring the sync signal from the BS chamber to the ITMX ISI. After doing this the ITMX ISI ran well and the CPS spectra showed no signs of a frequency comb. Unfortunately this loaded down the BS sync sufficiently so that it did not run well. the major problem was in the Stage V CPS sensor (which is the master). So we restored everything to the way it was before and everything is running as it was previously. It looks like the solution is going to be running neighbouring chambers off of the same master and installing a buffer amplifier so that more slaves can be driven then we currently can Rich A. has suggested that we replace all of the local master/sync signals with a gps generated signal, then all of the chambers would be running at the same frequency G00

14 LLO alog Text (0) L SEI Link celine.ramet@ligo.org - posted :, Tuesday January 0 (0) All corner station BSC-ISI CPSs running from Master [Ryan, Celine] Since the comb observed on the CPS signals was observed to be linked to the beating of the different BSC-ISI Master CPSs against each other (alog 00), we have tried to have all BSC chambers from the corner station running from one master. Using one STS distribution box (D000) installed in the LVEA in the rack located at the -X/+Y corner of the BS, we have had the BS and ITMY running from the BS St-H sensor used as Master since last Thursday (alog 0). Yesterday, we connected ITMX to the same STS distribution interface and now all BSC-ISI have only CPS Master: BS St-H. You can find attached sample spectra for the CPS sensors of all BSC ISIs. In orange are the measurements from last Wednesday night when all ISIs had different masters ("comb reference"), in black are the measurements from Sunday night with both ITMY and BS on the same master and ITMX still running, and in any other colors are the measurements from last night. In all cases, those measurements were taken with St ISI isolated, St only damped. One can see that there is no more comb visible on those spectra (all other variations are likely due to variations in ground motion when those measurements were taken). Also, it is to be noted that high frequency noise (>0 Hz) has not gotten any worse with all those changes (we were worried about our grounding configuration). Note that despite this success, this is only a temporary setup. We believe that the filtering in the STS distribution slows down the sync signal sent to the slave CPSs, and we're not sure how this might affect the ISI performances. Also, I have noticed that the system is very sensitive to any new connection made to that interface box, and that the BS sync signals need to be connected last and carefully to avoid issues. We believe that this is linked to some grounding problem. However, since it does not seem to affect ISI performances at this point, we haven't done (yet) any further investigation. All in all, this success gives us a proof of concept that we will be able to run with only Master for all BSC-ISI CPSs from the corner station, resulting in getting rid of the comb plegging our spectra. Even though we can not explain this at this time, we do not a see any signs of beating between HAM-ISI Master CPS. G00

Single Event Radiation Test Report. Microsemi LX Analog Input RAD Tolerant Telemetry Controller

Single Event Radiation Test Report. Microsemi LX Analog Input RAD Tolerant Telemetry Controller Single Event Radiation Test Report Microsemi LX7730 64 Analog Input RAD Tolerant Telemetry Controller Doc. N :TDRS-0020-4 Page 1/33 TABLE OF CONTENT 1. PURPOSE AND SCOPE... 3 2. APPLICABLE DOCUMENT...

More information

LIGO Laboratory / LIGO Scientific Collaboration LIGO. aligo BSC-ISI, Pre-integration Testing report, Phase II (before cartridge install) E V6

LIGO Laboratory / LIGO Scientific Collaboration LIGO. aligo BSC-ISI, Pre-integration Testing report, Phase II (before cartridge install) E V6 LIGO Laboratory / LIGO Scientific Collaboration LIGO LIGO- E1100848 Oct 3, 2013 aligo BSC-ISI, Pre-integration Testing report, Phase II (before cartridge install) E1100848 V6 Hugo Paris, Jim Warner for

More information

EMC Considerations for DC Power Design

EMC Considerations for DC Power Design EMC Considerations for DC Power Design Tzong-Lin Wu, Ph.D. Department of Electrical Engineering National Sun Yat-sen University Power Bus Noise below 5MHz 1 Power Bus Noise below 5MHz (Solution) Add Bulk

More information

TM04N- General Description

TM04N- General Description N ( CH Capacitive Touch Sensor Module) N -CH Capacitance Touch Sensor Module with Differential Sensitivity Calibration General Description The N Touch Sensor Module is designed specifically for detecting

More information

An Ultra Low Resistance Continuity Checker

An Ultra Low Resistance Continuity Checker An Ultra Low Resistance Continuity Checker By R. G. Sparber Copyleft protects this document. 1 Some understanding of electronics is assumed. Although the title claims this is a continuity checker, its

More information

MASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Physics 8.02 Spring 2003 Experiment 17: RLC Circuit (modified 4/15/2003) OBJECTIVES

MASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Physics 8.02 Spring 2003 Experiment 17: RLC Circuit (modified 4/15/2003) OBJECTIVES MASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Physics 8. Spring 3 Experiment 7: R Circuit (modified 4/5/3) OBJECTIVES. To observe electrical oscillations, measure their frequencies, and verify energy

More information

Transient Response of Transmission Lines and TDR/TDT

Transient Response of Transmission Lines and TDR/TDT Transient Response of Transmission Lines and TDR/TDT Tzong-Lin Wu, Ph.D. EMC Lab. Department of Electrical Engineering National Sun Yat-sen University Outlines Why do we learn the transient response of

More information

Yet More On Decoupling, Part 5 When Harry Regulator Met Sally Op-Amp Kendall Castor-Perry

Yet More On Decoupling, Part 5 When Harry Regulator Met Sally Op-Amp Kendall Castor-Perry Page 1 of 8 Yet More On Decoupling, Part 5 When Harry Regulator Met Sally Op-Amp Kendall Castor-Perry This article was published on EDN: http://www.edn.com/design/powermanagement/4415318/why-bypass-caps-make-a-difference---part-5--supply-impedanceand-op-amp-interaction

More information

SCSI Connector and Cable Modeling from TDR Measurements

SCSI Connector and Cable Modeling from TDR Measurements SCSI Connector and Cable Modeling from TDR Measurements Dima Smolyansky TDA Systems, Inc. http://www.tdasystems.com Presented at SCSI Signal Modeling Study Group Rochester, MN, December 1, 1999 Outline

More information

NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output

NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output Description: The NTE74HC299 is an 8 bit shift/storage register with three state bus interface capability

More information

ERROR SOURCE IDENTIFICATION AND STABILITY TEST OF A PRECISION CAPACITANCE MEASUREMENT SYSTEM

ERROR SOURCE IDENTIFICATION AND STABILITY TEST OF A PRECISION CAPACITANCE MEASUREMENT SYSTEM 106 SOUTH AFRICAN INSTITUTE OF ELECTRICAL ENGINEERS Vol.101(3) September 2010 ERROR SOURCE IDENTIFICATION AND STABILITY TEST OF A PRECISION CAPACITANCE MEASUREMENT SYSTEM S. Nihtianov* and X. Guo* # *

More information

RLC Circuits. 1 Introduction. 1.1 Undriven Systems. 1.2 Driven Systems

RLC Circuits. 1 Introduction. 1.1 Undriven Systems. 1.2 Driven Systems RLC Circuits Equipment: Capstone, 850 interface, RLC circuit board, 4 leads (91 cm), 3 voltage sensors, Fluke mulitmeter, and BNC connector on one end and banana plugs on the other Reading: Review AC circuits

More information

100K SLQ1 OP2 R207. Future option SLQ2 OP2 R307. Future option

100K SLQ1 OP2 R207. Future option SLQ2 OP2 R307. Future option ON N/S E/W NTENN 00 XnF 00 XnF 0 XnF 0 XnF 0 XnF 0 XnF R00 Not Used (*) 0 0nF 0 0nF R0 K 0 nf (*) See "revision level." here below R00 Not Used (*) R0 K 0 nf!!! IMPORTNT!!! 00-0-0 & 00-0-0 Must be determined

More information

EMBEDDED-PROBE FLOATING POTENTIAL CHARGE-DISCHARGE MONITOR

EMBEDDED-PROBE FLOATING POTENTIAL CHARGE-DISCHARGE MONITOR EMBEDDED-PROBE FLOATING POTENTIAL CHARGE-DISCHARGE MONITOR Keith G. Balmain University of Toronto Department of Electrical and Computer Engineering 10 King s College Rd Toronto, Ontario M5S 3G4, Canada

More information

Lab #4 Capacitors and Inductors. Capacitor Transient and Steady State Response

Lab #4 Capacitors and Inductors. Capacitor Transient and Steady State Response Capacitor Transient and Steady State Response Like resistors, capacitors are also basic circuit elements. Capacitors come in a seemingly endless variety of shapes and sizes, and they can all be represented

More information

Clock Strategy. VLSI System Design NCKUEE-KJLEE

Clock Strategy. VLSI System Design NCKUEE-KJLEE Clock Strategy Clocked Systems Latch and Flip-flops System timing Clock skew High speed latch design Phase locked loop ynamic logic Multiple phase Clock distribution Clocked Systems Most VLSI systems are

More information

PCB Project: Measuring Package Bond-Out Inductance via Ground Bounce

PCB Project: Measuring Package Bond-Out Inductance via Ground Bounce PCB Project: Measuring Package Bond-Out Inductance via Ground Bounce Kylan Roberson July 9, 014 Abstract In this experiment I looked into a way of measuring the ground bounce generated by capacitively

More information

How Resonant Structures Affect Power Distribution Networks and Create Emissions.

How Resonant Structures Affect Power Distribution Networks and Create Emissions. How Resonant Structures Affect Power Distribution Networks and Create Emissions. Presented by Joanna McLellan January 17, 2019 JoannaEMC@iCloud.com 248-765-3599 Lots of people have the paradigm that adding

More information

Driven Harmonic Oscillator

Driven Harmonic Oscillator Driven Harmonic Oscillator Physics 6B Lab Experiment 1 APPARATUS Computer and interface Mechanical vibrator and spring holder Stands, etc. to hold vibrator Motion sensor C-209 spring Weight holder and

More information

SC125MS. Data Sheet and Instruction Manual. ! Warning! Salem Controls Inc. Stepper Motor Driver. Last Updated 12/14/2004

SC125MS. Data Sheet and Instruction Manual. ! Warning! Salem Controls Inc. Stepper Motor Driver.   Last Updated 12/14/2004 SC125MS Stepper Motor Driver Salem Controls Inc. Last Updated 12/14/2004! Warning! Stepper motors and drivers use high current and voltages capable of causing severe injury. Do not operate this product

More information

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

ESE 570: Digital Integrated Circuits and VLSI Fundamentals ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 24: April 19, 2018 Crosstalk and Wiring, Transmission Lines Lecture Outline! Crosstalk! Repeaters in Wiring! Transmission Lines " Where transmission

More information

100K SLQ1 OP2 R207. Future option SLQ2 OP2 R307. Future option

100K SLQ1 OP2 R207. Future option SLQ2 OP2 R307. Future option ON N/S E/W NTENN 00 XnF 00 XnF 0 XnF 0 XnF 0 XnF 0 XnF R00 Not Used (*) 0 0nF 0 0nF R0 K 0 nf (*) See "revision level." here below R00 Not Used (*) R0 K 0 nf!!! IMPORTNT!!! 00-0-0 & 00-0-0 Must be determined

More information

Prepare for this experiment!

Prepare for this experiment! Notes on Experiment #8 Theorems of Linear Networks Prepare for this experiment! If you prepare, you can finish in 90 minutes. If you do not prepare, you will not finish even half of this experiment. So,

More information

Old Dominion University Physics 112N/227N/232N Lab Manual, 13 th Edition

Old Dominion University Physics 112N/227N/232N Lab Manual, 13 th Edition RC Circuits Experiment PH06_Todd OBJECTIVE To investigate how the voltage across a capacitor varies as it charges. To find the capacitive time constant. EQUIPMENT NEEDED Computer: Personal Computer with

More information

STEVAL-IDP003V1. IO-Link industrial modular sensor board based on L6362A. Description. Features

STEVAL-IDP003V1. IO-Link industrial modular sensor board based on L6362A. Description. Features STEVAL-IDP00V IO-Link industrial modular sensor board based on LA Data brief Features Main supply voltage: V maximum STML0CZ microcontroller IO-Link PHY using the LA device for data communication with

More information

! Crosstalk. ! Repeaters in Wiring. ! Transmission Lines. " Where transmission lines arise? " Lossless Transmission Line.

! Crosstalk. ! Repeaters in Wiring. ! Transmission Lines.  Where transmission lines arise?  Lossless Transmission Line. ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 24: April 19, 2018 Crosstalk and Wiring, Transmission Lines Lecture Outline! Crosstalk! Repeaters in Wiring! Transmission Lines " Where transmission

More information

Switched-Capacitor Circuits David Johns and Ken Martin University of Toronto

Switched-Capacitor Circuits David Johns and Ken Martin University of Toronto Switched-Capacitor Circuits David Johns and Ken Martin University of Toronto (johns@eecg.toronto.edu) (martin@eecg.toronto.edu) University of Toronto 1 of 60 Basic Building Blocks Opamps Ideal opamps usually

More information

Experiment P43: RC Circuit (Power Amplifier, Voltage Sensor)

Experiment P43: RC Circuit (Power Amplifier, Voltage Sensor) PASCO scientific Vol. 2 Physics Lab Manual: P43-1 Experiment P43: (Power Amplifier, Voltage Sensor) Concept Time SW Interface Macintosh file Windows file circuits 30 m 700 P43 P43_RCCI.SWS EQUIPMENT NEEDED

More information

Resistors and simple network analysis

Resistors and simple network analysis Resistors and simple network analysis Eugeniy E. Mikhailov The College of William & Mary Lecture 01 Eugeniy Mikhailov (W&M) Electronics 1 Lecture 01 1 / 17 Analog Electronics goals Major time spending

More information

Analog Integrations Corporation 4F, 9 Industry E. 9th Rd, Science-Based Industrial Park, Hsinchu, Taiwan DS

Analog Integrations Corporation 4F, 9 Industry E. 9th Rd, Science-Based Industrial Park, Hsinchu, Taiwan DS Triple-Output LCD Power Supply FEATURES One Low Dropout Linear Regulator Dropout Voltage 500mV at 0.3A Output Current Dual Adjustable Charge Pump Up to +30V Positive Output Down to -0V Negative Output

More information

Knowledge Integration Module 1 Fall 2016

Knowledge Integration Module 1 Fall 2016 Knowledge Integration Module 1 Fall 2016 1 Basic Objective of KI-1: The knowledge integration module 1 or KI-1 is a vehicle to help you better grasp the commonality and correlations between concepts covered

More information

Prepare for this experiment!

Prepare for this experiment! Notes on Experiment #10 Prepare for this experiment! Read the P-Amp Tutorial before going on with this experiment. For any Ideal p Amp with negative feedback you may assume: V - = V + (But not necessarily

More information

SERIALLY PROGRAMMABLE CLOCK SOURCE. Features

SERIALLY PROGRAMMABLE CLOCK SOURCE. Features DATASHEET ICS307-03 Description The ICS307-03 is a dynamic, serially programmable clock source which is flexible and takes up minimal board space. Output frequencies are programmed via a 3-wire SPI port.

More information

Annexure-I. network acts as a buffer in matching the impedance of the plasma reactor to that of the RF

Annexure-I. network acts as a buffer in matching the impedance of the plasma reactor to that of the RF Annexure-I Impedance matching and Smith chart The output impedance of the RF generator is 50 ohms. The impedance matching network acts as a buffer in matching the impedance of the plasma reactor to that

More information

GR16. Technical Manual. 10 M SPS, 16-bit Analog Signal Digitizer up to 8MB FIFO

GR16. Technical Manual. 10 M SPS, 16-bit Analog Signal Digitizer up to 8MB FIFO GR M SPS, -bit Analog Signal Digitizer up to MB FIFO Technical Manual 90 th Street, Davis, CA 9, USA Tel: 0--00 Fax: 0--0 Email: sales@tern.com web site: www.tern.com COPYRIGHT GR, EL, Grabber, and A-Engine

More information

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DS0026 Dual High-Speed MOS Driver General Description DS0026 is a low cost

More information

SC1301A/B. 2A High Speed Low-Side MOSFET Driver in SOT-23 POWER MANAGEMENT. Applications. Typical Application Circuit

SC1301A/B. 2A High Speed Low-Side MOSFET Driver in SOT-23 POWER MANAGEMENT. Applications. Typical Application Circuit 查询 SC1301B 供应商 Description The is a cost effective single-channel highspeed MOSFET driver. The driver is capable of driving a 1000pF load in 0ns rise/fall time and has a 60ns propagation delay time from

More information

PT5108. High-PSRR 500mA LDO GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATIONS. Ripple Rejection vs Frequency. Ripple Rejection (db)

PT5108. High-PSRR 500mA LDO GENERAL DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATIONS. Ripple Rejection vs Frequency. Ripple Rejection (db) GENERAL DESCRIPTION The PT5108 is a low-dropout voltage regulator designed for portable applications that require both low noise performance and board space. Its PSRR at 1kHz is better than 70dB. The PT5108

More information

ECE414/514 Electronics Packaging Spring 2012 Lecture 6 Electrical D: Transmission lines (Crosstalk) Lecture topics

ECE414/514 Electronics Packaging Spring 2012 Lecture 6 Electrical D: Transmission lines (Crosstalk) Lecture topics ECE414/514 Electronics Packaging Spring 2012 Lecture 6 Electrical D: Transmission lines (Crosstalk) James E. Morris Dept of Electrical & Computer Engineering Portland State University 1 Lecture topics

More information

Frequency domain analysis of linear circuits using synchronous detection

Frequency domain analysis of linear circuits using synchronous detection Frequency doma analysis of lear circuits usg synchronous detection Introduction In this experiment, we will study the behavior of simple electronic circuits whose response varies as a function of frequency.

More information

Prepare for this experiment!

Prepare for this experiment! Notes on Experiment #8 Theorems of Linear Networks Prepare for this experiment! If you prepare, you can finish in 90 minutes. If you do not prepare, you will not finish even half of this experiment. So,

More information

Grabber. Technical Manual

Grabber. Technical Manual Grabber 0 MHZ Analog Signal Digitizer Technical Manual 0 th Street, Davis, CA, USA Tel: 0--00 Fax: 0--0 Email: sales@tern.com http://www.tern.com COPYRIGHT Grabber, and A-Engine are trademarks of TERN,

More information

IXTH30N60L2 IXTQ30N60L2 IXTT30N60L2

IXTH30N60L2 IXTQ30N60L2 IXTT30N60L2 Preliminary Technical Information Linear L2 TM Power MOSFET with extended FBSOA IXTH3NL2 IXTQ3NL2 IXTT3NL2 S I D25 R DS(on) = V = 3A mω N-Channel Enhancement Mode Avalanche rated TO-7 Symbol Test Conditions

More information

Capacitance Measurement

Capacitance Measurement Overview The goal of this two-week laboratory is to develop a procedure to accurately measure a capacitance. In the first lab session, you will explore methods to measure capacitance, and their uncertainties.

More information

Evaluation Board for 8-/10-/12-Bit, Parallel Input, Dual-Channel, Current Output DAC EVAL-AD5428/AD5440/AD5447EB

Evaluation Board for 8-/10-/12-Bit, Parallel Input, Dual-Channel, Current Output DAC EVAL-AD5428/AD5440/AD5447EB Evaluation Board for 8-/0-/-Bit, Parallel Input, Dual-Channel, Current Output DAC EVAL-AD58/AD50/AD5EB FEATURES Operates from dual ± V and 5 V supplies On-board reference and output amplifiers Direct hookup

More information

Coupled Electrical Oscillators Physics Advanced Physics Lab - Summer 2018 Don Heiman, Northeastern University, 5/24/2018

Coupled Electrical Oscillators Physics Advanced Physics Lab - Summer 2018 Don Heiman, Northeastern University, 5/24/2018 Coupled Electrical Oscillators Physics 3600 - Advanced Physics Lab - Summer 08 Don Heiman, Northeastern University, 5/4/08 I. INTRODUCTION The objectives of this experiment are: () explore the properties

More information

Announcements. EE141- Fall 2002 Lecture 25. Interconnect Effects I/O, Power Distribution

Announcements. EE141- Fall 2002 Lecture 25. Interconnect Effects I/O, Power Distribution - Fall 2002 Lecture 25 Interconnect Effects I/O, Power Distribution Announcements Homework 9 due next Tuesday Hardware lab this week Project phase 2 due in two weeks 1 Today s Lecture Impact of interconnects»

More information

Active loads in amplifier circuits

Active loads in amplifier circuits Active loads in amplifier circuits This worksheet and all related files are licensed under the Creative Commons Attribution License, version 1.0. To view a copy of this license, visit http://creativecommons.org/licenses/by/1.0/,

More information

TX-2200A LF 136kHz Transmitter

TX-2200A LF 136kHz Transmitter A NEW CHALLENGE TX-00A LF khz Transmitter The TX-00A transmitter provides a new challenge opportunity to hams around the world. It provides the opportunity to explore a part of the radio spectrum that

More information

III. The STM-8 Loop - Work in progress

III. The STM-8 Loop - Work in progress III. The STM-8 Loop - Work in progress This contains the loop functions for a velocity input. The interaction between, forward gain, feedback function, loop gain and transfer function are well displayed.

More information

Demonstration of Chaos

Demonstration of Chaos revised 4/21/03 Demonstration of Chaos Advanced Laboratory, Physics 407 University of Wisconsin Madison, Wisconsin 53706 Abstract A simple resonant inductor-resistor-diode series circuit can be used to

More information

Chapter 1 0+7= 1+6= 2+5= 3+4= 4+3= 5+2= 6+1= 7+0= How would you write five plus two equals seven?

Chapter 1 0+7= 1+6= 2+5= 3+4= 4+3= 5+2= 6+1= 7+0= How would you write five plus two equals seven? Chapter 1 0+7= 1+6= 2+5= 3+4= 4+3= 5+2= 6+1= 7+0= If 3 cats plus 4 cats is 7 cats, what does 4 olives plus 3 olives equal? olives How would you write five plus two equals seven? Chapter 2 Tom has 4 apples

More information

MAIN PCB R10, 12k R31. 2) Now with the capacitors. C12,C7 C20 C6. 1N4148 D3, D5, D6 Zener 4v7 D1, D D4, D7 ferrites F1+, F2- 4) Transistors

MAIN PCB R10, 12k R31. 2) Now with the capacitors. C12,C7 C20 C6. 1N4148 D3, D5, D6 Zener 4v7 D1, D D4, D7 ferrites F1+, F2- 4) Transistors Micrón (v.) ASSEMBLY MANUAL Thank you for choosing this kit. Let s go! WARNING: Please, read the instructions completely before start and follow the steps carefully. Some of assembly parts are not so obvious

More information

Control of an Induction Motor Drive

Control of an Induction Motor Drive Control of an Induction Motor Drive 1 Introduction This assignment deals with control of an induction motor drive. First, scalar control (or Volts-per-Hertz control) is studied in Section 2, where also

More information

Experiment Guide for RC Circuits

Experiment Guide for RC Circuits Guide-P1 Experiment Guide for RC Circuits I. Introduction 1. Capacitors A capacitor is a passive electronic component that stores energy in the form of an electrostatic field. The unit of capacitance is

More information

Lecture 23. Dealing with Interconnect. Impact of Interconnect Parasitics

Lecture 23. Dealing with Interconnect. Impact of Interconnect Parasitics Lecture 23 Dealing with Interconnect Impact of Interconnect Parasitics Reduce Reliability Affect Performance Classes of Parasitics Capacitive Resistive Inductive 1 INTERCONNECT Dealing with Capacitance

More information

Microcare LCD Solar MPPT User Documentation

Microcare LCD Solar MPPT User Documentation Microcare LCD Solar MPPT User Documentation 1 CONTENTS 1. INTRODUCTION. 3 1.1. General Description 1.2. Key Features 1.3. Important Notices 1.4. Recommended Array Sizes 1.5. MPPT Description 1.6. MPPT

More information

Beam Diagnostics. Measuring Complex Accelerator Parameters Uli Raich CERN BE-BI

Beam Diagnostics. Measuring Complex Accelerator Parameters Uli Raich CERN BE-BI Beam Diagnostics Measuring Complex Accelerator Parameters Uli Raich CERN BE-BI CERN Accelerator School Prague, 2014 Contents Some examples of measurements done with the instruments explained during the

More information

Experiment 1 Solutions: Equipotential Lines and Electric Fields

Experiment 1 Solutions: Equipotential Lines and Electric Fields MASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Physics 8.02 Experiment 1 Solutions: Equipotential Lines and Electric Fields IN-LAB ACTIVITIES EXPERIMENTAL SETUP 1. Download the LabView file from the

More information

Exercise 1: Capacitors

Exercise 1: Capacitors Capacitance AC 1 Fundamentals Exercise 1: Capacitors EXERCISE OBJECTIVE When you have completed this exercise, you will be able to describe the effect a capacitor has on dc and ac circuits by using measured

More information

Homework assignment from , MEMS Capacitors lecture

Homework assignment from , MEMS Capacitors lecture Homework assignment from 05-02-2006, MEMS Capacitors lecture 1. Calculate the capacitance for a round plate of 100µm diameter with an air gap space of 2.0 µm. C = e r e 0 * A/d (1) e 0 = 8.85E-12 F/m e

More information

Hydraulic Actuators for the LIGO Seismic Retrofit

Hydraulic Actuators for the LIGO Seismic Retrofit Hydraulic Actuators for the LIGO Seismic Retrofit Stanford, Caltech, LSU, MIT, LLO Rich Abbott, Graham Allen, Daniel DeBra, Dennis Coyne, Jeremy Faludi, Amit Ganguli, Joe Giaime, Marcel Hammond, Corwin

More information

ENGR-4300 Spring 2009 Test 2. Name: SOLUTION. Section: 1(MR 8:00) 2(TF 2:00) 3(MR 6:00) (circle one) Question I (20 points): Question II (20 points):

ENGR-4300 Spring 2009 Test 2. Name: SOLUTION. Section: 1(MR 8:00) 2(TF 2:00) 3(MR 6:00) (circle one) Question I (20 points): Question II (20 points): ENGR43 Test 2 Spring 29 ENGR43 Spring 29 Test 2 Name: SOLUTION Section: 1(MR 8:) 2(TF 2:) 3(MR 6:) (circle one) Question I (2 points): Question II (2 points): Question III (17 points): Question IV (2 points):

More information

Lab 01: Harmonic Motion I. Theory: Three experiments. The first we measure the oscillation of a spring, the second of a rubber band (non-linear).

Lab 01: Harmonic Motion I. Theory: Three experiments. The first we measure the oscillation of a spring, the second of a rubber band (non-linear). Dr. W. Pezzaglia Physics 8C Lab, Spring 04 Page Las Positas College Lab # Harmonic Motion 04Jan3 Lab 0: Harmonic Motion I. Theory: Three experiments. The first we measure the oscillation of a spring, the

More information

PT W/CH Stereo Filter-free Class-D Audio Power Amplifier

PT W/CH Stereo Filter-free Class-D Audio Power Amplifier GENERAL DESCRIPTION The is a dual.0w high efficiency filterless class D audio power amplifier in a 4mm 4mm QFN-6 and SMD-6 or SOP6 package that requires only five external components. The uses Class D

More information

Physics 2310 Lab #3 Driven Harmonic Oscillator

Physics 2310 Lab #3 Driven Harmonic Oscillator Physics 2310 Lab #3 Driven Harmonic Oscillator M. Pierce (adapted from a lab by the UCLA Physics & Astronomy Department) Objective: The objective of this experiment is to characterize the behavior of a

More information

CMOS Comparators. Kyungpook National University. Integrated Systems Lab, Kyungpook National University. Comparators

CMOS Comparators. Kyungpook National University. Integrated Systems Lab, Kyungpook National University. Comparators IsLab Analog Integrated ircuit Design OMP-21 MOS omparators כ Kyungpook National University IsLab Analog Integrated ircuit Design OMP-1 omparators A comparator is used to detect whether a signal is greater

More information

Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. LM117/217 LM317 1.2V TO 37V VOLTAGE REGULATOR OUTPUT VOLTAGE RANGE: 1.2

More information

PRACTICE NO. PD-AP-1309 PREFERRED PAGE 1 OF 5 RELIABILITY PRACTICES ANALYSIS OF RADIATED EMI FROM ESD EVENTS CAUSED BY SPACE CHARGING

PRACTICE NO. PD-AP-1309 PREFERRED PAGE 1 OF 5 RELIABILITY PRACTICES ANALYSIS OF RADIATED EMI FROM ESD EVENTS CAUSED BY SPACE CHARGING PREFERRED PAGE 1 OF 5 RELIABILITY PRACTICES ANALYSIS OF RADIATED EMI FROM ESD EVENTS Practice: Modeling is utilized for the analysis of conducted and radiated electromagnetic interference (EMI) caused

More information

Physics 326 Lab 6 10/18/04 DAMPED SIMPLE HARMONIC MOTION

Physics 326 Lab 6 10/18/04 DAMPED SIMPLE HARMONIC MOTION DAMPED SIMPLE HARMONIC MOTION PURPOSE To understand the relationships between force, acceleration, velocity, position, and period of a mass undergoing simple harmonic motion and to determine the effect

More information

Document Title 128K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output. Rev. No. History Issue Date Remark

Document Title 128K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output. Rev. No. History Issue Date Remark 12K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output Document Title 12K X 32 Bit Synchronous High Speed SRAM with Burst Counter and Pipelined Data Output Revision History

More information

1.5 Character Height 7-Segment LED Information Board User s Guide

1.5 Character Height 7-Segment LED Information Board User s Guide . Character Height -Segment LED Information Board User s uide 00-00 Sure Electronics Inc. DE-DP00-Ver.0 . Character Height -Segment LED Information Board User s uide Table of contents Chapter.Overview

More information

Q. 1 Q. 25 carry one mark each.

Q. 1 Q. 25 carry one mark each. GATE 5 SET- ELECTRONICS AND COMMUNICATION ENGINEERING - EC Q. Q. 5 carry one mark each. Q. The bilateral Laplace transform of a function is if a t b f() t = otherwise (A) a b s (B) s e ( a b) s (C) e as

More information

CMPEN 411 VLSI Digital Circuits Spring 2012 Lecture 17: Dynamic Sequential Circuits And Timing Issues

CMPEN 411 VLSI Digital Circuits Spring 2012 Lecture 17: Dynamic Sequential Circuits And Timing Issues CMPEN 411 VLSI Digital Circuits Spring 2012 Lecture 17: Dynamic Sequential Circuits And Timing Issues [Adapted from Rabaey s Digital Integrated Circuits, Second Edition, 2003 J. Rabaey, A. Chandrakasan,

More information

PRIMARE A32 Power Amplifier Service Manual

PRIMARE A32 Power Amplifier Service Manual PRIMRE Power mplifier Service Manual . Technical Description.. Error codes.. Bias djustment.. Schematics.. Technical Specifications. onfidential! This document is not allowed to show for third part without

More information

Experiment 4. RC Circuits. Observe and qualitatively describe the charging and discharging (decay) of the voltage on a capacitor.

Experiment 4. RC Circuits. Observe and qualitatively describe the charging and discharging (decay) of the voltage on a capacitor. Experiment 4 RC Circuits 4.1 Objectives Observe and qualitatively describe the charging and discharging (decay) of the voltage on a capacitor. Graphically determine the time constant τ for the decay. 4.2

More information

For the electronic measurement of current: DC, AC, pulsed..., with galvanic separation between the primary and the secondary circuit.

For the electronic measurement of current: DC, AC, pulsed..., with galvanic separation between the primary and the secondary circuit. Current Transducer GO-SMS series I P N = 10... 30 A Ref: GO 10-SMS, GO 20-SMS, GO 30-SMS For the electronic measurement of current: DC, AC, pulsed..., with galvanic separation between the primary and the

More information

Final Exam. 55:041 Electronic Circuits. The University of Iowa. Fall 2013.

Final Exam. 55:041 Electronic Circuits. The University of Iowa. Fall 2013. Final Exam Name: Max: 130 Points Question 1 In the circuit shown, the op-amp is ideal, except for an input bias current I b = 1 na. Further, R F = 10K, R 1 = 100 Ω and C = 1 μf. The switch is opened at

More information

Using a Microcontroller to Study the Time Distribution of Counts From a Radioactive Source

Using a Microcontroller to Study the Time Distribution of Counts From a Radioactive Source Using a Microcontroller to Study the Time Distribution of Counts From a Radioactive Source Will Johns,Eduardo Luiggi (revised by Julia Velkovska, Michael Clemens September 11, 2007 Abstract In this lab

More information

For the electronic measurement of current: DC, AC, pulsed..., with galvanic separation between the primary and the secondary circuit.

For the electronic measurement of current: DC, AC, pulsed..., with galvanic separation between the primary and the secondary circuit. Current Transducer GO-SME series I P N = 10 20 A Ref: GO 10-SME, GO 20-SME For the electronic measurement of current: DC, AC, pulsed..., with galvanic separation between the primary and the secondary circuit.

More information

MICROCIRCUITS, DIGITAL, TTL, FLIP-FLOPS, MONOLITHIC SILICON. Inactive for new design after 7 September 1995

MICROCIRCUITS, DIGITAL, TTL, FLIP-FLOPS, MONOLITHIC SILICON. Inactive for new design after 7 September 1995 MILITARY SPECIFICATION INCH-POUND MIL-M-38510/2G 8 February 2005 SUPERSEDING MIL-M-38510/2E 24 December 1974 MIL-M-0038510/2F (USAF) 24 OCTOBER 1975 MICROCIRCUITS, DIGITAL, TTL, FLIP-FLOPS, MONOLITHIC

More information

Analog Integrations Corporation Si-Soft Research Center DS-1533G A1, No.1, Li-Hsin Rd. I, Science Park, Hsinchu 300, Taiwan, R.O.C.

Analog Integrations Corporation Si-Soft Research Center DS-1533G A1, No.1, Li-Hsin Rd. I, Science Park, Hsinchu 300, Taiwan, R.O.C. Triple-Output LCD Power Supply FEATURES One Low Dropout Linear Regulator Dropout Voltage 500mV at 0.3A Output Current Dual Adjustable Charge Pump Up to +30V Positive Output Down to -0V Negative Output

More information

1.8 Character Height 7-Segment LED Information Board User s Guide

1.8 Character Height 7-Segment LED Information Board User s Guide . Character Height -Segment LD Information Board User s Guide 00-00 Sure lectronics Inc. D-DP00-Ver.0 . Character Height -Segment LD Information Board User s Guide Table of contents Chapter.Overview and

More information

Design Engineering MEng EXAMINATIONS 2016

Design Engineering MEng EXAMINATIONS 2016 IMPERIAL COLLEGE LONDON Design Engineering MEng EXAMINATIONS 2016 For Internal Students of the Imperial College of Science, Technology and Medicine This paper is also taken for the relevant examination

More information

Digital Current Transducer HO-SW series I P N = A. Ref: HO 100-SW; HO 150-SW; HO 200-SW; HO 250-SW

Digital Current Transducer HO-SW series I P N = A. Ref: HO 100-SW; HO 150-SW; HO 200-SW; HO 250-SW Digital Current Transducer HO-SW series I P N = 100... 250 A Ref: HO 100-SW; HO 150-SW; HO 200-SW; HO 250-SW Bitstream output from on onboard Sigma Delta modulator. For the electronic measurement of current:

More information

Sure Electronics 1.5inch LED Board User s Guide

Sure Electronics 1.5inch LED Board User s Guide Sure Electronics.inch LED Board User s uide Product Name Product ID :.inch Character Height -segment LED Information Board : DE-DP00 Product Version : Ver.0 Document Version : Ver.0 Copyright 00-00 Sure

More information

Regulated 3.3V Charge Pump MAX679

Regulated 3.3V Charge Pump MAX679 19-1217; Rev ; 4/97 Regulated 3.3 Charge Pump General Description The step-up, regulated charge pump generates a 3.3 ±4% output voltage from a 1.8 to 3.6 input voltage (two alkaline, NiCd, or NiMH; or

More information

ENGR4300 Fall 2005 Test 3S. Name solution. Section. Question 1 (25 points) Question 2 (25 points) Question 3 (25 points) Question 4 (25 points)

ENGR4300 Fall 2005 Test 3S. Name solution. Section. Question 1 (25 points) Question 2 (25 points) Question 3 (25 points) Question 4 (25 points) ENGR400 Test S Fall 005 ENGR400 Fall 005 Test S Name solution Section uestion (5 points) uestion (5 points) uestion (5 points) uestion 4 (5 points) Total (00 points): Please do not write on the crib sheets.

More information

PDN Planning and Capacitor Selection, Part 1

PDN Planning and Capacitor Selection, Part 1 by Barry Olney column BEYOND DESIGN PDN Planning and Capacitor Selection, Part 1 In my first column on power distribution network (PDN) planning, Beyond Design: Power Distribution Network Planning, I described

More information

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC6 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC6 74HC/HCT/HCU/HCMOS Logic Package Information The IC6 74HC/HCT/HCU/HCMOS

More information

ET4119 Electronic Power Conversion 2011/2012 Solutions 27 January 2012

ET4119 Electronic Power Conversion 2011/2012 Solutions 27 January 2012 ET4119 Electronic Power Conversion 2011/2012 Solutions 27 January 2012 1. In the single-phase rectifier shown below in Fig 1a., s = 1mH and I d = 10A. The input voltage v s has the pulse waveform shown

More information

MEG II 実験の準備状況と 今後の展望 東京大学 素粒子物理国際研究センター 岩本敏幸 他MEG II コラボレーション 2018年9月14日 日本物理学会2018年秋季大会 信州大学 JSPS Core-to-Core Program

MEG II 実験の準備状況と 今後の展望 東京大学 素粒子物理国際研究センター 岩本敏幸 他MEG II コラボレーション 2018年9月14日 日本物理学会2018年秋季大会 信州大学 JSPS Core-to-Core Program MEG II MEG II 2018 9 14 2018 Introduction Flavor physics Why do we have three generations in the SM? charged Lepton Flavor Violation FV happens in quark, neutral lepton sector Why not in charged lepton

More information

RS INDUSTRY LIMITED. RS Chip Array ESD Suppressor APPROVAL SHEET. Customer Information. Part No. : Model No. : COMPANY PURCHASE R&D

RS INDUSTRY LIMITED. RS Chip Array ESD Suppressor APPROVAL SHEET. Customer Information. Part No. : Model No. : COMPANY PURCHASE R&D APPROVAL SHEET Customer Information Customer : Part Name : Part No. : Model No. : COMPANY PURCHASE R&D Vendor Information Name: RS INDUSTRY LIMITED Part Name ARRAY TYPE MULTILAYER VARISTOR Part No. RS

More information

LASER INTERFEROMETER GRAVITATIONAL WAVE OBSERVATORY - LIGO - CALIFORNIA INSTITUTE OF TECHNOLOGY MASSACHUSETTS INSTITUTE OF TECHNOLOGY

LASER INTERFEROMETER GRAVITATIONAL WAVE OBSERVATORY - LIGO - CALIFORNIA INSTITUTE OF TECHNOLOGY MASSACHUSETTS INSTITUTE OF TECHNOLOGY LASER INTERFEROMETER GRAVITATIONAL WAVE OBSERVATORY - LIGO - CALIFORNIA INSTITUTE OF TECHNOLOGY MASSACHUSETTS INSTITUTE OF TECHNOLOGY Document Type LIGO-T990088-01- D 10/14/99 COS IFO Alignment Procedure

More information

Dynamic Models for Passive Components

Dynamic Models for Passive Components PCB Design 007 QuietPower columns Dynamic Models for Passive Components Istvan Novak, Oracle, February 2016 A year ago the QuietPower column [1] described the possible large loss of capacitance in Multi-Layer

More information

Physics 401. Classical Physics Laboratory.

Physics 401. Classical Physics Laboratory. Physics 401. Classical Physics Laboratory. Spring 2018 Eugene V Colla Course Objective Organization: Times and locations Physics 401 staff Semester Schedule Laboratory routine Grading scheme Section assignments

More information

Lecture 25. Dealing with Interconnect and Timing. Digital Integrated Circuits Interconnect

Lecture 25. Dealing with Interconnect and Timing. Digital Integrated Circuits Interconnect Lecture 25 Dealing with Interconnect and Timing Administrivia Projects will be graded by next week Project phase 3 will be announced next Tu.» Will be homework-like» Report will be combined poster Today

More information

PDN Planning and Capacitor Selection, Part 2

PDN Planning and Capacitor Selection, Part 2 by Barry Olney column BEYOND DESIGN PDN Planning and Capacitor Selection, Part 2 In last month s column, PDN Planning and Capacitor Selection Part 1, we looked closely at how to choose the right capacitor

More information

Analysis of the NOT Primary Mirror Dynamics

Analysis of the NOT Primary Mirror Dynamics Analysis of the NOT Primary Mirror Dynamics Graham C. Cox October 24, 2000 Introduction On the nights of 12th and 13th May 2000 observations were made using the JOSE camera system, borrowed from the ING,

More information

Optoelectronic Applications. Injection Locked Oscillators. Injection Locked Oscillators. Q 2, ω 2. Q 1, ω 1

Optoelectronic Applications. Injection Locked Oscillators. Injection Locked Oscillators. Q 2, ω 2. Q 1, ω 1 Injection Locked Oscillators Injection Locked Oscillators Optoelectronic Applications Q, ω Q, ω E. Shumakher, J. Lasri,, B. Sheinman, G. Eisenstein, D. Ritter Electrical Engineering Dept. TECHNION Haifa

More information