Lecture 4 Modeling, Analysis and Simulation in Logic Design. Dr. Yinong Chen

Transcription

1 Lecture 4 Modeling, Analysis and Simulation in Logic Design Dr. Yinong Chen

2 The Engineering Design Process Define Problem and requirement Research Define Alternative solutions CAD Modeling Analysis Simulation Prototyping ALU Final Selection Implementation and testing 2

3 Contents 1 Logic Design and Specification in Truth Table 2 Building Blocks of Digital Systems 3 Memory Design 4 Arithmetic / Logic Unit (ALU) Design & Testing 5 Simulate a Design in VIPLE 3

4 Logic Design: Analogue versus Digital tank dial empty full infinite range of values tank light : on / off finite set of values tank 4

5 Propositional Logic and its Elements Propositional logic is a language for modeling and specification Proposition: A statement that can either be true or false: One plus two is three There are two Nobel prize winners at Arizona State University The sky is blue How old are you? You must ride a bike to school! Logic connectives AND ( ), OR ( ), NOT ( ), IMPLIES ( ) light is on tank is full (Light is off) (bulb is not broken) tank is empty 5 Truth and falsity values Truth Table

6 NOT Truth Table is a Logic Specification/Model for Circuits propositional variable P false true statement P true false a a AND P Q P Q false false false false true false true false false true true true a b a b

7 Truth Table (Contd.) OR P Q P Q false false false false true true true false true true true true a b a b

8 Building Blocks of Digital Circuits Building Blocks Truth Tables a b AND gate c = a b c a b OR gate c = a b c a NOT c = a c a b a b a b a b a a a b NAND gate c = a b c a b NOR gate c = a b c a b XOR gate c c = a b a b a b a b a b a b a b Multiplexor a b 0 1 e0 If (e0=0) (f=a) else (f=b); f 4-1 Multiplexor a b c d e e0 f e1 e0 f 0 0 a 0 1 b 1 0 c 1 1 d

9 Memory Design: bit and Byte 1-bit 1-bit 1-bit 1-bit 1-bit 1-bit 1-bit 1-bit set Q' output reset Q 01 input One bit can store a 1 or a 0 One-bit memory design output 9 8 bits = 1 Byte Can store a character Or a short integer Most significant bit input Least significant bit

10 Memory: Word, Long Word In a 32-bit computer: 4 Bytes = 1 word and 8 bytes = 1 double word word Byte 1 Byte 1 Byte 1 Byte Can store: int and float double word Byte 1 Byte 1 Byte 1 Byte Byte 1 Byte 1 Byte 1 Byte Can store: a long int and a double float 10

11 The Entire Memory, with 32-bit address space and byte-addressable Hex address h h h Ch h h h Ch h h h Ch h FFFFFFF0h FFFFFFF4h FFFFFFF8h FFFFFFFCh 11

12 Five Component Model of a Computer -- A Conceptual Model Processor Control unit Memory Peripherals input ALU output 12 Bus

13 Arithmetic/Logic Unit (ALU) Operation code (3) Operation code function ALU AND OR ADD SUB Adder 13

14 Truth Table and Design of a One-Bit Adder input Truth Table output a b carryin carryout Sum a = b = c = a b sum carryin carryout 14 One-bit adder

15 ALU Design: One-Bit ALU Inputs carryout r 15 CarryIn a b operation 1-bit ALU operation function AND OR ADD SUB r carryout Six inputs and two outputs Partial Truth Table carryin a b d d d d d d d d d d d d d d d AND Component-based design operation OR r ADD SUB carryout

16 32-Bit ALU with 96 Inputs CarryIn 0 operation operation function AND OR ADD SUB a0 b0 a1 b1 1-bit ALU 1-bit ALU r 0 r 1 Operation (3). 16 ALU a31 b31 1-bit ALU carryout r 31

17 a b sum Simulation of 1-bit Adder carryin carryout 17 Define Before Using: Define the input whenever you see a warning sign

18 Testing the One-Bit Adder Convert Activity to Service Right click

19 Converting Decimal to Binary Pattern for Automated Test Case Generation CountTo7 a b carryin if CountTo7 = 0, 1, 2, 3, then a = 0, else a = 1; if CountTo7 = 0, 1, 4, 5, then b = 0, else b = 1; 19 if CountTo7 = 0, 2, 4, 6, then carryin = 0, else carryin = 1; 19

20 Automated Test Case Generation Count from 0 to 7 Test Cases Count from 0 to 63 for 1-bit ALU 20

21 One-Bit ALU

22 One-Bit ALU VIPLE Implementation FSE100 Define Yinong Before Chen Using: Define the input whenever you see a warning sign

23 Testing the One-Bit ALU

24 Automated Test Case Generation Count from Count from 0 to 63 for 0 to 7 1-bit ALU Test Cases 63 24