On-Wafer 3-port S-parameter Calibration

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1 Technical report R ISSN On-Wafer 3-port S-parameter Calibration October 1997 Michael B. Jenner M.Sc.E.E Department of Communication Technology Institute of Electronic Systems Aalborg University Frederik Bajers Vej 7A, DK-9220 Aalborg East, Denmark

2 On-Wafer 3-port S-parameter Calibration Technical report R , ISSN Date October, 1997 Pages 69 Author Michael B. Jenner URL: mj Aalborg University Institute of Electronic Systems Department of Communication Technology Division of Telecommunications Frederik Bajers Vej 7A DK-9220 Aalborg East, Denmark URL: Phone: (switchboard) Fax: Research group The author is a member of the RISC group Rf Integrated Systems and Circuits at Aalborg University URL: Preface The objective of the present work is to establish methods for dealing with on-wafer 3-port S-parameter measurements. Error correction methods including calibration and deembedding 1 are discussed and verified experimentally. Chapter 1 presents two basically different methods for making 3-port S-parameter measurements using a 2-port network analyzer. The methods are termed the renormalization and the iterative method. Both methods require three sets of 2-port S-parameters and additional 1- port S-parameter measurements to calculate the wanted set of 3-port S-parameters. Also, a method for deembedding measured 3-port S- parameters denoted renormalization is presented. Chapter 2 presents and discusses commonly used 2-port calibration methods which can be used together with the presented method for 3-port measurements. Chapter 3 discusses on-wafer issues, i.e. which measurement difficulties exist, and what can be done to overcome these problems. Also, accuracy enhancements are suggested. Implementations and specifications of two calibration kits (SOLT and TRL) are presented in Chapter 4. In Chapter 5 a general conclusion is drawn to give an overall impression of the results obtained. All experiments use devices build of a 0.5µm GaAs process (F20), supplied by GEC-Marconi [GEC]. In the present work the F20 design manual from GEC-Marconi is frequently used, but this material is not avail- 1 Deembedding is the process of removing effects from embedding circuits.

3 able to others, as it is only made available to the author through a confidential agreement. Unfortunately this means that fabrication spread and other figure of merits can not be stated in the present work, even when used as the basis of choices and in analyses. All chips are manufactured by support of EUROPRACTICE 2, a project supported by the European Commission (EC). The aim of EUROPRAC- TICE is to stimulate European industry to a wider application of state-of-the-art microelectronics technologies. Several different services are available from EUROPRACTICE of which the Multi-Project Wafer (MPW) prototyping service is used in the present work. By letting several customers sharing fabrication costs to a wafer, the costs are reduced. Customers are industry as well as academic institutions. The price per square millimeter chip area for the GEC F20 process is currently 480 ECU for educational use only, whereas industry must pay 795 ECU per square millimeter. In danish kroners DKK this correspond to approximately DKK 3,580 and DKK 5,930, respectively. Also, note that the effective area of e.g. a 2x2mm 2 chip is only 1.785x1.785mm 2 due the fact that there must be room for scribe channels. A minimum of 10 samples of each chip is guaranteed on each run. 2 EUROPRACTICE is short for PRomoting Access to Components, subsystems and microsystems Technologies for Industrial Competitiveness in Europe. More information can be found at the URL

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5 Contents 1 On-Wafer 3-port S-parameter calibration portS-parametercalibration Theory and the normalization problem Therenormalizationmethod Theiterativesolution Verification of 3-port calibration methods Deembedding3-portS-parameters Verificationofdeembedding port calibration methods Introduction Calibrationmethods Verificationofcalibration On-wafer measurements and related problems 27 4 On-wafer 3-port calibration kits Implementationofcalibrationkits Unintensionalcoupling SOLTandverificationchip TRLcalibrationkit SpecificationofCalibrationkits SOLTmodeling TRLmodeling portcalibrationresults DGFETmeasurements Conclusion 65 Bibliography 69 5

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7 On-Wafer 3-port S-parameter calibration This chapter presents methods for making error corrected 3-port S- parameters using 2-port network analyzers, and for deembedding 3-port S-parameters port S-parameter calibration Several articles (see e.g. [TS82], [Dro83], [Rau83], and [Sch93]) deal with 3-port or multi-port S-parameter measurements using 2-port network analyzers. In all the mentioned references it is considered sufficient to account for improper terminations at the ports not connected to the network analyzer. This may not always be sufficient as e.g. coupling can violate the conditions. To save area and thereby money, MMIC circuits are typically small, and a higher amount of coupling is typically introduced. The latter is discussed in Chapter 3 where precautions are suggested to avoid introducing significant errors. Another, more accurate, approach is to extend the error model 1 to not only account for mismatches, but also for coupling. Recently suggested 2-port calibration methods thus extend the commonly used 2-port 12- term error model to a 16-term model, see [But91]. By doing this the methods are, in principle, capable of accounting for all possible systematic errors. If the 2-port concept [But91] is adapted to 3-ports a 36-term 1 An error model is used to remove systematic errors inherent in the measurement equipment. By proper determination of such an error model an otherwise nonideal measurement setup may be used for making precision measurements. 7

8 error model is required. Dependent on the calibration algorithm, this model requires a considerable amount of calibration standards, which is an undesired feature especially during on-wafer measurements. Different amounts of coupling are present during calibration using the various standards, but also during succeeding measurements, which makes the use of the more accurate 36-term error model somewhat unneeded, as the introduced coupling is not accounted for correctly anyway. It is believed that the extra complexity is not worth the extra effort, and in the present work it is chosen to reduce effects from coupling by increasing distance between the RF pads Theory and the normalization problem Recall, that 3-port S-parameters are defined by: b 1 = S 11 a 1 + S 12 a 2 + S 13 a 3 (1.1) b 2 = S 21 a 1 + S 22 a 2 + S 23 a 3 (1.2) b 3 = S 31 a 1 + S 32 a 2 + S 33 a 3 (1.3) where a i is the incident power wave 2,andb i is the reflected power wave at port i, defined by a linear transformation of the port voltages and currents [EL95]: a i = V i + Z oi I i 2 Re(Z oi ) b i = V i Z oi I i 2 Re(Z oi ) (1.4) where V i denotes the voltage at port i, I i denotes the current running into port i, denotes complex conjugate, and Z oi denotes a reference impedance of port i which can be arbitrarily chosen under the constraint Re(Z oi ) 0. A 2-port network analyzer can be used for making 3-port S-parameter measurements by using an extra termination e.g. a 50Ω impedance but this is not necessary. Applying this extra termination to the free port (referred to as the third port) reduces the Device Under Test (DUT) to a 2-port, and a set of 2-port S-parameters can be measured, see Figure 1.1. A sequence of three 2-port measurements is needed to get all 3-port S-parameter measurements. These are obtained e.g. by moving the termination to port 3 and measure port 1 to port 2, move the termination 2 The term power wave is incorrect as the actual unit is squareroot of watt, i.e. V/ Ω and a more correct nomenclature is normalized voltage wave. However, due to historical reasons the term power wave is commonly used and it is also adapted here.

9 Figure 1.1 Reduction of 3-port to a 2-port by use of an additional termination. By moving this termination to port 1, 2, and 3, respectively, three sets of 2-port S-parameters can be measured using a 2-port network analyzer. to port 2 and measure port 1 to port 3, and finally, by moving the termination to port 1 and measure port 2 to port 3. An example of three 2-port measurements is given below: [ S S m1 m1 11 S12 = m1 ] S21 m1 S22 m1 [ S S m2 m2 11 S13 = m2 ] S31 m2 S33 m2 [ S S m3 m3 = 22 S23 m3 S32 m3 S33 m3 ] (1.5) where m1, m2, and m3 refer to the three measurements, which in this case are: from port 1 to port 2, from port 1 to port 3, and from port 2 to port 3. Notice that all reflections coefficients are measured twice. A closer look at one of the measurements, say m1, is taken by rewriting the above parameters in terms of power waves. Assume that port 3 is terminated by a reflection coefficient Γ 3 defined by: Γ 3 = a 3 b 3 = V 3 + Z o3 I 3 V 3 Z o3 I 3 = V 3/I 3 + Z o3 V 3 /I 3 Z o3 = Z 3 Z o3 Z 3 + Z o3 (1.6) where Z 3 is the impedance of port 3 termination, corresponding to Γ 3. Inserting Equation (1.6) into Equations (1.1) and (1.3) yields: b 1 = S 11 a 1 + S 12 a 2 + S 13 Γ 3 b 3 (1.7) b 2 = S 21 a 1 + S 22 a 2 + S 23 Γ 3 b 3 (1.8) b 3 = S 31 a 1 + S 32 a 2 + S 33 Γ 3 b 3 (1.9) Inspection of Equation (1.7) and (1.8) reveals that the correct S-parameters (S 11, S 12, S 21,andS 22 ) are directly available if the last terms are zero. This is obtained in two ways. Either by ensuring that Γ 3 is zero or by ensuring that b 3 is zero. This leads to the requirements Z 3 = Z o3 or Z 3 = Zo3 (derived from equation (1.6) and (1.4, respectively)). As Re(Z o3 ) > 0 the latter condition requires that Re(Z 3 ) < 0whichisa negative resistance. Negative resistances insert power into the circuit when excited, and the latter solution is very likely to make the circuit

10 unstable. Furthermore, it requires active loads which complicates the measurements more than what is wanted, and it is not considered further in the present work. The first condition requires that the impedance of the third port is matched to the reference impedance (typically 50Ω) which is used in the present work and this is investigated later. To proceed, Γ 3 0 is assumed, and b 3 in Equation (1.9) is isolated and substituted into (1.7) and (1.8): b 1 = b 2 = ( S 11 + S ) 13S 31 Γ 3 1 S 33 Γ ( 3 S 21 + S 23S 31 Γ 3 1 S 33 Γ 3 ( a 1 + ) a 1 + S 12 + S ) 13S 32 Γ 3 a 2 (1.10) 1 S 33 Γ ( 3 S 22 + S ) 23S 32 Γ 3 a 2 (1.11) 1 S 33 Γ 3 Equations (1.10) and (1.11) provide the relation between measured and correct S-parameters for measurement m1: S11 m1 = S 11 + S 13S 31 Γ 3 1 S 33 Γ 3 (1.12) S12 m1 = S 12 + S 13S 32 Γ 3 1 S 33 Γ 3 (1.13) S21 m1 = S 21 + S 23S 31 Γ 3 1 S 33 Γ 3 (1.14) S22 m1 = S 22 + S 23S 32 Γ 3 1 S 33 Γ 3 (1.15) If the third port is ideally terminated, i.e. the termination impedance Z 3 equals the reference impedance Z o3 of port 3 then Γ 3 vanishes (see Equation (1.6)), and the latter terms cancel. If ideal terminations are used at all ports then the correct 3-port S-parameters can be formed e.g. by using S = S m1 11 S m1 S m1 21 S m1 12 S13 m2 22 S23 m3 = S31 m2 S32 m3 S33 m2 S 11 S 12 S 13 S 21 S 22 S 23 (1.16) S 31 S 32 S 33 which requires that Γ i =0fori {1,2,3}, where Γ i denotes the reflection coefficient of the termination at port i. In this case the overlapping measurements of Equation (1.5) are identical, and it does not matter which one is chosen. However, if the third port termination is nonideal, the overlapping measurements are no longer identical 3, and errors are encountered unless the mismatch is taken into account. This problem is termed the normalization problem, and it is the topic of the next section. 3 In special cases the overlapping measurements may still be identical. However, these special cases are easily identified and apply only to special circuits.

11 In coaxial environments at lower frequencies (below about 10 GHz) it is possible to obtain close-to-ideal terminations, however, at higher frequencies, and especially during on-wafer measurements where the third port termination typically is connected through cables and a probe it is difficult to terminate ideally. In practice the terminating impedance may also differ from port to port e.g. due to different lengths of cables. The objective of the present section is thus to establish a method for making error corrected 3-port S-parameter measurements applicable when the condition of ideal terminations is violated. Two basically different approaches are presented. The first is termed the renormalization method, and the other is termed the iterative method. Both methods are explained in the following The renormalization method Equation (1.12) to (1.15) provides examples of relations between measured S-parameters and the correct S-parameters. In general the relation is: S m ij = S ij + S iks ki Γ k 1 S kk Γ k (1.17) where k is the port to be terminated, i, j are the ports connected to the network analyzer, Γ k is the reflection coefficient of the termination, S m ij is the measured 2-port S-parameter, and S ij is the correct S-parameter. Notice that i, j k must be fulfilled. In general the reflection coefficient Γ k (a generalization of Equation (1.6)) is given by: Γ k = Z k Z ok Z k + Z ok (1.18) where k refers to the port number, Z ok is the reference impedance of port k, andz k is the reference seen looking into the termination impedance of port k. As previously mentioned, one way to enable correct determination of the 3-port S-parameters through 2-port measurements, is to ensure that Γ k is zero. This is obtained by either using an ideal termination Z k = Z ok which is typically impossible, or by redefining the reference impedance of the terminated port so that Z ok = Z k which is applied in the renormalization method. The principle of the method is: After 2-port calibration the ports connected to the network analyzer are normalized to 50Ω (typically), whereas the other ports are considered normalized to their actual termination impedances. By measuring all terminations all S-parameters normalized to 50Ω can be renormalized to the actual termination impedances

12 (or third port impedances). When all S-parameters are measured and renormalized, they can be concatenated and renormalized back to 50Ω. Tippet and Speciale [TS82] uses the renormalization 4 method for measuring multi-port devices with 2-port network analyzers. The renormalization equation is: S =(I S) 1 (S Γ)(I SΓ) 1 (I S) (1.19) where S is the renormalized S-parameter matrix, S is the S-parameter matrix to be renormalized, I is the identity matrix, and Γ is a diagonal matrix of the reflection coefficients of the new impedances, as seen from a source with the old reference impedance. Experience [TS82] shows that the validity of the renormalization transformation requires that at least one reflection coefficient (or renormalization impedance) is not perfectly reflecting. Also, the method by Tippet and Speciale requires two matrix inversions with the associated risk of numerical problems. Dropkin [Dro83] has refined the renormalization to a transformation requiring only one matrix inversion: S = S (I + S)Γ(I SΓ) 1 (I S) (1.20) Dropkin also suggests an approximation valid only with small mismatches, i.e. all elements of Γ must be small. The approximation has no matrix inversions: S = S (I + S)Γ(I S) (1.21) In practical applications the matrix inversions may not cause problems. However, [Dro83] presents a simple matched lossless two port, given by: ( 0 e jθ ) S = e jθ 0 (1.22) for which the expression the (I S) has zero determinant for certain values of Θ, and which clearly will give problems if the transformation given by Equation (1.19) is used. Dropkin [Dro83] also expects that less extreme cases can be numerically difficult. Rautio [Rau83] suggests a method stated to be valid for any termination impedance. The method is also classified as a renormalization method. It is based on specially developed Gamma-R parameters, which do not degenerate for short or open circuits. However the method still uses matrix inversions, and thus still possesses the risk of numerical problems. Furthermore, the method is quite complex, requiring several transformations, and it is thus omitted here. 4 Woods [Woo77] was the first to publish the derivation of the renormalization. However, his approach does not use matrix formulation, and the expressions are quite complicated for 3-port networks. Speciale [Spe80] has derived the matrix formulation of the renormalization, which is applicable to multiports in general.

13 1.1.3 The iterative solution Rautio and Schoon [Rau83] [Sch93] suggest iterative solutions based on simple analytical S-parameter calculations. Iterative solutions are subdue to the risk of nonconvergence or local convergence. However, with good starting guesses proper solutions are typically accessible. The iterative solution is explained in the present section. The method requires that three sets of 2-port S-parameters, and an additional three sets of reflection coefficients, are measured. The latter measures the amount of mismatch at the third port, i.e. the port not being measured during 2-port measurements. Equation (1.17) is used to form a set of nonlinear equations. Using the above mentioned three measurements, 12 equations arise; 4 from each measurement set. 12 complex equations with 9 complex unknowns form an overdetermined system, and provide the freedom to leave out some of the measurements, e.g. the reflection coefficients. However, this has not been used in the present work, and information from all measurements of the third port is included. The system of equations can be solved as an optimization problem. As the equations are complex, 24 real expressions (f 1,f 2,...,f 24 ) are first formed by taking the real and imaginary parts, respectively. Several cost functions can be defined. In the present work a least square problem is defined: 24 i=1 f 2 i =0 [ where, e.g. f 1 =Re S 11 S11 m1 + S 13S 31 Γ 3 1 S 33 Γ 3 ]. If a sensible start guess is available, the system of equations can be found using e.g. a Levenberg-Marquardt algorithm [Pre94]. If the mismatch at the third port is not considered severe, a sensible start guess is to use Equation (1.16). Up till now only single frequency measurements have been discussed. However, typically a frequency sweep is needed, and if the DUT is assumed not to be too frequency selective, and if the frequency steps are not too large, the solution from the first frequency point can be used as start guess in the succeeding frequency point, etc Verification of 3-port calibration methods To verify the methods presented in the previous sections, a small-signal single-gate FET (SGFET) model is used. For reference the SGFET model used is supplied by GEC-Marconi [GEC], and it is denoted F20 FET3. The employed parameter values are: NF=4, W=75, ID=0.5, Type=0.

14 To ease identification of the different methods tested they are denoted: Method (I) Iterative solution, Method (II) Renormalization using Equation (1.19), Method (III) Renormalization using Equation (1.20), and Method (IV) Renormalization using Equation (1.21). The test procedure is outlined below: 1. A set of 3-port S-parameters are generated using HP-EEsof [Hew] and the F20FET3 model (3-port), see Figure 1.2 (a). 2. Three sets of 2-port S-parameters are measured using the above FET model and a third port termination, see Figure 1.2 (b) through 1.2 (d). 3. Three (identical) sets of reflection coefficients of the third port termination are measured. 4. Postprocessing the latter two measured data sets using the 3- port calibration methods presented earlier results in a set of derived 3-port S-parameters 5. The derived and the 3-port S-parameters from step 1 are compared. Figure 1.2 Test circuits used during verification. Port 1 is gate, 2 is drain, and 3 is source. (a) is the circuit used for simulating 3-port S-parameters. Figure (b), (c) and (d) are 2-port circuits with the third port nonideally terminated.

15 Figure 1.3 HP-EEsof [Hew] schematic of the nonideal termination circuit. Units are Ω, nh and pf. To make a realistic test of the algorithm not only the real part but also the imaginary part of the termination is mismatched. The non-ideal termination is shown in Figure 1.3. The impedance of the third port termination is shown in Figure 1.4. To see the effect of this mismatch on the S-parameters, S 11 and S 21 are shown in Figure 1.5 for an ideal termination and for the mismatch. A severe effect is identified for S 11 at higher frequencies, and the opposite is observed for S 21 where the largest effect is seen at lower frequencies, and the termination circuit is thus considered appropriate for testing the calibration methods. Figure 1.4 Impedance versus frequency of the termination circuit replacing an ideal 50Ω. The abscissa goes from 0 to 20GHz and each division is 5GHz. First method I is tested. The result of this test is shown in Figure 1.6 and in Figure 1.7. Figure 1.6 displays S 12, S 13, S 21,andS 23 for the derived and correct 3-port S-parameters. It is seen that the parameters agree very well, and the graphical test displays no difference in Figure 1.6. The mathematical comparison includes all 3-port S-parameters. Two measures are calculated: (a) The maximum absolute error and (b) the maximum relative error in percent. The result is shown in Figure 1.7.

16 Figure 1.5 S 11 and S 21 for an ideal termination and for the nonideal terminations. S21 ideal S11 ideal S21 S11 Figure 1.6 Test result of method I. Plot of S 12, S 13, S 21,and S 23 for both the derived and the correct 3-port S-parameters. No visual difference is encountered. Figure 1.7 Test result of method I. (a) Maximum absolute errors, and (b) maximum relative errors in percent. All 3-port S-parameters are used in this test, i.e. the largest error of all S-parameters is plotted at each frequency point.

17 The maximum absolute errors are quite small, but the maximum relative errors have a peak at lower frequencies. A value of about 4.5 percent is observed. This seems to be a large error, but origins from the S 12 parameter approaching zero at lower frequencies. Also, the renormalization methods (II, III, IV) are tested. The results from using method II and III are practically identical, whereas method IV is invalid in the present case due to too large a mismatch at the third port. The conditions of method IV are not sufficiently fulfilled. The result of method II is shown in Figure 1.8 Figure 1.8 Method II: Two mathematical measures are shown: (a) Maximum absolute values, and (b) maximum relative errors in percent. All 3-port S-parameters are used in this test, i.e. the largest error of all S-parameters is plotted at each frequency point. It is seen that in this particular case no problems arise from using matrix inversions. Compared to method I, the absolute errors are almost identical whereas the differences appear when comparing relative errors. Method II is slightly more accurate than method I reducing the relative error from about 4.2 % to 0.4 %. Furthermore, method II is significantly faster. A Pentium Pro 200MHz PC with 64MB RAM is used to record elapsed times. Method I uses approximately 19 seconds whereas method II, III and IV use less than 1 second. The comparison shows that the derived 3-port S-parameters are sufficiently close to the correct 3-port S-parameters, and the algorithms are correctly implemented. If no matrix inversion problems are encountered methods II and III are preferred due to the more elegant solutions and slightly smaller errors. 1.2 Deembedding 3-port S-parameters Consider a 3-port DUT embedded by three circuits A, B, and C, which are cascode coupled to port 1, 2, and 3, respectively, see Figure 1.9. The problem of deembedding is to calculate the S-parameters of the DUT, i.e. S II when S-parameters of the embedded circuit S I and of the embedding circuits S A, S B,andS C are known. The elements of the above matrices are denoted Sij I, SA ij, SB ij, SC ij, SII ij, where i, j are the row and column indices, respectively.

18 Figure 1.9 Illustration of the deembedding problem i.e. to remove effects from circuita,b,andcto reach the wanted reference plane. Port 1 a 1 ' b 1 ' S A Measurement plane I a 1 b 1 Wanted plane II Device Under Test S II a 2 b 2 S B Port 2 a 2 ' b 2 ' a 3 b 3 S I S C Port 3 a 3 ' b 3 ' The method suggested in the present work is based on renormalization. It adapts the renormalization methods presented in the previous section to the deembedding problem. Renormalization method Below is listed the three steps used to deembed 3-port S-parameters based on the renormalization method. 1. The embedded 3-port S-parameters are reduced to three sets of 2-port S-parameters by terminating the third port with an ideal 50Ω termination. The equation for doing this is given by: S r ij = S ij + S iks ki Γ k 1 S kk Γ k where k is the port to be terminated, i, j are the other ports, Γ k is the reflection coefficient of the termination, Sij r is a 2-port S-parameter. Notice that i, j k must be fulfilled. 2. Each set of 2-port parameters are deembedded by the relevant circuits, A and B, B and C, or A and C. This can be done using a variety of conventional 2-port deembedding methods, e.g. by incorporating circuit specifications into error coefficients prior to calibration, see [HPb], or by using ABCD or transmission parameters, see [Poz90]. 3. The reflection coefficients, used for mismatch correction at the third port, are modified by extending them with the third circuit i.e. A, B or C. The extension of reflection coefficients is performed using: Γ e 1 = S A 11 + SA 12 SA 21 Γ 1 1 S A 22 Γ 1

19 Γ e 2 = S B 11 + SB 12 SB 21 Γ 2 1 S B 22 Γ 2 Γ e 3 = SC 11 + SC 12 SC 21 Γ 3 1 S C 22 Γ 3 Note that the orientation of the employed S-parameters is towards the termination. If error correction is done prior to deembedding then Γ 1 =Γ 2 =Γ 3 = 0, and the above equations reduce to: Γ e 1 = SA 11 Γ e 2 = SB 11 Γ e 3 = S C 11 An advantage of using this method, is that this method can be used prior to or after 3-port error correction is done, provided that the correct reflection coefficient extension formulas are used Verification of deembedding To test deembedding the renormalization method is tested using a practical example. The embedding circuit is shown in Figure It consists of from the left a 149µm wide microstrip line of length 500µm, a step, and a 40µm wide microstrip line of length 500µm. A copy of this circuit is connected to all ports of a single-gate FET transistor (SGFET), and the objective is then to deembed the transistor, i.e. to remove the effects from the embedding circuit. Figure 1.10 HP-EEsof [Hew] schematic of the embedding circuit used in the practical example. Embedded as well as deembedded S-parameters are shown in Figure The embedding circuits are seen to have a significant effect on the circuit. The SGFET S-parameters are not shown, as they look exactly like the deembedded data. The result of deembedding is also evaluated mathematically, see Figure Only small errors occur with the maximum relative error lower than 0.7% at the lower end of the frequency range. The latter is caused by small S-parameter values e.g. S 12. It is concluded that the deembedding algorithm performs as expected, and as only small errors are introduced it is accepted.

20 Figure 1.11 Embedded and deembedded S-parameters. S11 embedded S11 deembedded S21 embedded S21 deembedded Figure 1.12 Absolute (a) and (b) relative errors found by comparing correct S-parameters of transistor with data obtained from deembedding.

21 2-port calibration methods To enable use of the method suggested in Chapter 1 the employed 2-port S-parameters must have the correct reference plane and they must be normalized to the correct reference impedance 1. Both requirements are fulfilled by proper 2-port calibration which is the topic of the present chapter. The objective of this chapter is to discuss the choice of 2-port calibration methods used for on-wafer measurements. 2.1 Introduction Calibration is the process of establishing a known reference plane, i.e. to correct for systematic errors to a certain plane in space. Several methods have been proposed in literature (see e.g. [HPa], [EH79], [Mau87], [Lau91]). However, common to all is that a set of known circuits, called standards, are measured to determine how errors should be corrected. Two main principles of calibration exist: One-tier, and two-tier calibrations. (i) In one-tier calibrations, standards are inserted instead of the device under test (DUT), and when calibration is completed, the wanted reference plane is established. (ii) In two-tier calibrations an initial calibration is carried out to establish a well defined calibration plane. However, this calibration plane does not directly interface the DUT, and further postprocessing, called deembedding, must be carried out. A model is developed of the embedding circuits, and the effects are removed by deembedding. How this model is developed depends on the 1 Measurement errors can, to a certain extend, be distributed between erroneous reference planes and/or normalization impedances. 21

22 situation. In some situations the intervening circuit can be characterized through measurements, and in other situations simulations can be used to form a model. One-tier calibration needs no modeling of the embedding circuit. However, it may be difficult to manufacture accurate standards, and if nonideal standards are used it is necessary to obtain accurate knowledge of the characteristics. In two-tier calibration measurements, errors may propagate during deembedding, and thereby detoriate the results. Furthermore, it may be difficult to obtain sufficiently accurate models of the embedding circuits. 2.2 Calibration methods The presented methods differ in the error model used, and by which standards and measurements are needed to determine the parameters of the error model. The following methods are one-tier calibration methods. However, they are straightforward to extend to two-tier calibrations, by employing different deembedding schemes. The following presentation is not an attempt to be exhaustive, but rather to present some commonly used calibration methods. SOLT calibration The commonly used method utilizes a 12-term error model, see e.g. [HPa]). It is called the SOLT calibration. It utilizes four calibration standards: SHORT, OPEN, LOAD and THRU, and provides a noniterative solution. As the measurement setup differs when forward and reverse measurements are carried out, the 12-term error model actually consists of two 6-term error models. The accuracy of the calibration depends on how well the standards are known. Generally, MMIC shorts are inductive, open circuits are capacitive and radiate energy, and accurate loads are difficult to manufacture. These facts make the SOLT calibration technique less usable with MMIC measurements, especially at higher frequencies. However, the manufacturing techniques are still improving and at lower frequencies this technique may yield sufficiently accurate measurements. TRL calibration Engen and Hoer [EH79] have presented a technique which is called the THRU-REFLECT-LINE (TRL) calibration. This method also provides a non-iterative solution as the SOLT method. However, it has eliminated the need for a thorough knowledge of the calibration standards. It requires that the characteristic impedance of the LINE standards 2 is 2 LINE standards refer to both THRU and LINE unless THRU is explicit.

23 known, and that the sign of the reflection standard is known. Furthermore, the derivation of the method assumes a reflection-free insertion of the LINE standards. The basic method uses an 8-term error model, but have later been extended by Hewlett-Packard to use the 12-term error model [HPc]. It is not capable of calibrating systems with considerably leakage as demonstrated by Butler et al. [But91]. Another disadvantage is that it is relatively narrow banded 3, and requires long transmission lines at lower frequencies. The characteristic impedance of MMIC lines are sensitive to the thickness of the substrate. Variations may alter the characteristic impedance, and thus reduce the accuracy of a TRL calibration. However, the variations are also part of the final application circuit, and can be considered a new characteristic impedance of the system. Despite the mentioned disadvantage it has the edge over the conventional SOLT technique as it does not require thorough knowledge of the standards. A generalization of the TRL technique is the LINE-REFLECT-LINE (LRL) calibration, which has substituted the THRU-LINE pair with a LINE-LINE pair. LRM calibration The LRM technique [Lau91], [Lau90] tries to use the broadband advantages of the SOLT calibration and combines them with the advantages of the TRL calibration methods. It uses three standards: LINE, RE- FLECT, and a MATCH, and utilizes the 8-term error model, like the TRL calibration. Also this method can be extended to use a 12-term model by adding isolation measurements. Implemented on the HP8510B network analyzer [Hew], this method requires a 50Ω match. This method has proven attractive, but has one major drawback in terms of accuracy. The accuracy of calibration depends strongly on how accurate the MATCH is probed (see [Dav90]), and on how accurate the MATCH impedance resembles 50Ω. The latter requirement is not determined by the method, but merely by the HP8510B network analyzer [Hew]. Using off-line calibration or newer equipment easily solves the latter problem. Other methods A variety of other methods exist see e.g. [Heu95], [HS94], [Sil94], [Sil92], [But91], [Soa91], [Wil90], [Her90], [Spe77], and which one to choose depends on the amount of a priori knowledge of the required standards. Other factors are briefly discussed in the following. 3 TRL requires insertion phase difference between THRU and LINE to be in the range degrees [Wil90] [Mau87] [HPc]. For an example of practical possible lengths refer to page 45

24 Choosing a calibration method Which calibration method to choose in a given situation depends on factors such as: Needed accuracy. Measurements used for postprocessing (e.g. for modeling) typically require higher accuracy than other measurements where errors can not propagate. Measurement frequencies. Frequency range and area put conditions on the calibration method. Speed of solutions. Iterative methods are, typically, slower than analytic methods. If a huge amount of automatic calibrations are to be carried out this may be important. Ease of use. If specifications of standards require a huge effort, other methods might be considered. Generality, e.g. should the calibration chip be usable for several application chips or should it be designed for one application chip only. Practical issues, i.e. if fixed or movable probes are to be used (see Chapter 3). Several factors are opposite, and a tradeoff is thus necessary. 2.3 Verification of calibration A variety of methods used for evaluating calibration methods has been presented, see e.g. [Nis94], [Pur93], [But91], [Soa91], [Lau91], [WG90]. This section briefly discusses pros and cons using these methods. Nishimoto et al. [Nis94] compares the calibrations by measuring a HEMT, extract small-signal parameters, and compares the variance on the extracted small-signal parameters e.g. for SOLT relative to TRL. This approach is certainly attractive to device modelers. However, it has a drawback as small-signal parameters must be extracted with the extra uncertainties introduced during extraction. Purroy and Pradell [Pur93] evaluate calibrations by calculating a reference impedance. The concept is attractive as one of the goals of calibration certainly is to establish a certain reference impedance. However, the proposed method has three minor problems: (i) Exact knowledge of the test circuit, on which the reference impedance is calculated must exist, (ii) The reference impedance is assumed real-valued, and (iii) The authors suggest an open circuit as the test circuit. The latter does not expose all error coefficients, but merely display the validity of the reflection error coefficients.

25 A commonly used method (see e.g. [But91], [Lau91]) is to compare different calibration methods. If the results are comparable it is likely that the calibrations are valid. This method has at least one drawback as it requires a calibration that is valid under the given conditions. If such a method exists why bother to make a new? Admitted, it can be used to verify calibration methods under constrained conditions, but to verify performance under the complete set of conditions is not useful. Another common practice (see e.g. [Lau91]) is to inspect calibrated S-parameters of different test circuits. A priori knowledge of the test circuits is used to identify calibration errors. A typical example is measurements of open circuits having large amounts of ripple. This is most likely an unphysical response, and a calibration error is identified. This method is appropriate for identifying calibration errors, but is rather coarse when comparing calibration errors, unless one of the methods is highly inaccurate. Woodin and Goff [WG90] uses, in experimental societies, a very attractive and well known method. The quality factor of a resonator test circuit is derived prior to and after calibration. By using a low coupling resonator, the Q factor is essentially insensitive to the load. This method enables an absolute evaluation of the calibration, as the determined Q factor is known a priori to calibration. One disadvantage of this method is that it is rather narrow banded, and a number of resonators are needed to cover larger frequency bands. Other authors (e.g. [But91], [Soa91]) use simulations for comparison. Simulations have a set of advantages, such as: (i) They are not affected by noise (except for small truncation errors), and (ii) the ideal result is known a priori. It is relatively straightforward to simulate distortions on calibration standards to see the calibration methods sensitivity to incorrect modeling. However, simulations are limited due to models only being a simplification of the actual setup, e.g. they can not model the exact coupling between the probe tips, or the unwanted coupling from probes to other metal surfaces on the calibration substrate. As a consequence, the ultimate test is an experimental investigation. Choosing a verification method As evident, no single method is superior to the others, and which one to choose depends on the application. Due to the nature of the error correcting model, measurements on some test circuits are more accurate than others. The reason is that some responses are more sensitive to some error coefficients than others. An evaluation based on a single test circuit, e.g. an OPEN does not reveal the overall accuracy of the calibration method.

26

27 On-wafer measurements and related problems On-wafer measurements have some advantages, but certainly also some disadvantages compared to conventional coaxial measurements. By coaxial measurements is meant measurements where a reference plane is established by calibration using coaxial standards. It is not currently possible to manufacture on-wafer standards with the same precision as coaxial standards. OPEN s are capacitive and radiate, SHORT s are inductive, LOAD s are sensitive to fabrication spread, and transmission lines are dispersive and with losses. A wide variety of new calibration methods have thus been developed to come around the mentioned problems. The most promising methods are presented in Chapter 2. Despite the mentioned disadvantages on-wafer measurements are attractive to (i) the circuit designer, and to (ii) the device modeler. (i) The circuit designer can save time by avoiding packaging prototype chips. Also, on-wafer measurements enable selection of good chips prior to packaging which may decrease costs. (ii) The device modeler typically solders a discrete component to a microstrip environment, or position it in a specialized fixture, before measurements are carried out. However, bonding wires, device package and fixture introduce extra modeling uncertainties. If not modeled correctly wires, package and fixture may detoriate performance of the obtained model. Use of on-wafer measurements removes these uncertainties. 27

28 General error sources A typical measurement set-up for performing on-wafer biased 2-port measurements comprises a microwave source, a vector network analyzer, bias tee s for insertion of bias, a probe station with probe tips, and the device under test (DUT). Without trying to be exhaustive a discussion of commonly encountered errors are presented below. For a thorough discussion of error sources related to network analyzers, see [HPa]. Errors are typically grouped into four classes: Systematic errors: Systematic errors are repeatable. Some of these errors can be accounted for but not all, e.g. due to limitations of the employed calibration methods. Random errors: Random errors are caused by noise. The effect of random errors can be reduced but never eliminated due to their statistical nature. Repeatability errors: A special group of errors which primarily origin from non-identical interconnections in the measurement equipment. Drift errors: These errors primarily arises due to temperature variations in the equipment and the surrounding environment. In network analyzers errors origin from nonideal reflectometers, differences between reference and signal paths, nonideal isolation between source and other circuits, impedance mismatches, etc. These errors are obviously systematic errors, which often can be greatly reduced by calibration. Random errors origin from noise from the source and internally generated noise as well as radiation from other equipment in the laboratory. Other sources of random errors can be personnel with heavy boots, power up of equipment, a drop in power supply, some one using a mobile phone nearby the measurement setup etc. Though these errors may seem obvious and easy to avoid, longer lasting measurements may easily be affected by the mentioned sources. On-wafer measurements are, in particular, sensitive to noise due to the naked chips, compared to packaged chips. Repeatability errors origin from deviations in connections due to different amounts of dirt, different torque (or pressure) applied, thermal effects in active switches etc. Switches used in the network analyzer test set may show slightly different ON characteristics versus repeated ON/OFF shifts. During calibration a lot of different standards are connected and disconnected enhancing the risc of repeatability errors. The latter distorts the calibration coefficients leading to erroneous measurements.

29 Drift errors origin e.g. from changes in the environmental temperature during measurements. These errors may be caused by people opening a door, or an air freshener starting off. The measurement equipment develops heat itself, which must be removed from the measurement setup. This further makes it difficult to keep the same operating temperature during measurements. The causes may seem trivial, but during long lasting measurements it may be difficult to keep activities near measurement set-up to a minimum. To minimize the effects of temperature drift within the equipment the power should be turned on for a short period prior to doing the actual calibrations and measurements. A more expensive and more accurate way to reduce these errors is to use a temperature controlled measurement set-up. Also, time in between calibration and measurement should be reduced to reduce drift effects. On-wafer related problems The largest problem related to on-wafer measurements is coupling mainly due to the close proximity of probe tips, but also due to close standards during calibration. Currently, the only method used for reducing this problem is to increase distance between the probe tips and circuits on each chip. However, large distances are equal to large costs, and a tradeoff should be done. This topic is covered from page 35. Some probe stations are supplied with movable probes. By operating the moving screws the probes can be lowered/raised, steered left/right, forward/back, and even rotated for planarity adjustment. Other systems use fixed probes. The fixed probe system is attractive to automatic measurement systems where a huge amount of devices are measured. However, as the probe tips have a fixed distance both test circuits and calibration kits must meet certain constraints. Calibration kits using standards with different probing pad distances cannot be used with this probe system. Contacting (or probing) is a destructive process. Each time a chip is measured its RF pads are worn. Especially circuits for calibration are often used, and thus very subdue to wear. Some manufacturers have tried to overcome this problem by using very strong substrates for their calibration kits, thus supporting the metal contacts better, and thereby prolonging lifetime. The commonly available probe tips are covered with Beryllium-Copper (BeCu) or Tungsten. Carbonero et. al [Car95] discusses the different contacting properties of these materials when used with silicon wafers. The conclusion is that although BeCu is most suited for gold plated pads (often used with GaAs wafers), and offer the lowest contact resistance. Tungsten is most suited for alumina plated pads (typically used with Silicon wafers). Greg Boll [GGB] mentions that the contact resistance from BeCu tips to alumina pads is typically 0.2Ω whereas the contact resistance from BeCu to alumina is approximately 0.8Ω. BeCu is a softer material than tungsten and is thus faster worn than tungsten.

30 Contact resistance is subdue to changes, due to different amounts of oxides and dirt on the contacting surfaces. This leads to the next issue, namely repeatability of on-wafer measurements. The probe tips must also be pressed with exactly the same pressure towards the chip to minimize varying contact resistances. This is ensured on automatic measurements by means of pressure sensors, and on manual measurements by using the same amount of overtravel. Overtravel is defined as the amount of vertical movement of the probes after contact has been initiated. Due to the above mentioned damage each time a chip is measured, the repeatability is decreased with the number of probings. Different overlapping of the probing pads from measurement to measurement are also sources to decreasing repeatability. Methods for cleaning probe tips are suggested by Carbonero in [Car95]. Probe tips are, besides material and electrical properties, characterized by geometry, e.g.: Pitch 1, footprints, and angle between tips to probing pads. Furthermore, probe tips are currently available using coaxial or coplanar configurations. The pitch size is a trade off between (i) large is expensive and (ii) small increase capacitive coupling to ground. The size used currently at Aalborg University is 200µm pitch. Possible signal configuration or footprints are Ground-Signal-Ground (GSG), Ground-Signal (GS) or Signal- Ground (SG). GSG possesses the best electrical properties due to (i) best grounding (ii) least amount of higher propagation modes generated. However, GS and SG signal configurations require less die area and are thus less expensive in terms of chip area. A set of typical electrical data of a probe is listed in Table 3.1. The data is taken from Picoprobes probe model 40A, with GSG signal configuration. The probes are manufactured by GGB Industries [GGB]. Table 3.1 A set of typical electrical specifications for a probe. The shown data origins from Picoprobe model 40A with a GSG signal configuration. The probes are manufactured by GGB Industries, Inc, Naples, Florida, USA [GGB]. Measurement Specs Typical Frequency range DC to 40GHz Insertion loss < 1.0dB to 40GHz 0.7dB Return loss > 30dB to 4GHz 35dB > 20dB to 26GHz 23dB > 18dB to 40GHz 20dB Crosstalk < 38dB to 40GHz Crosstalk is measured with two probes contacting a bare sapphire substrate 100µm apart. For GS and SG configurations both insertion loss and return loss are worse. If the probe tips are not planar (or close to planar) to the probing pads another source of measurement error occurs, which is referred to as pla- 1 Pitch is the distance between center of the contacting surfaces, i.e. the RF pads

31 narity errors. This can be avoided by using certain alignment substrates. Marks pressed into the metals on top of the substrate indicate whether the probe tips are planar to the substrate surface or if an adjustment should be made. Improving accuracy In the following a set of actions usable for obtaining accurate measurements are proposed. Identical environment, i.e. RF pad geometries and substrate characteristics, during calibration and measurements should be aimed at. However, even with identical geometries coupling can not be correctly accounted for. This is due to the fact that different amounts of coupling arises when different circuits are measured. In other words, the characteristics of the unintentional antennas change with different standards and Devices Under Test (DUTs). Currently, the only method used to reduce coupling problems, is to increase distances between RF pads and other circuits. This approach is also used in the present work. Averaging is used extensively to reduce random errors. If noise contributions are uncorrelated with zero mean, it can be reduced by averaging. Samples S i taken from this stochastic process can be represented as: S i = S + n i where S is the wanted signal without noise, and n i is the noise contribution characterized by having zero mean value and by its variance σ 2 n i. Signal-to-noise ratio SNR for this process is: SNR Si = E2 [S i ] Var[S i ] = S 2 σ 2 n i where E[ ] denotes the mean value, and Var[ ] denotes the variance. A new stochastic process is formed by averaging: S = 1 M M S i i=1 where M is the averaging factor, and S is the result from averaging. Assume that noise samples are uncorrelated, i.e. E[n i n j ]=0ifi j, then SNR for S is SNR S = E2 [ S] Var[ S] = M S 2 σ 2 n i The improvement in SNR before and after averaging is 10 log(m) db. This means that using M = 128 improves SNR with approximately 21dB. The latter is a theoretical obtainable value which requires the

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