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1 JIJI MIROLTRONIS O., Ltd 8 TRIs Rev.3. SRIPTION: The JT8 series of double mesa technology provide high interference immunity, They can be used as an static ON/O function in electrical control system, and used as a driver of low power and high inductance or resistive loads, such as jet pumps of dishwashers, fans of air-conditioner... rom all three terminals to external heatsink, JT8xx-xx provides a rated insulation voltage of 5 V RMS, and JT8xx-xx provides a rated insulation voltage of V RMS. 3 3 TO-5 TO- Insulated 3 3 TO-5 TO- Non-Insulated MIN TURS Symbol Value Unit T() (3) I T(RMS) 8 V RM /V RRM V 3 TO- Insulated I T 5 or or 5 m T() SOLUT MXIMUM RTINS Parameter Symbol Value Unit Storage junction temperature range T stg -4-5 Operating junction temperature range T j -4-5 Repetitive peak off-state voltage( T j =5 ) V RM V Repetitive peak reverse voltage( T j =5 ) V RRM V Non repetitive surge peak Off-state voltage V SM V RM + V Non repetitive peak reverse voltage V RSM V RRM + V TO-5/ TO-5 (T = ) RMS on-state TO-(Ins)/ current TO-(Ins) (T =9 ) TO-(Non-Ins) (T =3 ) Non repetitive surge peak on-state current (full cycle, =5z) I T(RMS) 8 I TSM / 7-

2 I t value for fusing ( tp=ms) I t 3 s Rate of rise of on-state current (I = I T ) di T /dt 5 /μs Peak gate current I M verage gate power dissipation P (V). W Peak gate power P M W LTRIL RTRISTIS (T j =5 unless otherwise specified) Symbol Test ondition Quadrant Value JT85 JT8 JT85 Unit I T V =V R L =33Ω Ⅰ-Ⅱ-Ⅲ MX 5 5 m V T Ⅰ-Ⅱ-Ⅲ MX.3 V V V =V RM T j =5 R L =3.3KΩ I L I =.I T Ⅰ-Ⅱ-Ⅲ MIN. V Ⅰ-Ⅲ 5 35 MX Ⅱ 3 55 I I T =m MX 5 3 m dv/dt V =/3V RM ate Open T j =5 m MIN 6 V/μs STTI RTRISTIS Symbol Parameter Value(MX) Unit V TM I TM = tp=38μs T j =5.55 V I RM T j =5 5 μ V =V RM V R =V RRM I RRM T j =5 m TRML RSISTNS Symbol Parameter Value Unit TO-5/ TO-5.5 R th(j-c) junction to case() TO-(Ins) 3.3 TO-(Non-Ins).3 /W TO-(Ins) / 7-

3 ORRIN INORMTION switch JieJie Microelectronics o.,ltd J T 8 - -US :TO-(Ins) :TO-(Ins) :TO-(Non-Ins) :TO-5 K:TO-5 Triacs IT(RMS):8 5: IT-3 5m : IT-3 m 5: IT-3 5m :VRM /VRRM V PK MNIL T Φ Max 3.5mm L L V TO- Ins L L V / 7-

4 PK MNIL T L V V V L L L L L TO-5 V L L V V V L L MIN V TO-5 V 4 4 V / 7-

5 PK MNIL T Φ Max 3.8mm V L L L L TO- Ins V Φ Max 3.8mm L JI L V L L TO- Non-Ins V / 7-

6 I. Maximum power dissipation versus RMS on-state current P(w) I.: RMS on-state current versus case temperature IT(RMS) () α= TO-5/ TO-5 TO- (Non-Ins) IT(RMS) () Tc ( ) TO-(Ins)/ TO-(Ins) I.3: Surge peak on-state current versus number of cycles 8 6 ITSM () t=ms One cycle I.4: On-state characteristics (maximum values) ITM () Tj=5 4 Tj=5 Number of cycles I.5: Relative variations of gate trigger current versus junction temperature IT(Tj) /IT(Tj=5 ) 3..5 VTM (V) I.6: Relative variations of holding current, latching curretn versus junction temperature I,IL(Tj) /I,IL(Tj=5 ) IT3 IT&IT..5 IL I...5 Tj ( ) Tj ( ) Information furnished in this document is believed to be accurate and reliable. owever, Jiangsu JieJie Microelectronics o.,ltd assumes no responsibility for the consequences of use without consideration for such information nor use beyond it. Information mentioned in this document is subject to change without notice, apart from that when an agreement is signed, Jiangsu JieJie complies with the agreement. Products and information provided in this document have no infringement of patents. Jiangsu JieJie assumes no responsibility for any infringement of other rights of third parties which may result from the use of such products and information. This document is the third version which is made in -June-5. This document supersedes and replaces all information previously supplied. is a registered trademark of Jiangsu JieJie Microelectronics o.,ltd. opyright 5 Jiangsu JieJie Microelectronics o.,ltd. Printed ll rights reserved / 7-

7 SUST RPLMNTS ST NXP JieJie JT85- JT8- JT85- JT85-K JT8-K JT85-K JT85- ST83-8T TT8-8 JT85- JT8- ST83-8P TT8X-8 JT / 7-

JIEJIE MICROELECTRONICS CO., Ltd

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