DELAY CALCULATIONS FOR VARIOUS CODE CONVERTERS
|
|
- Gerald Davidson
- 5 years ago
- Views:
Transcription
1 DELAY CALCULATIONS FOR VARIOUS CODE CONVERTERS Rita Mahajan 1, Gourav Saini 2, Deepak Bagai 3 1 Assistant Professor, 2 ME student, 3 Professor, Department of Electronics and Communication Engineering, PEC University of Technology, Chandigarh, India. Abstract Code specific high speed ALU is the one in which output can be taken out in any code of our choice. Moreover input can be given in any code. In high speed operations in such ALUs, speed of the code converters also matters. So calculation of speed of various code converters is important. In this paper, speed of various code converters has been measured in terms of delay and compared. The results have been taken out. Keywords- Arithmetic logic unit, Binary Coded Decimal, Hardware Descriptive Language, Seven Segment Display, Basic Input/Output System. I. Introduction Code converters are an integral part of any digital circuit. In normal operations a number is often converted from one code to another. Different codes have different applications depending upon their various properties. For instance, a number 5 in bcd in coded as 0101 in binary. Sometimes a situation may arise where some process cannot completed without converting a code to another code. Moreover power requirement and switching delay may be different for different codes. Some techniques have been developed to increase the speed of the code converters like using csmt gates[5], weighted code approach to generate gray codes[6], some other methods to generate gray codes[7], code converters using reversible gates[10]. A non conventional approach to generate gray codes[4] has also been discussed. Some basic operations like addition of BCD numbers using non standard codes[3] can also be done.but in this paper only conventional methods of code converter has been taken into account and their speed comparison has been done.xilinx is a software used to analyse the HDLS. It plays an important role in synthesis and simulation of the desired code. System level testing can also be done using Xilinx ISE. Logical, functional as well as behavioral verification can be done using Xilinx. I. Basic Codes and their applications Binary Code When the value of all entries is represented by using only 1 and 0 the code so formed is called binary code. Any input given to a computer is first converted to binary before any machine operations are performed on the number. Few applications of binary code are: 1. In computing and telecommunication, binary code is used to encode data in various types[1]. 2. From binary code it is easier to get octal, hexadecimal and other codes rather than direct conversion. Binary Coded Decimal It is a 4-bit code that represents all the values from 0 to 9. After this, 10 is represented by a 5 bin BCD code. All the works and values used by human beings are in BCD code. While working on a computer, the input that we give to the computer and the output that we get from computer is in BCD form. 96
2 Some applications of BCD code are: 1. Since it is a human readable code, the complexity in understanding and doing various calculations is reduced to a great extent. 2. The BIOS in computers usually store the data like date and time in BCD format. 3. Floating point algorithms used in Atari 8-bit family is in the form of BCD. Gray Code It has an important property that there is only one bit change whenever the number is incremented by 1. It is a non-weighted code. The reflected binary code was originally designed to prevent spurious output from electromechanical switches. Some applications of Gray Code 1. It is used to find the position in rotary encoders. 2. It is used to design a no glitch encoder circuit. 3. It helps to reduce noise in digital counters. Excess 3 Code It is self-complementary and non-weighted code. It is obtained by 0011 to a given binary number. Since simple conversion of binary to excess 3 and excess 3 to binary stands a great advantage. Some applications of Excess 3 code are: In case we need to find the complement of a given number, simply invert all the digits. BCD to Gray Conversion II. Code Converters Table 1:Truth Table for BCD to Gray Conversion X X X X X X X X X X X X X X X X X X X X X X X X Here ABCD are in BCD whereas WXYZ are the corresponding gray codes. W=A+BC+BD X=BC Y=B+C Z=A B C D+BCD+AD +B CD 97
3 Gray to BCD Conversion Table 2:Truth Table for Gray to BCD Conversion X X X X X X X X X X X X X X X X X X X X X X X X Here ABCD are the gray codes and WXYZ are the respective BCD codes. W = A X = A B Y = A BC + B C Z = A BC D + B C D + AD + BCD + B CD BCD to Excess-3 Table 3:Truth Table for BCD to Excess-3 Conversion Here ABCD are the BCD codes whereas WXYZ are the respective Excess-3 codes. Z = D Y = CD+C D =CD(C+D) X= B C+B D+BC D = B (C+D) +BC D W= A+BC+BD=A+B(C+D) 98
4 Excess-3 to BCD Table 4:Truth Table for Excess-3 to BCD Conversion X X X X X X X X X X X X X X X X X X X X X X X X Here ABCD are the Excess-3 codes whereas WXYZ are the respective BCD codes. W=AB+ACD X=B C +BCD+D Y=C D+CD Z=D Binary to BCD Converter Table 5:Truth Table for Binary to BCD Conversion A B C D V W X Y Z Here ABCD are the Binary codes whereas VWXYZ are the respective BCD codes. V=AB+BC W=AB C 99
5 X=A B+BC Y=ABC +A C Z=D BCD to Seven Segment Display Table 6:Truth Table for BCD to Seven Segment Display Conversion A B C D a b c d e f g Here ABCD are the BCD codes whereas abcdefg are the respective Seven Segment Codes. a=a+c+bd+b D b=b +C D +CD c=b+c +D d=a+b C+BC D+CD +B D e=b D +CD f=a+c D +BC +BD g=a+b C+CD +BC III. Speed and Delay Speed of a given logic circuit is inversely proportional to total delay of the circuit. Total delay of various code converters has been calculated which gives an exact idea of how fast a given code converter is. Table 7:Delay Calculation for various codes. Code Converter Net Delay(ns) BCD to Gray Gray to BCD BCD to Excess Excess 3 to BCD Binary to BCD BCD to Seven Segment Display
6 Delay Delay BCD To Gray Gray to BCD BCD to Excess 3 Excess 3 to BCD Binary to BCD BCD to seven segment display Figure 1:Bar Graph for delay of various Code Convertors The delay for BCD to Gray code is ns. For Gray to BCD it is calculated to be0.934 ns, ns for BCD to Excess-3, for for Excess-3 to BCD, ns for Binary to BCD and ns for BCD to SSD. IV. Conclusions As per the results, it has been found that Binary to BCD converter is the slowest with a delay of 1.663ns, since 4 bit binary gets converted into 5-bit BCD. BCD to seven segment display is the fastest with a delay of ns.the delay for BCD to Gray conversion has also been recorded to be low i.e ns. So it can also be used for high speed applications. Athough these codes can be made faster using some other techniques like binary reflected code[2], yet the speed performance of the basic code converters without interfering with the basic transistor structure has been calculated. So we can convert one code to another with the help of code converters as required by the application we are using. For instance, if we need to find the complement of a given number. Simply by using BCD to Excess-3 code the self complementing feature can brought into light.in case we need to use a code in digital counter or to find the position in rotary encoder, we can convert given BCD to gray codes. Moreover, we can know the speed of operation of the conversion. References [1]Petrova, P.D. and Karapenev, B.D., 2003, October. Synthesis and simulation of binary code converters. In Telecommunications in Modern Satellite, Cable and Broadcasting Service, TELSIKS th International Conference on (Vol. 2, pp ). IEEE. [2] Agrell, E., Lassing, J., Strom, E.G. and Ottosson, T., On the optimality of the binary reflected Gray code. IEEE Transactions on Information Theory, 50(12), pp
7 [3] Coulston, C. and Dave, V., 2012, February. Addition of BCD digits using non-standard codes. In Electrical Communications and Computers (CONIELECOMP), nd International Conference on (pp ). IEEE. [4] Ahmad, A. and Bait-Shiginah, F., A nonconventional approach to generating efficient binary Gray code sequences. IEEE Potentials, 31(3), pp [5] Shukla, V., Singh, O.P., Mishra, G.R. and Tiwari, R.K., 2015, December. Application of CSMT gate for efficient reversible realization of binary to gray code converter circuit. In 2015 IEEE UP Section Conference on Electrical Computer and Electronics (UPCON) (pp. 1-6). IEEE. [6] Grover, L., Weighted Code Approach to Generate Gray Code. IEEE Potentials, 34(3), pp [7] Bitner, J.R., Ehrlich, G. and Reingold, E.M., Efficient generation of the binary reflected Gray code and its applications. Communications of the ACM, 19(9), pp [8] Mehta, H., Owens, R.M. and Irwin, M.J., 1996, March. Some issues in gray code addressing. In VLSI, Proceedings., Sixth Great Lakes Symposium on (pp ). IEEE. [9] Marschall, P., Code converters. U.S. Patent 3,691,554. [10] Saravanan, M. and Manic, K.S., 2013, March. Energy efficient code converters using reversible logic gates. In Green High Performance Computing (ICGHPC), 2013 IEEE International Conference on (pp. 1-6). IEEE. 102
CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April
CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April Objective - Get familiar with the Xilinx ISE webpack tool - Learn how to design basic combinational digital components -
More informationSample Test Paper - I
Scheme G Sample Test Paper - I Course Name : Computer Engineering Group Marks : 25 Hours: 1 Hrs. Q.1) Attempt any THREE: 09 Marks a) Define i) Propagation delay ii) Fan-in iii) Fan-out b) Convert the following:
More informationUnit 3 Session - 9 Data-Processing Circuits
Objectives Unit 3 Session - 9 Data-Processing Design of multiplexer circuits Discuss multiplexer applications Realization of higher order multiplexers using lower orders (multiplexer trees) Introduction
More information5 Binary to Gray and Gray to Binary converters:
5 Binary to Gray and Gray to Binary converters: Aim: To realize a binary to Grey and Grey Code to binary Converter. Components Required: Digital IC trainer kit, IC 7486 Quad 2 input EXOR The reflected
More informationTotal Time = 90 Minutes, Total Marks = 50. Total /50 /10 /18
University of Waterloo Department of Electrical & Computer Engineering E&CE 223 Digital Circuits and Systems Midterm Examination Instructor: M. Sachdev October 23rd, 2007 Total Time = 90 Minutes, Total
More informationCHAPTER 7. Solutions for Exercises
CHAPTER 7 Solutions for Exercises E7.1 (a) For the whole part we have: Quotient Remainders 23/2 11 1 11/2 5 1 5/2 2 1 2/2 1 0 1/2 0 1 Reading the remainders in reverse order we obtain: 23 10 = 10111 2
More informationUNIT II COMBINATIONAL CIRCUITS:
UNIT II COMBINATIONAL CIRCUITS: INTRODUCTION: The digital system consists of two types of circuits, namely (i) (ii) Combinational circuits Sequential circuits Combinational circuit consists of logic gates
More informationDigital Systems Overview. Unit 1 Numbering Systems. Why Digital Systems? Levels of Design Abstraction. Dissecting Decimal Numbers
Unit Numbering Systems Fundamentals of Logic Design EE2369 Prof. Eric MacDonald Fall Semester 2003 Digital Systems Overview Digital Systems are Home PC XBOX or Playstation2 Cell phone Network router Data
More informationChapter 2. Digital Logic Basics
Chapter 2 Digital Logic Basics 1 2 Chapter 2 2 1 Implementation using NND gates: We can write the XOR logical expression B + B using double negation as B+ B = B+B = B B From this logical expression, we
More informationReg. No. Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester. Computer Science and Engineering
Sp 6 Reg. No. Question Paper Code : 27156 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2015. Second Semester Computer Science and Engineering CS 6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common
More informationWhy digital? Overview. Number Systems. Binary to Decimal conversion
Why digital? Overview It has the following advantages over analog. It can be processed and transmitted efficiently and reliably. It can be stored and retrieved with greater accuracy. Noise level does not
More informationMidterm Examination # 1 Wednesday, February 25, Duration of examination: 75 minutes
Page 1 of 10 School of Computer Science 60-265-01 Computer Architecture and Digital Design Winter 2009 Semester Midterm Examination # 1 Wednesday, February 25, 2009 Student Name: First Name Family Name
More informationCombinational Logic. Course Instructor Mohammed Abdul kader
Combinational Logic Contents: Combinational and Sequential digital circuits. Design Procedure of combinational circuit. Adders: Half adder and Full adder. Subtractors: Half Subtractor and Full Subtractor.
More informationDigital Electronics. Part A
Digital Electronics Final Examination Part A Winter 2004-05 Student Name: Date: lass Period: Total Points: Multiple hoice Directions: Select the letter of the response which best completes the item or
More information3. Complete the following table of equivalent values. Use binary numbers with a sign bit and 7 bits for the value
EGC22 Digital Logic Fundamental Additional Practice Problems. Complete the following table of equivalent values. Binary. Octal 35.77 33.23.875 29.99 27 9 64 Hexadecimal B.3 D.FD B.4C 2. Calculate the following
More informationDesign of Combinational Logic
Pune Vidyarthi Griha s COLLEGE OF ENGINEERING, NASHIK 3. Design of Combinational Logic By Prof. Anand N. Gharu (Assistant Professor) PVGCOE Computer Dept.. 30 th June 2017 CONTENTS :- 1. Code Converter
More informationChapter 4: Combinational Logic Solutions to Problems: [1, 5, 9, 12, 19, 23, 30, 33]
Chapter 4: Combinational Logic Solutions to Problems: [, 5, 9, 2, 9, 23, 3, 33] Problem: 4- Consider the combinational circuit shown in Fig. P4-. (a) Derive the Boolean expressions for T through T 4. Evaluate
More informationCS/COE0447: Computer Organization and Assembly Language
CS/COE0447: Computer Organization and Assembly Language Logic Design Introduction (Brief?) Appendix B: The Basics of Logic Design Dept. of Computer Science Logic design? Digital hardware is implemented
More informationImplementation of Reversible Control and Full Adder Unit Using HNG Reversible Logic Gate
Implementation of Reversible Control and Full Adder Unit Using HNG Reversible Logic Gate Naresh Chandra Agrawal 1, Anil Kumar 2, A. K. Jaiswal 3 1 Research scholar, 2 Assistant Professor, 3 Professor,
More informationvidyarthiplus.com vidyarthiplus.com vidyarthiplus.com ANNA UNIVERSITY- COMBATORE B.E./ B.TECH. DEGREE EXAMINATION - JUNE 2009. ELECTRICAL & ELECTONICS ENGG. - FOURTH SEMESTER DIGITAL LOGIC CIRCUITS PART-A
More informationCSCI 220: Computer Architecture-I Instructor: Pranava K. Jha. BCD Codes
CSCI 220: Computer Architecture-I Instructor: Pranava K. Jha BCD Codes Q. Give representation of the decimal number 853 in each of the following codes. (a) 8421 code (c) 84(-2)(-1) code (b) Excess-three
More informationNumbers and Arithmetic
Numbers and Arithmetic See: P&H Chapter 2.4 2.6, 3.2, C.5 C.6 Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University Big Picture: Building a Processor memory inst register file alu
More informationDigital System Design Combinational Logic. Assoc. Prof. Pradondet Nilagupta
Digital System Design Combinational Logic Assoc. Prof. Pradondet Nilagupta pom@ku.ac.th Acknowledgement This lecture note is modified from Engin112: Digital Design by Prof. Maciej Ciesielski, Prof. Tilman
More informationFinal Exam. ECE 25, Spring 2008 Thursday, June 12, Problem Points Score Total 90
Final Exam ECE 25, Spring 2008 Thursday, June 12, 2008 Name: PID: Problem Points Score 1 10 2 10 3 10 4 10 5 10 6 10 7 10 8 10 9 10 Total 90 1) Number representation (10 pts) a) For each binary vector
More informationDigital Logic (2) Boolean Algebra
Digital Logic (2) Boolean Algebra Boolean algebra is the mathematics of digital systems. It was developed in 1850 s by George Boole. We will use Boolean algebra to minimize logic expressions. Karnaugh
More informationKUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE
Estd-1984 KUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE 641 006 QUESTION BANK UNIT I PART A ISO 9001:2000 Certified 1. Convert (100001110.010) 2 to a decimal number. 2. Find the canonical SOP for the function
More informationLogic Simplification. Boolean Simplification Example. Applying Boolean Identities F = A B C + A B C + A BC + ABC. Karnaugh Maps 2/10/2009 COMP370 1
Digital Logic COMP370 Introduction to Computer Architecture Logic Simplification It is frequently possible to simplify a logical expression. This makes it easier to understand and requires fewer gates
More informationHakim Weatherspoon CS 3410 Computer Science Cornell University
Hakim Weatherspoon CS 3410 Computer Science Cornell University The slides are the product of many rounds of teaching CS 3410 by Professors Weatherspoon, Bala, Bracy, and Sirer. memory inst 32 register
More informationCombinational Logic. By : Ali Mustafa
Combinational Logic By : Ali Mustafa Contents Adder Subtractor Multiplier Comparator Decoder Encoder Multiplexer How to Analyze any combinational circuit like this? Analysis Procedure To obtain the output
More informationMODEL ANSWER SUMMER 17 EXAMINATION Subject Title: Principles of Digital Techniques
MODEL ANSWER SUMMER 17 EXAMINATION Subject Title: Principles of Digital Techniques Subject Code: Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word
More information(Boolean Algebra, combinational circuits) (Binary Codes and -arithmetics)
Task 1. Exercises: Logical Design of Digital Systems Seite: 1 Self Study (Boolean Algebra, combinational circuits) 1.1 Minimize the function f 1 a ab ab by the help of Boolean algebra and give an implementation
More informationDigital Electronics Circuits 2017
JSS SCIENCE AND TECHNOLOGY UNIVERSITY Digital Electronics Circuits (EC37L) Lab in-charge: Dr. Shankraiah Course outcomes: After the completion of laboratory the student will be able to, 1. Simplify, design
More informationLogic Theory in Designing of Digital Circuit & Microprocessor
Logic Theory in Designing of Digital Circuit & Microprocessor Prof.Vikram Mahendra Kakade Assistant Professor, Electronics & Telecommunication Engineering Department, Prof Ram Meghe College of Engineering
More informationCHAPTER 7. Exercises 17/ / /2 2 0
CHAPTER 7 Exercises E7. (a) For the whole part, we have: Quotient Remainders 23/2 /2 5 5/2 2 2/2 0 /2 0 Reading the remainders in reverse order, we obtain: 23 0 = 0 2 For the fractional part we have 2
More informationLOGIC CIRCUITS. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D.
Basic Experiment and Design of Electronics LOGIC CIRCUITS Ho Kyung Kim, Ph.D. hokyung@pusan.ac.kr School of Mechanical Engineering Pusan National University Digital IC packages TTL (transistor-transistor
More informationLOGIC CIRCUITS. Basic Experiment and Design of Electronics
Basic Experiment and Design of Electronics LOGIC CIRCUITS Ho Kyung Kim, Ph.D. hokyung@pusan.ac.kr School of Mechanical Engineering Pusan National University Outline Combinational logic circuits Output
More informationAn FPGA Implementation of Energy Efficient Code Converters Using Reversible Logic Gates
An FPGA Implementation of Energy Efficient Code Converters Using Reversible Logic Gates Rakesh Kumar Jha 1, Arjun singh yadav 2 Assistant Professor, Dept. of ECE, Corporate Institute of Science & Technology,
More informationNumber System conversions
Number System conversions Number Systems The system used to count discrete units is called number system. There are four systems of arithmetic which are often used in digital electronics. Decimal Number
More informationVidyalankar S.E. Sem. III [ETRX] Digital Circuits and Design Prelim Question Paper Solution
S.E. Sem. III [ETRX] Digital Circuits and Design Prelim uestion Paper Solution. (a) Static Hazard Static hazards have two cases: static and static. static- hazard exists when the output variable should
More informationConversions between Decimal and Binary
Conversions between Decimal and Binary Binary to Decimal Technique - use the definition of a number in a positional number system with base 2 - evaluate the definition formula ( the formula ) using decimal
More informationECE 341. Lecture # 3
ECE 341 Lecture # 3 Instructor: Zeshan Chishti zeshan@ece.pdx.edu October 7, 2013 Portland State University Lecture Topics Counters Finite State Machines Decoders Multiplexers Reference: Appendix A of
More informationDepartment of Electrical & Electronics EE-333 DIGITAL SYSTEMS
Department of Electrical & Electronics EE-333 DIGITAL SYSTEMS 1) Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X -Y and (b) Y - X using 2's complements. a) X = 1010100
More informationBoolean Algebra. Digital Logic Appendix A. Postulates, Identities in Boolean Algebra How can I manipulate expressions?
Digital Logic Appendix A Gates Combinatorial Circuits Sequential Circuits Other operations NAND A NAND B = NOT ( A ANDB) = AB NOR A NOR B = NOT ( A ORB) = A + B Truth tables What is the result of the operation
More informationTotal Time = 90 Minutes, Total Marks = 100. Total /10 /25 /20 /10 /15 /20
University of Waterloo Department of Electrical & Computer Engineering E&CE 223 Digital Circuits and Systems Midterm Examination Instructor: M. Sachdev October 30th, 2006 Total Time = 90 Minutes, Total
More informationELEC Digital Logic Circuits Fall 2014 Sequential Circuits (Chapter 6) Finite State Machines (Ch. 7-10)
ELEC 2200-002 Digital Logic Circuits Fall 2014 Sequential Circuits (Chapter 6) Finite State Machines (Ch. 7-10) Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering
More informationDHANALAKSHMI COLLEGE OF ENGINEERING, CHENNAI DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING CS6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN
DHANALAKSHMI COLLEGE OF ENGINEERING, CHENNAI DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING CS6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN UNIT I : BOOLEAN ALGEBRA AND LOGIC GATES PART - A (2 MARKS) Number
More informationNumbers and Arithmetic
Numbers and Arithmetic See: P&H Chapter 2.4 2.6, 3.2, C.5 C.6 Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University Big Picture: Building a Processor memory inst register file alu
More informationENG2410 Digital Design Introduction to Digital Systems. Fall 2017 S. Areibi School of Engineering University of Guelph
ENG2410 Digital Design Introduction to Digital Systems Fall 2017 S. Areibi School of Engineering University of Guelph Resources Chapter #1, Mano Sections 1.1 Digital Computers 1.2 Number Systems 1.3 Arithmetic
More informationComputer Organization I Test 1/Version 1 CMSC 2833 Autumn 2007
. Print your name on your scantron in the space labeled NAME. 2. Print CMSC 2833 in the space labeled SUBJECT. 3. Print the date, 9-20-2007, in the space labeled DATE. 4. Print your CRN, 2393, in the space
More informationKarnaugh Maps (K-Maps)
Karnaugh Maps (K-Maps) Boolean expressions can be minimized by combining terms P + P = P K-maps minimize equations graphically Put terms to combine close to one another B C C B B C BC BC BC BC BC BC BC
More informationCombinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.
Combinational Logic ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2010 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Combinational Circuits
More informationNumbers & Arithmetic. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. See: P&H Chapter , 3.2, C.5 C.
Numbers & Arithmetic Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University See: P&H Chapter 2.4-2.6, 3.2, C.5 C.6 Example: Big Picture Computer System Organization and Programming
More informationCombinational Logic Design Combinational Functions and Circuits
Combinational Logic Design Combinational Functions and Circuits Overview Combinational Circuits Design Procedure Generic Example Example with don t cares: BCD-to-SevenSegment converter Binary Decoders
More informationBoolean Algebra. Digital Logic Appendix A. Boolean Algebra Other operations. Boolean Algebra. Postulates, Identities in Boolean Algebra
Digital Logic Appendix A Gates Combinatorial Circuits Sequential Circuits George Boole ideas 1854 Claude Shannon, apply to circuit design, 1938 (piirisuunnittelu) Describe digital circuitry function programming
More informationChapter 7 Logic Circuits
Chapter 7 Logic Circuits Goal. Advantages of digital technology compared to analog technology. 2. Terminology of Digital Circuits. 3. Convert Numbers between Decimal, Binary and Other forms. 5. Binary
More informationContents. Chapter 3 Combinational Circuits Page 1 of 36
Chapter 3 Combinational Circuits Page of 36 Contents Combinational Circuits...2 3. Analysis of Combinational Circuits...3 3.. Using a Truth Table...3 3..2 Using a Boolean Function...6 3.2 Synthesis of
More informationDesign of Reversible Code Converters Using Verilog HDL
Design of Reversible Code Converters Using Verilog HDL Vinay Kumar Gollapalli M. Tech (VLSI Design), K Koteshwarrao, M. Tech Assistant Professor, SSGN Srinivas, M. Tech Associate Professor & HoD, ABSTRACT:
More informationNumber System. Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary
Number System Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary BOOLEAN ALGEBRA BOOLEAN LOGIC OPERATIONS Logical AND Logical OR Logical COMPLEMENTATION
More informationCs302 Quiz for MID TERM Exam Solved
Question # 1 of 10 ( Start time: 01:30:33 PM ) Total Marks: 1 Caveman used a number system that has distinct shapes: 4 5 6 7 Question # 2 of 10 ( Start time: 01:31:25 PM ) Total Marks: 1 TTL based devices
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationUniversity of Florida EEL 3701 Summer 2015 Dr. Eric. M. Schwartz Department of Electrical & Computer Engineering Tuesday, 30 June 2015
University of Florida EEL 3701 Summer 2015 Dr Eric M Schwartz Page 1/13 Exam 1 May the Schwartz be with you! Instructions: Turn off all cell phones and other noise making devices Show all work on the front
More informationA B D 1 Y D 2 D 3. Truth table for 4 to 1 MUX: A B Y 0 0 D D D D 3
. What is a multiplexer? esign a 4 to multiplexer using logic gates. Write the truth table and explain its working principle. Answer: is a circuit with many inputs but only one output. esigning of 4 to
More informationDigital Logic and Design (Course Code: EE222) Lecture 1 5: Digital Electronics Fundamentals. Evolution of Electronic Devices
Indian Institute of Technolog Jodhpur, Year 207 208 Digital Logic and Design (Course Code: EE222) Lecture 5: Digital Electronics Fundamentals Course Instructor: Shree Prakash Tiwari Email: sptiwari@iitj.ac.in
More informationCOE 202: Digital Logic Design Combinational Circuits Part 4. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:
COE 202: Digital Logic Design Combinational Circuits Part 4 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Magnitude comparator Design of 4-bit magnitude comparator
More informationClass Website:
ECE 20B, Winter 2003 Introduction to Electrical Engineering, II LECTURE NOTES #5 Instructor: Andrew B. Kahng (lecture) Email: abk@ece.ucsd.edu Telephone: 858-822-4884 office, 858-353-0550 cell Office:
More information/ M Morris Mano Digital Design Ahmad_911@hotmailcom / / / / wwwuqucscom Binary Systems Introduction - Digital Systems - The Conversion Between Numbering Systems - From Binary To Decimal - Octet To Decimal
More informationReview for Test 1 : Ch1 5
Review for Test 1 : Ch1 5 October 5, 2006 Typeset by FoilTEX Positional Numbers 527.46 10 = (5 10 2 )+(2 10 1 )+(7 10 0 )+(4 10 1 )+(6 10 2 ) 527.46 8 = (5 8 2 ) + (2 8 1 ) + (7 8 0 ) + (4 8 1 ) + (6 8
More informationLOGIC GATES. Basic Experiment and Design of Electronics. Ho Kyung Kim, Ph.D.
Basic Eperiment and Design of Electronics LOGIC GATES Ho Kyung Kim, Ph.D. hokyung@pusan.ac.kr School of Mechanical Engineering Pusan National University Outline Boolean algebra Logic gates Karnaugh maps
More information( c) Give logic symbol, Truth table and circuit diagram for a clocked SR flip-flop. A combinational circuit is defined by the function
Question Paper Digital Electronics (EE-204-F) MDU Examination May 2015 1. (a) represent (32)10 in (i) BCD 8421 code (ii) Excess-3 code (iii) ASCII code (b) Design half adder using only NAND gates. ( c)
More informationDigital Systems Roberto Muscedere Images 2013 Pearson Education Inc. 1
Digital Systems Digital systems have such a prominent role in everyday life The digital age The technology around us is ubiquitous, that is we don t even notice it anymore Digital systems are used in:
More informationENGG 1203 Tutorial_9 - Review. Boolean Algebra. Simplifying Logic Circuits. Combinational Logic. 1. Combinational & Sequential Logic
ENGG 1203 Tutorial_9 - Review Boolean Algebra 1. Combinational & Sequential Logic 2. Computer Systems 3. Electronic Circuits 4. Signals, Systems, and Control Remark : Multiple Choice Questions : ** Check
More informationDigital Logic Appendix A
Digital Logic Appendix A Boolean Algebra Gates Combinatorial Circuits Sequential Circuits 1 Boolean Algebra George Boole ideas 1854 Claude Shannon, apply to circuit design, 1938 Describe digital circuitry
More informationUniversity of Florida EEL 3701 Fall 2014 Dr. Eric. M. Schwartz Department of Electrical & Computer Engineering Wednesday, 15 October 2014
Page 1/12 Exam 1 May the Schwartz Instructions: be with you! Turn off all cell phones and other noise making devices and put away all electronics Show all work on the front of the test papers Box each
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 1 Gate Circuits and Boolean Equations Chapter 2 - Part 1 2 Chapter 2 - Part 1 3 Chapter 2 - Part 1 4 Chapter 2 - Part
More informationENGIN 112 Intro to Electrical and Computer Engineering
ENGIN 112 Intro to Electrical and Computer Engineering Lecture 3 More Number Systems Overview Hexadecimal numbers Related to binary and octal numbers Conversion between hexadecimal, octal and binary Value
More informationSchedule. ECEN 301 Discussion #25 Final Review 1. Date Day Class No. 1 Dec Mon 25 Final Review. Title Chapters HW Due date. Lab Due date.
Schedule Date Day Class No. Dec Mon 25 Final Review 2 Dec Tue 3 Dec Wed 26 Final Review Title Chapters HW Due date Lab Due date LAB 8 Exam 4 Dec Thu 5 Dec Fri Recitation HW 6 Dec Sat 7 Dec Sun 8 Dec Mon
More informationChapter 4. Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. elements. Dr.
Chapter 4 Dr. Panos Nasiopoulos Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. Sequential: In addition, they include storage elements Combinational
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More informationOPTIMAL DESIGN AND SYNTHESIS OF FAULT TOLERANT PARALLEL ADDER/SUBTRACTOR USING REVERSIBLE LOGIC GATES. India. Andhra Pradesh India,
OPTIMAL DESIGN AND SYNTHESIS OF FAULT TOLERANT PARALLEL ADDER/SUBTRACTOR USING REVERSIBLE LOGIC GATES S.Sushmitha 1, H.Devanna 2, K.Sudhakar 3 1 MTECH VLSI-SD, Dept of ECE, ST. Johns College of Engineering
More informationComputer Architecture, IFE CS and T&CS, 4 th sem. Representation of Integer Numbers in Computer Systems
Representation of Integer Numbers in Computer Systems Positional Numbering System Additive Systems history but... Roman numerals Positional Systems: r system base (radix) A number value a - digit i digit
More informationCombinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.
Combinational Logic ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Combinational Circuits
More informationUnit II Chapter 4:- Digital Logic Contents 4.1 Introduction... 4
Unit II Chapter 4:- Digital Logic Contents 4.1 Introduction... 4 4.1.1 Signal... 4 4.1.2 Comparison of Analog and Digital Signal... 7 4.2 Number Systems... 7 4.2.1 Decimal Number System... 7 4.2.2 Binary
More informationCh 2. Combinational Logic. II - Combinational Logic Contemporary Logic Design 1
Ch 2. Combinational Logic II - Combinational Logic Contemporary Logic Design 1 Combinational logic Define The kind of digital system whose output behavior depends only on the current inputs memoryless:
More informationSave from: cs. Logic design 1 st Class أستاذ المادة: د. عماد
Save from: www.uotiq.org/dep cs Logic design 1 st Class أستاذ المادة: د. عماد استاذة المادة: م.م ميساء Contents Lectured One: Number system operation 1- Decimal numbers. 2- Binary numbers. 3- Octal numbers.
More informationThe Design Procedure. Output Equation Determination - Derive output equations from the state table
The Design Procedure Specification Formulation - Obtain a state diagram or state table State Assignment - Assign binary codes to the states Flip-Flop Input Equation Determination - Select flipflop types
More informationLecture 7: Logic design. Combinational logic circuits
/24/28 Lecture 7: Logic design Binary digital circuits: Two voltage levels: and (ground and supply voltage) Built from transistors used as on/off switches Analog circuits not very suitable for generic
More informationZ = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table
Lesson Objectives In this lesson, you will learn about What are combinational circuits Design procedure of combinational circuits Examples of combinational circuit design Combinational Circuits Logic circuit
More informationMAHARASHTRA STATE BOARD OF TECHNICAL EDUCATION (Autonomous) (ISO/IEC Certified) State any two Boolean laws. (Any 2 laws 1 mark each)
Subject Code: 17333 Model Answer Page 1/ 27 Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word as given in the model answer scheme. 2) The model
More informationIntroduction to Karnaugh Maps
Introduction to Karnaugh Maps Review So far, you (the students) have been introduced to truth tables, and how to derive a Boolean circuit from them. We will do an example. Consider the truth table for
More informationEECS Variable Logic Functions
EECS150 Section 1 Introduction to Combinational Logic Fall 2001 2-Variable Logic Functions There are 16 possible functions of 2 input variables: in general, there are 2**(2**n) functions of n inputs X
More informationDigital Electronics Part 1: Binary Logic
Digital Electronics Part 1: Binary Logic Electronic devices in your everyday life What makes these products examples of electronic devices? What are some things they have in common? 2 How do electronics
More informationBOOLEAN ALGEBRA. Introduction. 1854: Logical algebra was published by George Boole known today as Boolean Algebra
BOOLEAN ALGEBRA Introduction 1854: Logical algebra was published by George Boole known today as Boolean Algebra It s a convenient way and systematic way of expressing and analyzing the operation of logic
More informationKINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK SUBJECT CODE: EC 1354 SUB.NAME : VLSI DESIGN YEAR / SEMESTER: III / VI UNIT I MOS TRANSISTOR THEORY AND
More informationDESİGN AND ANALYSİS OF FULL ADDER CİRCUİT USİNG NANOTECHNOLOGY BASED QUANTUM DOT CELLULAR AUTOMATA (QCA)
DESİGN AND ANALYSİS OF FULL ADDER CİRCUİT USİNG NANOTECHNOLOGY BASED QUANTUM DOT CELLULAR AUTOMATA (QCA) Rashmi Chawla 1, Priya Yadav 2 1 Assistant Professor, 2 PG Scholar, Dept of ECE, YMCA University
More informationNovel Bit Adder Using Arithmetic Logic Unit of QCA Technology
Novel Bit Adder Using Arithmetic Logic Unit of QCA Technology Uppoju Shiva Jyothi M.Tech (ES & VLSI Design), Malla Reddy Engineering College For Women, Secunderabad. Abstract: Quantum cellular automata
More informationCOMP2611: Computer Organization. Introduction to Digital Logic
1 OMP2611: omputer Organization ombinational Logic OMP2611 Fall 2015 asics of Logic ircuits 2 its are the basis for binary number representation in digital computers ombining bits into patterns following
More information1 Computing System 2. 2 Data Representation Number Systems 22
Chapter 4: Computing System & Data Representation Christian Jacob 1 Computing System 2 1.1 Abacus 3 2 Data Representation 19 3 Number Systems 22 3.1 Important Number Systems for Computers 24 3.2 Decimal
More informationELECTRONICS & COMMUNICATION ENGINEERING PROFESSIONAL ETHICS AND HUMAN VALUES
EC 216(R-15) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester ELECTRONICS & COMMUNICATION ENGINEERING PROFESSIONAL ETHICS AND HUMAN
More informationCPE100: Digital Logic Design I
Chapter 1 Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu http://www.ee.unlv.edu/~b1morris/cpe100/ CPE100: Digital Logic Design I Section 1004: Dr. Morris From Zero to One Chapter 1 Background:
More informationChapter 1. Binary Systems 1-1. Outline. ! Introductions. ! Number Base Conversions. ! Binary Arithmetic. ! Binary Codes. ! Binary Elements 1-2
Chapter 1 Binary Systems 1-1 Outline! Introductions! Number Base Conversions! Binary Arithmetic! Binary Codes! Binary Elements 1-2 3C Integration 傳輸與介面 IA Connecting 聲音與影像 Consumer Screen Phone Set Top
More information