IL33290 TECHNICAL DATA. ISO K Line Serial Link Interface
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1 TECHNICAL DATA ISO K Line Serial Link Interface The IL33290 is a serial link bus interface device designed to provide bidirectional half-duplex communication interfacing in automotive diagnostic applications. It is designed to interface between the vehicle.s on-board microcontroller and systems offboard the vehicle via the special ISO K line. The IL33290 is designed to meet the Diagnostic Systems ISO9141 specification. The device s K line bus driver.s output is fully protected against bus shorts and overtemperature conditions. The IL33290 derives its robustness to temperature and voltage extremes by being built on a process, incorporating CMOS logic, bipolar/mos analog circuitry, and DMOS power FETs. Although the IL33290 was principally designed for automotive applications, it is suited for other serial communication applications. It is parametrically specified over an ambient temperature range of -40 C T A 125 C and 8.0 V V BB 18 V supply. The economical SO-8 surface-mount plastic package makes the IL33290 very cost effective. Features Designed to Operate Over Wide Supply Voltage of 8.0 to 18 V Ambient Operating Temperature of -40 to 125 C Interfaces Directly to Standard CMOS Microprocessors ISO K Line Pin Protected Against Shorts to Ground Thermal Shutdown with Hysteresis Maximum Transmission Speeds in Excess of 50 k Baud ISO K Line Pin Capable of High Currents ISO K Line Can Be Driven with up to 10 nf of Parasitic Capacitance 8.0 kv ESD Protection Attainable with Few Additional Components Standby Mode: No VBat Current Drain with V DD at 5.0 V Low Current Drain During Operation with V DD at 5.0 V IL33290
2 Pin Function Description 1. NC pins should not have any connections made to them. NC pins are not guaranteed to be open circuits.
3 Maximum Ratings All voltages are with respect to ground unless otherwise noted. 2. Device will survive double battery jump start conditions in typical applications for 10 minutes duration, but is not guaranteed to remain within specified parametric limits during this duration. 3. ESD data available upon request. 4. ESD1 testing is performed in accordance with the Human Body Model (C ZAP = 100 pf, R ZAP = 1500 Ω). 5. ESD2 testing is performed in accordance with the Machine Model (C ZAP = 200 pf, R ZAP = 0 Ω). 6. Nonrepetitive clamping capability at 25 C. 7. Lead soldering temperature limit is for 10 seconds maximum duration. * Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
4 Static Electrical Characteristics Characteristics noted under conditions of 4.75 V V DD 5.25 V, 8.0 V V BB 18 V, -40 C T C 125 C, unless otherwise noted. 8. When I BB transitions to >100 µa. 9. When I BB transitions to <100 µa. 10. Enable pin has an internal current pull-down equivalent to greater than 50 kω. 11. Measured by ramping T X down from 0.7 V DD and noting T X value at which ISO falls below 0.2 V BB. 12. Measured by ramping T X up from 0.3 V DD and noting the value at which ISO rises above 0.9 V BB. 13. Tx pin has internal current pull-up equivalent to greater than 50 kω. Pull-Up current measured with T X pin at 0.7 V DD. 14. Thermal Shutdown performance (T LIM ) is guaranteed by design but not production tested.
5 Static Electrical Characteristics (continued) Characteristics noted under conditions of 4.75 V V DD 5.25 V, 8.0 V V BB 18 V, -40 C T C 125 C, unless otherwise noted. 15. ISO ramped from 0.8 V BB to 0.4 V BB, Monitor RX, Value of ISO voltage at which R X transitions to 0.3 V DD. 16. ISO ramped from 0.4 VBB to 0.8 V BB, Monitor RX, Value of ISO voltage at which R X transitions to 0.7 V DD. 17. Input Hysteresis, V Hys(ISO) = V IH(ISO) - V IL(ISO). 18. ISO has internal current limiting.
6 Dynamic Electrical Characteristics Characteristics noted under conditions of 4.75 V V DD 5.25 V, 8.0 V V BB 18 V, -40 C T C 125 C, unless otherwise noted. 19. Time required ISO voltage to transition from 0.8 V BB to 0.2 V BB. 20. Changes in the value of CISO affect the rise and fall time but have minimal effect on Propagation Delay. 21. Step T X voltage from 0.2 V DD to 0.8 V DD. Time measured from V IH(ISO) until V ISO reaches 0.3 V BB. 22. Step T X voltage from 0.8 V DD to 0.2 V DD. Time measured from V IL(ISO) until V ISO reaches 0.7 V BB.
7 Application Information
8 Package Dimensions D SUFFIX SOIC (MS - 012AA) -T- H 8 1 D A G 5 B 0.25 (0.010) M T C M 4 K P C SEATING PLANE J Symbol MIN MAX A B C D F G H Dimension, mm J 0 8 NOTES: K Dimensions A and B do not include mold flash or protrusion. M Maximum mold flash or protrusion 0.15 mm (0.006) per side P for A; for B 0.25 mm (0.010) per side. R R x 45 F M
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DLA LAND AND MARITIME COLUMBUS, OHIO TITLE MICROCIRCUIT, LINEAR, +5 V PROGRAMMABLE LOW DROPOUT VOLTAGE REGULATOR, MONOLITHIC SILICON
REVISIONS LTR DESCRIPTION DTE PPROVED Prepared in accordance with SME Y14.24 Vendor item drawing REV PGE REV PGE REV STTUS OF PGES REV PGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/ PREPRED BY RICK OFFICER DL LND
UNISONIC TECHNOLOGIES CO., LTD
UNISONIC TECHNOLOGIES CO., LTD QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS DESCRIPTION The U74LVC125A consists of four bus buffers with 3-state output controlled by enable input ( ΟΕ ), when ΟΕ is high,
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74ACT138 is identical in pinout to the LS/ALS138, HC/HCT138. The IN74ACT138 may be used as a level converter for interfacing TTL or NMOS
MM74HC244 Octal 3-STATE Buffer
MM74HC244 Octal 3-STATE Buffer General Description The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not
MOCD223M Dual-channel Phototransistor Small Outline Surface Mount Optocouplers
MOCD223M Dual-channel Phototransistor Small Outline Surface Mount Optocouplers Features U.L. Recognized (File #E90700, Volume 2) VDE Recognized (File #13616) (add option V for VDE approval, i.e, MOCD223VM)
MM74HCT138 3-to-8 Line Decoder
3-to-8 Line Decoder General Description The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits
DS34C87T CMOS Quad TRI-STATE Differential Line Driver
DS34C87T CMOS Quad TRI-STATE Differential Line Driver General Description The DS34C87T is a quad differential line driver designed for digital data transmission over balanced lines The DS34C87T meets all