Quad 2-Input Data Selectors/Multiplexer High-Performance Silicon-Gate CMOS
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1 TECNICAL DATA IN74CT157A Quad 2-Input Data Selectors/Multiplexer igh-performance Silicon-ate CMOS The IN74CT157A is identical in pinout to the LS/ALS157. This device may be used as a level converter for interfacing TTL or NMOS outputs to igh Speed CMOS inputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the outputs in noninvertered form. A high level on the Output Enable input sets all four Y outputs to a low level. TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating oltage Range: to Low Input Current: 1.0 µa ORDERIN INFORMATION IN74CT157AN Plastic IN74CT157AD SOIC T A = -55 to 125 C for all packages LOIC DIARAM PIN ASSINMENT FUNCTION TABLE PIN 16 = CC PIN 8 = ND Output Enable Inputs Select Outputs Y0-Y3 X L L L A0-A3 L B0-B3 X=don t care A0-A3,B0-B3=the levels of the respective Data-Word Inputs
2 MAXIMUM RATINS * Symbol Parameter alue Unit CC DC Supply oltage (Referenced to ND) -0.5 to +7.0 IN DC Input oltage (Referenced to ND) -1.5 to CC +1.5 OUT DC Output oltage (Referenced to ND) -0.5 to CC +0.5 I IN DC Input Current, per Pin ±20 ma I OUT DC Output Current, per Pin ±25 ma I CC DC Supply Current, CC and ND Pins ±50 ma P D Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Tstg Storage Temperature -65 to +150 C T L Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mw/ C from 65 to 125 C SOIC Package: : - 7 mw/ C from 65 to 125 C mw 260 C RECOMMENDED OPERATIN CONDITIONS Symbol Parameter Min Max Unit CC DC Supply oltage (Referenced to ND) IN, OUT DC Input oltage, Output oltage (Referenced to ND) 0 CC T A Operating Temperature, All Package Types C t r, t f Input Rise and Fall Time (Figure ns This device contains protection circuitry to guard against damage due to high static voltages or electric fields. owever, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, IN and OUT should be constrained to the range ND ( IN or OUT ) CC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either ND or CC ). Unused outputs must be left open.
3 DC ELECTRICAL CARACTERISTICS (oltages Referenced to ND) Symbol Parameter Test Conditions 25 C to -55 C I Minimum igh- Level Input oltage IL Maximum Low - Level Input oltage O Minimum igh- Level Output oltage OUT = or CC - I OUT 20 µa OUT = or CC - I OUT 20 µa IN = I or IL I OUT 20 µa CC uaranteed Limit C C Unit IN = I or IL I OUT 4.0 ma OL Maximum Low- Level Output oltage IN = I or IL I OUT 20 µa I IN I CC I CC Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Additional Quiescent Supply Current IN = I or IL I OUT 4.0 ma IN = CC or ND ± ±1.0 ±1.0 µa IN = CC or ND I OUT =0µA IN =2.4, Any One Input IN = CC or ND, Other Inputs µa -55 C 25 C to 125 C I OUT =0µA ma
4 AC ELECTRICAL CARACTERISTICS ( CC =5.0 ± 10%, C L =50pF,Input t r =t f =6.0 ns) Symbol Parameter 25 C to -55 C t PL, t PL t PL, t PL t PL, t PL t TL, t TL Maximum Propagation Delay, Input A or B to Output Y (Figures 1and 4) Maximum Propagation Delay, Select to Output Y (Figures 2 and 4) Maximum Propagation Delay, Output Enable to Output Y (Figures 3 and 4) Maximum Output Transition Time, Any Output (Figures 1 and 4) uaranteed Limit 85 C 125 C Unit ns ns ns ns C IN Maximum Input Capacitance pf C PD Power Dissipation Capacitance (Per Transceiver Channel) Used to determine the no-load dynamic power consumption: P D =C PD CC 2 f+i CC CC C, CC = pf Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms Figure 4. Test Circuit
5 EXPANDED LOIC DIARAM
6 N SUFFIX PLASTIC DIP (MS - 001BB) NOTES: 16 1 A F 0.25 (0.010) M T 1. Dimensions A, B do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. 9 8 D N B -T- C -T- K SEATIN PLANE M L J Dimension, mm Symbol MIN MAX A B C 5.33 D F J 0 10 K L M N 0.38 D SUFFIX SOIC (MS - 012AC) 16 1 D A 0.25 (0.010) M T C M 9 8 B K P C SEATIN PLANE Symbol MIN MAX A B C D F Dimension, mm J 0 8 NOTES: K Dimensions A and B do not include mold flash or protrusion. M Maximum mold flash or protrusion 5 mm (0.006) per side P for A; for B 0.25 mm (0.010) per side. R J R x 45 F M
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