GMII Electrical Specification Options. cisco Systems, Inc.
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1 DC Specifications GMII Electrical Specification Options Mandatory - Communication between the transmitter and receiver can not occur at any bit rate without DC specifications. AC Specifications OPTION : Use the conventional approach. Specify one or two DC potentials at which at which all AC timing measurements are made, specify receiving register minimum setup and hold times, perhaps specify driver minimum and maximum clock to output delays and model the effect of trace and receiver input capacitance on the driver as a lumped capacitor. Advantage - Simple Disadvantages - PCB trace length limited to avoid transmission line effects (limited to about.5 inches for.5 ns %-9% risetime and FR4 stripline). No support for transmission line knowledgeable designers wanting to use longer traces (no assurance of adequate drive strength to insure first incident wave switching).
2 OPTION 2: Pick a topology (such as point to point), a minimum pcb trace impedance (such as 5 Ohms +/- 5%), a maximum pcb trace length and a termination technique (such as series/source termination) and specify the driver output characteristics. Advantages - It insures correct operation with transmission lines for one topology. It permits correct operation with transmission lines whose impedance is greater than the minimu Disadvantages - Unnecessarily restrictive in terms of techniques used and topologies supported. 2
3 OPTION 3: Specify a standard GMII receiver input equivalent circuit, define a GMII Interoperability Interface at the GMII receiver input pin, specify a GMII Receiver Input Potential Template that must be complied with at the input of all GMII receivers, specify a basic transmission line topology that all GMII drivers must support, let each vendor select the GMII driver characteristics and termination scheme to comply with the GMII Receiver Input Potential Template for the basic transmission line topology and allow each vendor to support other transmission line topologies subject to the requirement that the input signal to each GMII receiver must comply with the GMII Receiver Input Signal Template. Advantages - Insures minimum support for transmission lines. Allows vendors flexibility in how they support the basic topology. Allows vendors flexibility in supporting other transmission line topologies. Disadvantages - Minimal Challenges Model of the GMII Receiver input circuit. Effect of the GMII Receiver input circuit on the input potential wavefor 3
4 Proposed GMII Electrical Specification Objectives Implementable with either 2.5 Volt or 3.3 Volt I/O pads Compatible with bit SerDes electrical specifications when implemented with 3.3 Volt I/O pads Support point to point connections with PCB traces up to 6 inches in length and a minimum trace impedance of 5 Ohms +/- 5% Specify the AC input signal to GMII receivers. Do not specify the GMII driver AC characteristics Do not specify the termination technique Do not preclude other GMII interconnect topologies 4
5 Simulations Frequency domain (Fourier) techniques are used which requires linear components The driver model has constant output resistance. This is not accurate for a driver with nonlinear output characteristics. But it is a reasonable approximation when source termination is used and the values of the series termination resistor is much greater than the driver output resistance. The transmission line model used is for stripline with a dc resistance of.6 Ohms per inch (5 mil wide pcb trace on oz. copper), a skin effect corner frequency of 7.42 MHz, a dielectric constant of 4.22 at. MHz and that decreases.2 per frequency decade a dielectric Dissipation Factor of.24 5
6 Simulation Model - Source (Series) Termination Node 4 Node 3 Node 2 Node Node L d_sig_pin L R R ser Zo L r_sig_pin v g + C d_pad C d_pin /2 C R /2 C r_pin /2 C r_pad _ C d_pin /2 C R /2 C r_pin /2 L r_com_pin 6
7 Simulation Model - End (Parallel) Termination Node 3 Node 2 Node Node L d_sig_pin Zo L r_sig_pin L R v g + _ C d_pad C d_pin /2 C d_pin /2 v t + _ R t C R C r_pin /2 C r_pin /2 C r_pad L r_com_pin 7
8 Examples of Transmission Line behavior for a driver output resistances of 2.*Zo and.5*zo stripline pcb trace lengths of.75,.5, 3. and 6. inches Note that The output resistance of the driver functions as a mismatched source/series termination in these examples. The output drive of a CMOS driver can vary at least 3: over supply potential, temperature and process variation. 8
9 Underdrive: = 2*Zo 2.5. v dd rcsw m 2 v_node2 m.5 v_node m sample_step. v dd = 2.25 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch =.75 C r_pad = 5 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =.25 L r_sig_pin = 2 = 2 L r_com_pin = 2 9
10 Underdrive: = 2*Zo 2.5. v dd rcsw m 2 v_node2 m.5 v_node m sample_step. v dd = 2.25 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch =.5 C r_pad = 5 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =.25 L r_sig_pin = 2 = 2 L r_com_pin = 2
11 Underdrive: = 2*Zo 2.5. v dd rcsw m 2 v_node2 m.5 v_node m sample_step. 9 v dd = 2.25 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 3 C r_pad = 5 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =.5 L r_sig_pin = 2 = 2 L r_com_pin = 2
12 Underdrive: = 2*Zo 2.5. v dd rcsw m 2 v_node2 m.5 v_node m sample_step. v dd = 2.25 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = 5 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 2 = 2 L r_com_pin = 2 2
13 Underdrive: = 2*Zo v. dd rcsw m 2 v_node2 m v_node.5 m sample_step. v dd = 3 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = 5 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 2 = 2 L r_com_pin = 2 Increasing V dd solves a problem on the rising edge but creates a problem on the falling edge 3
14 Overdrive: = Zo/ v dd rcsw m 2 v_node2 m v_node m sample_step. v dd = 2.75 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch =.75 C r_pad = 5 = 25 L d_sig_pin = 2 L R = 2 one_way_delay_ns =.25 L r_sig_pin = 2 = 2 L r_com_pin = 2 4
15 Overdrive: = Zo/ v dd rcsw m v_node2 m 2 v_node m sample_step. v dd = 2.75 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch =.5 C r_pad = 5 = 25 L d_sig_pin = 2 L R = 2 one_way_delay_ns =.25 L r_sig_pin = 2 = 2 L r_com_pin = 2 5
16 Overdrive: = Zo/ v dd rcsw m v_node2 m 2 v_node m sample_step. v dd = 2.75 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 3 C r_pad = 5 = 25 L d_sig_pin = 2 L R = 2 one_way_delay_ns =.5 L r_sig_pin = 2 = 2 L r_com_pin = 2 6
17 Overdrive: = Zo/ v dd rcsw m v_node2 m 2 v_node m sample_step. v dd = 2.75 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = 5 = 25 L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 2 = 2 L r_com_pin = 2 7
18 Overdrive: = Zo/ v dd rcsw m v_node2 m 2 v_node m sample_step. v dd = 2.75 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 4 C r_pad = 5 = 25 L d_sig_pin = 2 L R = 2 one_way_delay_ns =.6667 L r_sig_pin = 2 = 2 L r_com_pin = 2 Ringing is greatest at 4 inches where the line has a weak resonance at 375 MHz 8
19 Overdrive: = Zo/2 5 4 v. dd rcsw3 m v_node2 m 2 v_node m sample_step. 9 v dd = 3.6 C d_pad = 5 R ser = Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 4 C r_pad = 5 = 25 L d_sig_pin = 2 L R = 2 one_way_delay_ns =.6667 L r_sig_pin = 2 = 2 L r_com_pin = 2 Overshoot is a problem for 3.3 Volt drivers, especially with 2.5 Volt receivers 9
20 What are the effects of the GMII receiver input parasitics on source and end terminated lines? Proposed values for input parasitics Table : Parameter BGA Lucent National Cr_pin 2. pf 4. pf.5 pf Lr_sig_pin 6. nh 7.2 nh nh Lr_com_pin 2. nh 6. nh nh Cr_pad 2. pf.43 pf 4.5 pf 2
21 Source (Series) Termination 2.5. v dd rcsw m 2 v_node2 m.5 v_node m sample_step. v dd = 2.5 C d_pad = 5 R ser = 5 Z o = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = 5 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 2 = 2 L r_com_pin = 2 No GMII receiver loading 2
22 Source (Series) Termination 2.5. v dd rcsw m 2 v_node2 m.5 v_node m sample_step. v dd = 2.5 C d_pad = 5 R ser = 5 Z o = 5 C r_pin = 2 2 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = 3 2 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 2 = 2 L r_com_pin = 2 5 pf at the GMII receiver end of the line 22
23 Source (Series) Termination v dd rcsw m v_node2 m.5 v_node m v_node m sample_step. v dd = 2.5 C d_pad = 5 R ser = 5 Z o = 5 C r_pin = 2 2 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = 2 2 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 6 9 = 2 L r_com_pin = 2 9 GMII receiver Pi network with BGA Values 23
24 Source (Series) Termination 4. 3 v dd rcsw m v_node2 m 2 v_node m v_node m sample_step. v dd = 2.5 C d_pad = 5 R ser = 5 Z o = 5 C r_pin = 4 2 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad =.43 2 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin =.72 8 = 2 L r_com_pin =.6 8 GMII receiver Pi network with Lucent Values 24
25 Source (Series) Termination 3 v. dd rcsw 2 m v_node2 m v_node m v_node m sample_step. v dd = 2.5 C d_pad = 5 R ser = 5 Z o = 5 C r_pin = 5 3 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad = = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin = 8 = 2 L r_com_pin = 8 GMII receiver Pi network with National Values 25
26 Source (Series) Termination 3. v dd rcsw m v_node2 m v_node m.5 v_node m sample_step. v dd = 2.5 C d_pad = 5 R ser = Z o = C r_pin = 4 2 rise_time = 5 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad =.43 2 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =.2 L r_sig_pin =.72 8 = 2 L r_com_pin =.6 8 GMII receiver Pi network with Lucent Values and Ohm line 26
27 Source (Series) Termination 3. v dd rcsw m v_node2 m v_node m.5 v_node m sample_step. 9 v dd = 2.5 C d_pad = 5 R ser = 5 Z o = 5 C r_pin = 4 2 rise_time = 9 C d_pin = 5 C R = 5 line_length_inch = 6 C r_pad =.43 2 = L d_sig_pin = 2 L R = 2 one_way_delay_ns =. L r_sig_pin =.72 8 = 2 L r_com_pin =.6 8 GMII receiver Pi network with Lucent Values and. ns risetime 27
28 End (Parallel) Termination v dd rcsw m 2 v_node2 m v_node m sample_step. 9 v dd = 2.5 C d_pad = 5 Z o = 5 R t = 5 C r_pin = 5 rise_time = 5 C d_pin = 5 line_length_inch = 6 C R = 5 C r_pad = 5 = L d_sig_pin = 2 one_way_delay_ns =. L R = 2 L r_sig_pin = 2 = 2 v t =.25 L r_com_pin = 2 No GMII receiver loading 28
29 End (Parallel) Termination v dd rcsw m 2 v_node2 m v_node m sample_step. 9 v dd = 2.5 C d_pad = 5 Z o = 5 R t = 5 C r_pin = 2 2 rise_time = 5 C d_pin = 5 line_length_inch = 6 C R = 5 C r_pad = 3 2 = L d_sig_pin = 2 one_way_delay_ns =. L R = 2 L r_sig_pin = 2 = 2 v t =.25 L r_com_pin = 2 5 pf at the GMII receiver end of the line 29
30 End (Parallel) Termination 3 v. dd rcsw 2 m v_node2 m v_node m v_node m sample_step. 9 v dd = 2.5 C d_pad = 5 Z o = 5 R t = 5 C r_pin = 2 2 rise_time = 5 C d_pin = 5 line_length_inch = 6 C R = 5 C r_pad = 2 2 = L d_sig_pin = 2 one_way_delay_ns =. L R = 2 L r_sig_pin = 6 9 = 2 v t =.25 L r_com_pin = 2 9 GMII receiver Pi network with BGA Values 3
31 End (Parallel) Termination 4. 3 v dd rcsw m v_node2 m 2 v_node m v_node m sample_step. v dd = 2.5 C d_pad = 5 Z o = 5 R t = 5 C r_pin = 4 2 rise_time = 5 C d_pin = 5 line_length_inch = 6 C R = 5 C r_pad =.43 2 = L d_sig_pin = 2 one_way_delay_ns =. L R = 2 L r_sig_pin =.72 8 = 2 v t =.25 L r_com_pin =.6 8 GMII receiver Pi network with Lucent Values 3
32 End (Parallel) Termination 4. 3 v dd rcsw m v_node2 m 2 v_node m v_node m sample_step. 9 v dd = 2.5 C d_pad = 5 Z o = 5 R t = 5 C r_pin = 5 3 rise_time = 5 C d_pin = 5 line_length_inch = 6 C R = 5 C r_pad = = L d_sig_pin = 2 one_way_delay_ns =. L R = 2 L r_sig_pin = 8 = 2 v t =.25 L r_com_pin = 8 GMII receiver Pi network with National Values 32
33 End (Parallel) Termination 3 v. dd rcsw 2 m v_node2 m v_node m v_node m sample_step. v dd = 2.5 C d_pad = 5 Z o = 5 R t = 5 C r_pin = 4 2 rise_time = 9 C d_pin = 5 line_length_inch = 6 C R = 5 C r_pad =.43 2 = L d_sig_pin = 2 one_way_delay_ns =. L R = 2 L r_sig_pin =.72 8 = 2 v t =.25 L r_com_pin =.6 8 GMII receiver Pi network with Lucent Values and. ns risetime 33
34 Proposed GMII Electrical Specifications DC Specifications The DC characteristics of GMII drivers and receivers shall comply with the values given in the following table. Symbol Parameter Conditions Min Max Units V OH Output High Voltage I OH = -.ma V CC = Min 2. V CC V V OL Output Low Voltage I OL =.ma V CC = Min GND.4 V V IH Input High Voltage,6 - V V IL Input Low Voltage -,8 V I IH Input High Current V CC = Max V IN = 2.V - 4 µa I IL Input Low Current V CC = Max V IN =.4V -6 - µa Vcc equal to 3.6V max. 34
35 AC Specifications The minimum setup time and hold time of a GMII receiver shall be 2. ns and. ns respectively. The input signal at the pins of a GMII receiver shall comply with the GMII Receiver Input Potential Template shown in the following figure. GMII Receiver Input Potential Template 4. V.9 V.5 V V -.6 V. ns. ns 35
36 The signal at the receiver end of the. ns delay, 5 Ohm +/- 5% transmission line shown in the following figure shall comply with the GMII Receiver Input Potential Template when the transmission line is driven by a GMII driver and terminated with the termination network specified the vendor of the driver for this application. GMII Driver Vendor Specified Termination Network (Optional) Transmission Line. ns delay 5 Ohms +/- 5% Vendor Specified Termination Network (Optional) GMII Receiver Input Network 5 pf 36
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