The Spin Torque Lego

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1 The Spin Torque Lego from spin torque nano-devices to advanced computing architectures J. Grollier et al., CNRS/Thales, France NanoBrain

2 Spintronics : roadmap Giant Magneto-Resistance reading the magnetization configuration Magnetic Nanostructures sensors HDD read heads J. Slonczewski JMMM 1996 L. Berger PRB 1996 Spin Transfer writing the magnetization configuration 1

3 Spintronics : roadmap Giant Magneto-Resistance reading the magnetization configuration Magnetic Nanostructures J. Slonczewski JMMM 1996 L. Berger PRB 1996 New devices - digital memories - nano-oscillators - memristors HDD read heads Spin Transfer sensors writing the magnetization configuration 1

4 Spintronics : roadmap Giant Magneto-Resistance reading the magnetization configuration Magnetic Nanostructures New Computing Architectures? J. Slonczewski JMMM 1996 L. Berger PRB 1996 New devices - digital memories - nano-oscillators - memristors HDD read heads Spin Transfer sensors writing the magnetization configuration 1

5 Principle of spin-torque devices I(t) spin m magneto- R torque resistance magnetization dynamics resistance variations t, ns 2

6 Principle of spin-torque devices I(t) spin m magneto- R torque resistance magnetization dynamics resistance variations t, ns T IP spin torque = + T OOP in-plane torque out-of-plane torque 2 torques 2 knobs to engineer the dynamic response 2

7 In-plane versus out-of-plane torques H M fixed eq. position T damping M free T field 3

8 In-plane versus out-of-plane torques H M fixed in-plane torque anti-damping T IP P E AP T damping T field destabilizes magnetization eq. position T IP M free 3

9 In-plane versus out-of-plane torques H M fixed in-plane torque anti-damping T IP P E AP T damping T field destabilizes magnetization eq. T OOP position M free T IP out-of-plane torque field-like torque E H OOP P AP modifies energy barrier 3

10 In-plane versus out-of-plane torques T IP in-plane torque anti-damping T IP P E AP destabilizes magnetization Magnetization dynamics with the in-plane torque 3 scenarios depending on H 3

11 Resistance ( ) Binary Memory H < H c E STT P AP Hysteretic Switching AP P d.c. current (ma) 4

12 Resistance ( ) Binary Memory H < H c E First observations : STT Katine et al. PRL 2000 Grollier et al. APL 2001 P AP Hysteretic Switching Application : STT-MRAM AP P Isolation transistor OFF FREE LAYER TUNNEL BARRIER FIXED LAYER d.c. current (ma) target : D-RAM replacement 4

13 Resistance ( ) Stochastic device H H c STT E H P AP Telegraphic Switching ma ma Time (µs) 5

14 Resistance ( ) Stochastic device H H c STT E H First observations : Fabian et al. PRL 2003 Urazhdin et al. PRL 2003 P AP Telegraphic Switching Dwell times controlled by current ma ma Time (µs) Fukushima et al. SSDM 2010 spin torque = handle to control probabilities : spin dice nanoscale random number generators 5

15 Power density (nw/ghz/ma 2 ) Spin Transfer Nano-Oscillators H > H c H E STT P AP Precessionnal state ma 1.0 ma 0.8 ma frequency (GHz) 6

16 Power density (nw/ghz/ma 2 ) Spin Transfer Nano-Oscillators H > H c H E STT P AP Precessionnal state ma 1.0 ma 0.8 ma frequency (GHz) 6

17 Power density (nw/ghz/ma 2 ) Spin Transfer Nano-Oscillators H > H c H E First observations : STT Kiselev et al. Nature 2003 Rippard et al. PRL 2004 P AP Precessionnal state ST microwave devices ma 1.0 ma 0.8 ma frequency (GHz) small - work directly at the GHz tunable with I and H radiations proof Applications telecommunication, radars, read heads 6

18 Challenges for ST nano-oscillators initial performances: power 100 pw, linewidth 10 MHz Requirements for applications: - Power > 1 µw - Linewidth < 1 KHz 7

19 Challenges for ST nano-oscillators initial performances: power 100 pw, linewidth 10 MHz Requirements for applications: - Power > 1 µw : P DR 2 high TMR MgO based MTJs - Linewidth < 1 KHz 7

20 Challenges for ST nano-oscillators initial performances: power 100 pw, linewidth 10 MHz Requirements for applications: - Power > 1 µw : P DR 2 high TMR MgO based MTJs - Linewidth < 1 KHz 7

21 Strategies to decrease LW 1 st source of LW : mode hopping (freq. spread) T 0 2 d source of LW : phase/amplitude noise Tiberkevich et al, PRB

22 Strategies to decrease LW 1 st source of LW : mode hopping (freq. spread) 2 d source of LW : phase/amplitude noise work with a dynamic mode well separated in energy from other modes Vortex gyrotropic mode Tiberkevich et al, PRB 2008 P = 0.6 µw LW = 590 khz A. Dussaux, JG et al., Nature Com

23 Strategies to decrease LW 1 st source of LW : mode hopping (freq. spread) 2 d source of LW : phase/amplitude noise work with a dynamic mode well separated in energy from other modes Vortex gyrotropic mode rigidify the phase Synchronization P = 0.6 µw LW = 590 khz A. Dussaux, JG et al., Nature Com B. Georges, JG et al., PRL 2008 A. Dussaux, JG et al, APL

24 Microwave oscillator Voltage (µv) I I dc ST stt m R MR V=RI V t stt t t dc current sustained precession resistance osc. ac voltage Time (ns) strong advances towards applications 9

25 Spin wave emitter I I dc ST stt m exch. inter. dc current t stt local sustained precession spin wave emission Tsoi et al. PRL 1998 Demidov et al. Nat. Mat. 2010, Madami et al., Nat. Nano Applications: Magnonics (computing with spin waves) 10

26 d.c. voltage (µv) Microwave detector I I dc ST stt I>0 m stt I<0 R MR V=RI V t t t ac current resonance if w = w 0 resistance osc. dc voltage Tulapurkar et al. Nature Ishibashi et al. APEX Spin torque diode diode sensitivity = V diode / P rf 250 mv/mw Frequency (GHz) sensitivity of the schottky diode at RT 11

27 Resistance d.c. voltage Resistance Lego bricks Resistance Voltage detector (GMR,TMR) binary memory stochastic device microwave oscillator Magnetic Field d.c. current Time Time spin wave emitter microwave detector Frequency Spin torque bricks: different functionalities at the nano-scale 12

28 Engineering new bricks 13

29 Engineering new bricks Can we tailor a spin torque memristor? 13

30 Memristor v = M(q) i Memory - resistor Chua, IEEE Trans. Circuit Theory (1971) Strukov et al., Nature Nano resistance - Tunable (multi-resistance states) - Non volatile - Non-linear ( V th ) R OFF Digital multi-level memory ON V th V Plastic Synapse in Neuromorphic architectures 14

31 Magnetic tunnel junction as a memristor Resistance ( ) Binary memory 2 state spin torque controlled memristor How to obtain the quasianalog behaviour? d.c. current (ma) other works : combine 2 state TMR + resistive switching Krzysteczko et al. APL Prezioso et al. Adv Mater 2011 purely electronic write operation ST induced DW motion 15

32 Spin torque memristor : concept R R p (R AP R P ) x L R Resistance: proportion of parallel and anti-parallel domains Dt j x 0 t Dx JDt q V R(q) i R - Resistance: DW position - DW position: charge injected Dt j x 0 x 1 R t Memristor x 2 x 1 t Grollier et al. WO 2010/ A1 Wang et al. IEEE

33 Classical way to move a DW by spin torque: Vertical injection memristor lateral current injection e - Racetrack memory IBM Pb1: lateral ST inefficient use vertical spin currents (Spin Hall effect) Spin current Pb2: no resistance variations use vertical spin currents in a magnetic tunnel junction Charge current Spin current 17

34 Vertical injection memristor I I dc H OOP R MR V=RI V t t t pulsed current DW displacement resistance variations T OOP the out-of-plane torque drives the DW Khvalkovskiy, JG et al., PRL 2009 High efficiency in MTJs High TMR 18

35 normalized resistance Spin torque memristor resistance ( ) DW velocity (m/s) current density (10 6 A/cm 2 ) H Toop A. Chanthbouala, JG et al. Nature Phys P. Metaxas, JG et al. Sci. Reports dc current (ma) Low current density: j 10 6 A/cm 2, high speed: v > 600 m/s T = 0.8 ns v = 621 m/s J=-7.8 MA/cm time (ns) J pulse (MA/cm 2 ) J. Sampaio, JG et al. in preparation 19

36 d.c. voltage Resistance Resistance Resistance Resistance Voltage Spin torque Lego detector (GMR,TMR) binary memory stochastic device microwave oscillator Magnetic Field d.c. current Time Time spin wave emitter microwave detector memristor Frequency d.c. current Assembling the bricks to compute 20

37 Spintronic logic MTJs logic DW logic Ohno et al. IEDM 2010 Allwood et al. Science2005 Nano-magnet logic Niemier et al. J. Phys. C. Matter 2011 All-Spin logic Behin-Aein et al. Nature Nano Boolean logic: compete with CMOS + exploit only two bricks: detector binary memory READ WRITE / STORE 21

38 Spin torque Lego Architectures innovative, non-boolean, hybrid CMOs/spintronic architectures take full advantage of spin-torque functionalities ST-Magnonics ST-Neuromorphic architectures 22

39 Spin Torque Magnonics spin wave creation, manipulation and detection Kruglyak et al, Khitun et al., Serga et al. J.Phys.D: Appl. Phys Spin wave emitter ST-Magnonics gates ST nanocontact ST soliton bursting Spin wave manipulator Spin wave detector ST damping/anti-damping dc detector GMR/TMR microwave detector spin diode Slavin and Krivorotov, US 7,678,475 B2 Bonetti and Akerman, Magnonics,

40 Spin Torque Neuromorphic Architectures Synapse ST memristor ST stochastic synapse Neuron ST nanooscillators ST stochastic neuron 24

41 Neuromorphic architectures : motivation Semiconductor industry hurdles : - Excessive dissipation - Multicore scaling - Defects - Massively parallel - Analog - Relatively uniform - Fast - Low energy demand - Defect tolerant Artificial Neural Networks algorithms: - very performant (deep networks) - key applications : «Recognition, Mining and Synthesis» Temam, ISCA 2010 Chen, Temam et al. IISWC 2012 P. Dubey, Tech. Intel Magazine

42 Neuromorphic architectures : basics inputs outputs Neuron : - processing unit - integrates information sent from other neurons through synapses - Spikes when threshold reached - «integrate and fire» threshold Synapse : - define how well the information is transmitted : synaptic weight - the weigths are adjustable (synaptic plasticity) - all synapes : network memory w 1 w 2 w 3 w 1 and w 3 reinforced Network performances : - interconnectivity (human brain 10 4 synapses / neuron) - scale of the network x i neuron x j synapse w ij 26

43 Spin torque Synapse 10 µm Resistance CMOS implementation 1) Store synaptic weights plasticity SRAM banks 2) Synaptic plasticity: ON memristor implementation R OFF V 1 memristor = 1 nano-synapse 1) Store synaptic weights : non-volatile 2) Synaptic plasticity: tunable STDP Schemmel et al., IJCNN 2006 d.c. current STDP Jo et al., Nanoletters 2010 Spin torque memristor = ST synapse 27

44 Spin torque Neurons Voltage threshold Biological neuron: «integrate and fire» neuron relaxation oscillators CMOS implementation neuristor ST neuron ~ 100 µm Time Zamarreño-Ramos et al., Frontiers Neuroscience 2011 Pickett et al. Nature Mat

45 Spin torque Neurons threshold Biological neuron: «integrate and fire» neuron relaxation oscillators CMOS implementation ~ 100 µm neuristor ST neuron relaxation oscillator Zamarreño-Ramos et al., Frontiers Neuroscience 2011 Pickett et al. Nature Mat Petit, Kim, JG et al. Nature Phys

46 ST oscillators can synchronize Neural synchronization between different parts of the brain is a key operation for information processing, in particular memory Buzsaki, «Rhythms of the brain» 2006 Fell and Axmacher, Nature Reviews Neuroscience 2011 coupling : spin waves coupling : microwaves exp. demonstrated : up to 4 R L Mancoff et al. Nature 2005 Kaka et al. Nature 2005 Grollier at al., PRB 2006 Ruotolo, Cros, JG et al., Nat. Nano

47 ST Synchronization: associative memories Code information in the phase of each oscillator brain-inspired associative memories? pattern recognition - classification Applications: pattern recognition / classification Csaba et al., CNNA 2012 Roska et al., CNNA 2012 Macia et al., Nanotechnology

48 Spin Torque Neural Networks Several recent proposals of hybrid spintronic/cmos neural networks Sharad et al., IEEE Trans Nano 2012, IEDM 2012, Arxiv 2012 inspired from all-spin logic inspired from ST-induced DW motion Krysteczko et al., Adv. Mater Synapse = resistive switching Neuron = stochastic firing due to backhopping 32

49 Spin Torque Neural Networks Resistance Several recent proposals of hybrid spintronic/cmos neural networks Sharad et al., IEEE Trans Nano 2012, IEDM 2012, Arxiv 2012 inspired from all-spin logic inspired from ST-induced DW motion Krysteczko et al., Adv. Mater stochastic device Synapse = resistive switching Neuron = stochastic firing due to backhopping Time 33

50 Advantages of stochasticity Noise : key element of neural computation near-threshold signaling/decision making Compute with stochastic devices = Saving energy 1) Working below threshold Switching becomes probabilistic Ex : binary probabilistic synapses Modha and Parkin, US2010/ A1 2) Decrease non-volatility degree Long term memory not required for all synapses Reduce the energy barrier drastically reduce critical currents Ultra-low power hybric CMOS/ Spintronic stochastic architectures 34

51 Spin torque Lego - Spin torque versatility: engineering complex functions at the nanoscale f(x) - Assembling ST bricks: promising for novel computing architectures Let s build something different! 35

52 Spin torque Lego - Spin torque versatility: engineering complex functions at the nanoscale f(x) - Assembling ST bricks: promising for novel computing architectures 35

53 Acknowledgements Nicolas Locatelli, Vincent Cros, Albert Fert, André Chanthbouala, Steven Lequeux, Joao Sampaio, Peter Metaxas, Sören Boyn, Eva Grilmadi, Paolo Bortolotti, Antoine Dussaux, Alexei Khvalkovskiy, Benoit Georges, Olivier Boulle, Sana Laribi, Cyrile Deranlot, Stéphanie Girod, Rie Matsumoto, Akio Fukushima, Hitoshi Kubota, Kay Yakushiji, Shinji Yuasa, Olivier Temam, Damien Querlioz, Pierre Bessière, Jacques Droulez CNRS/Thales AIST INRIA IEF College de France 36

54 Thank you

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