I D based Two-Stage Amplifier Design
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1 m D based Two-Stae Amplifier Desin honli ai 9/0/04
2 Motivation d/(w/l) VS VG is sensitive to Vbs
3 Motivation m/d vs VG is also sensitive to Vbs
4 Motivation But m/d vs D/(W/L) has fixed shape With a ertain urrent density, the m/id value is fixed reardless of Vbs Let s look at the m/d urve of the model we are usin in the lab
5 Desin Tradeoff: m D and f T Weak nversion m/d Moderate nversion Stron nversion ft L=0.6um L=.um L=.8um Vod Weak inversion: Lare m/d(>0s/a), but small ft Stron inversion: Small m/d(<5s/a), but lare ft
6 Produt of m D and f T (m/d)*ft L=0.6um L=.um Weak nversion L=.8um Moderate nversion Stron nversion Vod The produt of m/d and ft peaks in moderate inversion Operatin the transistor in moderate inversion is optimal when we value speed and power effiieny equally. But not always the ase!
7 Why m D is important? m/id urve is enerated from SPE simulation, whih is linked to the atual measurement data - Better math to the fabriated one m/id value does not rely on any model equation - Avoid the desin unertainties m /id Value has fixed shape reardless of transistor lenth m/id urve is valid all over the transistor operatin rane m/id method an redue the desin and optimization effort a lot - One seletin one point from m/id urve, with another desin parameter the third parameter an be easily determined - Example: D m D m d du W L W L du d
8 How m D related to Desin Speifiation? V DD 8 bias M 5 M 7 V out Desin Speifiation GBW, SR, phase marin, power and area.et G B W 3 4 M 6 L m D m ( ) * ( ) ( ) D D S R SR SR D L D 6 / / 90 tan [( m D )( D L o L o PM )( )] tan [( m D )( D )] / / m 6 D 6 D 6 m 6 D 6 D 6 p p p G B W SR 3 5 o m 6 m V ss L o L o m 3 m o m 6 z z m 6 m 3 m G B W G B W PM 90 tan [ ] tan ( ) p z You will not ain more benefits on makin M6 muh larer t is better to selet the m/id value of M6 to make it operatin in the moderate inversion. So it is valid to assume o is smaller than L in the desin. The PM an be simplified as / / m D D L m D D PM 90 tan [( )( )( )] tan [( )( )] / / / N ote :k / m D m 6 D6 m 6 D 6 D 6 m 6 D 6 D 6 D L D P M 90 tan ( k * * ) tan ( k * ) D 6 D 6
9 How m D related to Desin Speifiation? M 8 V DD M 5 M 7 Phase Marin = 60 D L D P M 90 tan ( k * * ) tan ( k * ) D 6 D 6 k L D ( )( ) D 6 k ( )( ) L D D 6 tan 30 3 bias V out with the ondition of S R S R D ( ) D 6 L () 3 4 V ss M 6 L L D L D 3 k( )( ) k ( )( ) () D 6 D 6 m D SR SR G B W S R D L / k / D 6 m D m 6 D6 k is determined by the m/d value of M and M6 you hoose d/d6 an be determined in terms of total power onsumption One k and urrent ratio are hosen, then is determined You need to use () to hek the validity of the alulated from () You need to keep observin the parasiti ap at ate of M6 to make sure it is small
10 Desin Guideline Amplifier Desin Proedure Step : hoose m / D Step : hoose m6 / D6 Step3: hoose D / D6 Step 4: alulate Step 5: hek the validity of Step 6: Size M & M6 Step 7: Size M3 & M4 G B W ( m ) / k / m D m 6 D6 D S R D ( ) D 6 L 3 k( )( ) k ( )( ) W ( ) L L D L D D 6 D 6 D ( ) D 6 L W D D ( ) 6 6 du L du 6 M 8 Gain-Bandwidth Requirement SR Speifiation SR and Power Speifiation PM Speifiation SR Speifiation V DD M 5 M 7 Step 8: Size M5 & M7 V out bias 3 4 M 6 L V ss
11 Desin Example Speifiation Spes Speifiation Supply Voltaes +/-.5V Load apaitor pf Total urrent <=00uA D Gain 75dB Gain-bandwidth-produt 5MHz Phase Marin 60 Slew Rate 5MV/s
12 Desin Step to Step 5 M 8 bias V DD M V ss Taret: GBW=5MHz; SR=5V/us M 7 V out M 6 G B W L ( m ) D S R You an hoose the m/id to make GBW and SR barely satisfy the taret For SR is barely at taret value, hoosin a lare m/id an result in GBW over-desined For GBW is barely at taret value, hoosin small m/ id an result in SR over-desined ) n this ase, GBW and SR are hoose to be barely on the desin taret Pik-up point in moderate inversion reion Final Value will be slihtly larer due to parasiti aps m D ) hoosin k =, then 3) hoosin * ( * * 5 ).56 5 D D ) alulate =443fF m 6 D 6.56 Valid 5) hekin D ( 0.) ( 0.) ( ) D 6 L
13 Desin Step 6 m/d NMOS VEB 75 A 6 W du 6.97 A ( ) 38 6 L m/d PMOS VEB 7.5 A W du 0.47 A ( ) 6 L
14 Desin Step 7 & 8 M 8 V DD M 5 M 7 M3 and M4 need to have over-drive voltae in the rane of 00mV to 300mV bias 3 4 V out M 6 L For the Top three transistors M5-M7, the over-drive voltae is set to be 300mV~400mV for the purpose of reduin urrent mismath, and the Vds need to be lare (usually Vds>=.5*Vod ) V ss
15 Simulated Result Spes Speifiation Simulation Supply Voltaes +/-.5V +/-.5V Total urrent <=00uA 90uA D Gain 75dB 77dB Gain-bandwidth-produt 5MHz 5MHz Phase Marin 60 6 Slew Rate: SR+/- 5MV/s.37/5.9 MV/s The desin is essentially riht on the taret without any tweakin
16 Loop Stability Simulation Usin stb analysis in lose-loop V=0
17 Slew Rate Simulation
18 onlusion The key advantae of m/d based desin is that it allows you to transition from hand analysis to Spie simulation without muh of modellin unertainties - Beause we are inorporatin the relevant simulation data into into the desin proess. The simulation result of m/d based desin an math the fabriated iruit well - Beause the m/id diretly arries on the devie measurement information
19 Questions?
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