Nanostructure Based Electro-optic Modulators for High Speed Optical Communication

Transcription

1 Nanostructure Based Electro-optic Modulators for High Speed Optical Communication B. Das and P. Singaraju Dept Electrical Engineering, University of Nevada, Las Vegas, NV, USA ABSTRACT We are currently developing a CMOS-compatible optical modulator based on semiconductor nanostructure arrays that has the potential to provide large modulation depths as well as very high switching speeds. The basis of the expected performance improvements are the strong non-linear and electro-optic effects that occur in low-dimensional nanostructures due to quantum confined Franz-Keldysh effect and quantum confined Stark effect. In particular, electrooptic modulators based on quantum confined Stark effect, where the switching effect is achieved through electron wavefunction skewing, have the potential for very high-speed operations and large modulation depths. Although the potential of semiconductor nanostructures for the implementation of high performance optical modulators has been well appreciated, their implementation thus far has been limited by the availability of a fabrication technique that is CMOS compatible and manufacturable. We have developed a thin film template based nanostructure fabrication technique that is applicable for the development of high performance photonic devices on an arbitrary substrate, including glass substrates. The technique is based on the anodization, or electrolytic oxidation, of a thin film of aluminum to form a nanoporous alumina template; synthesizing the active semiconductor material inside these nanoscale pores then form the semiconductor nanostructures. Keywords: Electro-optic modulators, nanostructures, optical interconnects 1. INTRODUCTION With decreasing device dimensions and increasing circuit complexities, it is becoming more and more evident that the performances of future VLSI systems will be dictated to a large extent by the power, speed and delay requirements of the system interconnects [1]-[2]. While optical interconnects have the potential to replace most electrical links, it is believed that most cost effective use of optical interconnects will be in chip-to-chip communications using an optical backplane [3]. An optical interconnection architecture can be divided into three general components: the optical source, the transmission medium, and the optical receiver. While significant work has been done in the areas of silicon based optical detectors, and both free space interconnects and planar optical waveguides, the major limitation to the widespread implementation of optical interconnect technologies lies in the development of an optical source that can be integrated with silicon CMOS circuitry. Due to the indirect gap nature of silicon, traditional light emitting devices cannot be directly fabricated on this material. Although the development of technologies such as porous silicon [4] and erbium doped silicon [5] may have the potential to provide active optical sources, they still require significant development for useful applications [6]. The heteroepitaxial growth of GaAs on silicon has also been investigated, however, our research group has demonstrated that this technology introduces unacceptable degradation in the gate oxide reliability of the submicron CMOS devices [7].There are also various epitaxial liftoff and hybrid mounting of light emitting devices that are currently being investigated, but it is not clear whether these technologies will be routinely manufacturable. Thus, for the successful development of optical interconnection architectures, it is necessary to develop an optical source which is compatible with submicron CMOS technology, has high performance, and is routinely manufacturable. While active sources (e.g. lasers and LEDs) are most widely used for long distance optical communications, passive sources such as optical modulators (coupled to a light source) are more appropriate for chipto-chip communication due to their higher reliability, ease of fabrication on silicon and their lower costs [8]-[10]. A problem with current optical modulators is that although they have fast response times, the modulation depth (defined as the ratio of transmission in the ON state to the transmission in the OFF state) is quite low [10]. At West Virginia University, we are currently developing a CMOS compatible optical modulator that has the potential to provide large modulation depths as well as very high speeds. The modulators are based on semiconductor nanostructure arrays and the expected performance improvements arise from the strong non-linear and electro-optic effects that occur when carriers are confined in one or more dimensions [11]-[13]. Although the potential of semiconductor nanostructures for the

2 implementation of high performance optical modulation has been well appreciated, their implementation thus far has been limited by the availability of a fabrication technique that is CMOS compatible and manufacturable. Room temperature operation of nanostructure arrays requires that the energy separation due to quantization be greater than that due to thermal broadening. This restricts the size of the nanostructures to below 20 nm for most semiconductor materials. Traditional nanofabrication technologies are not suitable for the fabrication of nanostructure arrays of this size due to lithographic limitations, fabrication induced damage, and prohibitive cost [14]. This has led to the development of a number of nanogrowth techniques, where the semiconductor material is synthesized in the size and shape of a nanostructure. However, most techniques lack the desired control over both the nanostructure size and the array periodicity [15]. We have developed a thin film template based nanostructure synthesis technique that is applicable for the development of high performance photonic devices on silicon substrates [16]. The technique is based on the anodization, or electrolytic oxidation, of a thin film of aluminum to form a nanoporous alumina template; synthesizing the active semiconductor material inside these nanoscale pores then forms the semiconductor nanostructures. 1.1 Fabrication Technique When aluminum is anodized in an appropriate acidic electrolyte under controlled conditions, it oxidizes to form a hydrated aluminum oxide (alumina) containing a two dimensional hexagonal array of cylindrical pores as schematically shown in Figure 1. The pore diameter and the inter-pore spacing depend on the anodization conditions such as electrolyte ph, temperature, anodization current density,and aluminum microstructure (grain size). Pores can be up to several microns in depth. The anodization parameters can be precisely controlled to form pore diameters between 4 and 100 nm with less than 10% variance in the pore size distribution in bulk aluminum (Figure 2). As a result anodized alumina can act as ideal templates for the fabrication of periodic semiconductor nanostructure arrays for photonic and electronic applications if similar order can be obtained for thin films. Anodization is performed in a simple wet chemistry apparatus where the aluminum layer is polarized as the anode (positive), and a platinum electrode is used as the cathode (negative). Anodization can be performed under constant DC current (galvanostatic) or constant DC voltage conditions (potentiostatic). Sulfuric acid and oxalic acid are typically used for the anodization of aluminum. During the first 3-5 seconds of anodization, a thin continuous film of alumina, called the barrier layer, is formed on top of the aluminum substrate. As anodization is continued, an array of pores begins to develop in the barrier layer. The pore diameters increase until reaching a steady state dimension determined by the anodization conditions. When the steady - state diameter is reached, the pores grow in depth at a rate proportional to the anodization current density until the aluminum has been exhausted or until the applied current is removed. Therefore both the pore diameter, which is solely determined by the anodization conditions, and the pore depth, which can be determined from the linear pore formation rate, can be precisely controlled. This allows the properties of the nanostructure to be varied between those of a quasispherical quantum dot (confinement in three dimensions) to a quantum wire (confinement in two dimensions). The evolution of the optical and electrical properties of these structures as a function of the confinement dimension has been recently been shown by Susa [17]. Since the thickness of the modulator used in this application must be at least 2 µm, we will be dealing with quantum wires with a length of 2 µm, and a diameter on the order of 6 nm. Semiconductor Synthesis: The active semiconductor material for the nanostructures is formed by electrochemical synthesisor colloidal deposition inside the pores. The in-situ electrochemical synthesis of active materials within the pores has been well investigated by our group as well as a number of other researchers [16], [18]. Some of the species introduced into the bulk nanoporous alumina are: gold, nickel, iron, CdS, CdTe, ZnS, CdSe, GaAs and ternary semiconductor compounds (Cd x Zn 1-x S). In particular, Cadium Sulfide has been a well-investigated system both by our group and other researchers due to its high degree of optical activity and non-linear optical properties. In addition, we have a current collaboration with the University of Notre Dame to investigate the synthesis of narrow band-gap (e.g.,inas) semiconductors through the electrophoretic deposition of colloidal materials. As a demonstration of the above fabrication technique, a Field Emission SEM image of CdS quantum wires fabricated by this method is shown in Figure 3. Photoluminescence (PL) spectra from the nanowires at 10K is shown in Figure 4. The large PL peak is believed to be from impurity bound excitons and the intensity was observed to be very bright. We are currently performing reflection and electro-optic measurements on these quantum wires. 1.2 Optical Modulator Design Optical interconnection architectures can broadly be divided into free-space and planar categories. While free space architectures can provide increased performance through their ability to use the full 3 dimensional space, they are limited by the requirement that exact alignment must be maintained over the lifetime of the system. Due to this

3 manufacturing difficulty, it is believed that planar waveguides are a more likely choice for use as an optical interconnect medium. Each of the components of a nanostructure based optical modulator is discussed below. An active optical source will provide optical power to the waveguide which will then have data impressed on it by the optical modulator. The wavelength of the optical source is influenced by several factors. These include: The need to minimize optical loss in the planar waveguide. The need to have a wavelength near the optical modulator bandgap. The need to have a wavelength at which the receiver has high sensitivity. In addition, the availability of semiconductor devices limits the range of wavelengths. Therefore, the wavelength selected is a trade-off among all of these factors. The purpose of the optical modulator is to impress data on the optical beam provided by the active source. Although several modulation schemes have been proposed, this work uses simple amplitude modulation to represent data. The important characteristics of an optical modulator are the bandwidth, depth of modulation, operating bias, and optical loss through the modulator while in the "ON" state. In order to implement the optical interconnect architecture, the system parameters must be optimized based upon the choice of each of these elements. In addition, fabrication constraints may result in a choice which is more easily manufactured but is less ideal from an electrical or optical point of view. For the demonstration of the modulator, we have designed our system with a Helium -Neon (HeNe) source at nm and a silicon photodetector with quantum efficiency of approximately 80 % at this wavelength. Therefore the properties of the optical modulator must be able to be engineered to adapt to the architecture specifications. One of the advantages of our technology is that the size and composition of the nanostructures can be altered to meet the design requirements. The controllable parameters of the optical modulator design are the nanostructure diameter and length, the nanostructure composition, and the length of the modulator. The diameter and composition of the material are determined to match the wavelength of the optical source, and provide sufficient confinement for strong quantum enhancement of the modulation. The length of the modulator is determined by the tradeoff between a large depth of modulation, and high transmission in the " ON" state. The length of the nanostructure is determined by the thickness of the optical waveguide. These considerations are discussed below, and a summary of the important parameters and the results of the calculations are shown in Table 3. For efficient modulation, the bandgap of the semiconductor material must be slightly below that of the incident photon energy, and the diameter of the nanostructure must be comparable to the exciton Bohr radius in the bulk material. Since a HeNe source was selected earlier, this limits the bandgap of the semiconductor to below 1.96 ev. In addition the bandgap of the nanostructure increases with increasing confinement. The material that most closely meets these requirements is CdTe, with a bulk bandgap of 1.50 ev and an exciton Bohr radius of 6.9 nm. When confined to 6.9 nm, the bandgap of CdTe increases to 1.78 ev. Modulation Depth The modulation depth is defined as the ratio of transmission in the "ON" state to transmission in the "OFF" state. This change in transmission occurs due to a change in the absorption coefficient of the nanostructure array due to the presence of an applied transverse electric field. The mechanism for this results from a change in the oscillator strength of the material and a red-shift in the absorption edge when an electric field is applied. Calculation by Susa [17], indicate that for an applied field of 200 kv /cm, a change in oscillator strength by a factor of 10, and a 40 mev redshift will occur. This results in an absorption coefficient in the "ON" state of cm -1, and in the "OFF" state of cm-1. However, since the nanostructures represent 10% of the volume of the modulator, these values must be multiplied by a filling factor of 0.1. The length of the modulator must be balanced by the conflicting requirements for a high modulation depth, and low absorption in the "ON" state. To balance these requirements, a modulator length of 2 _m was selected. This gives a modulation depth of and 49.4 % transmission in the "ON" state. Reflectance: An important consideration is the amount of light reflected at the waveguide/modulator interface. The index of refraction of the waveguide material used here is [19], and the index of refraction of Al2O3 is This gives a reflective loss at the interface of 0.17 %. Modulation Bandwidth: The modulation bandwidth is composed of both an intrinsic component which is due to carrier dynamics within the material, and an extrinsic component which is due to the capacitance if the device. For most modulators, the dominant component is the extrinsic capacitance, which is related to the RC time constant of the system. The capacitance of this structure is estimated to be negligible. Therefore bandwidth is not expected to be a limiting factor for this device for the application discussed here. Waveguide: A p-type silicon substrate with 0.3 O-cm resistivity is used as the substrate, and a 1 µm oxide is grown for electrical isolation and waveguide formation. The waveguide material is Polyphenylsilsequioxane (PPSQ), which has a low optical loss and is readily integrated with CMOS technology. PPSQ is spun deposited on the oxidized silicon wafer to form the optical waveguide. This technique has been characterized in this center [19]. The wafer is patterned using a

4 photolithographic process, and etched to the silicon surface where the modulator is fabricated. Modulator Formation: A 2 µm Al film is sputter deposited on the surface. Where the metal is in contact with the silicon surface anodization will occur, but the thick layer of insulating material (oxide and dielectric waveguide) will prevent anodization in other areas. If needed, an additional masking step can be used to prevent anodization in these areas. After this, semiconductor nanostructure formation and encapsulation will occur. Waveguide Formation: A mask step is used to form the planar optical waveguide. The aluminum layer is left on top of the waveguide as an etch mask. The aluminum on top of the waveguide is then removed using a selective etch to remove the aluminum without etching the aluminum hydroxide encapsulation of the modulator. The electrode layer aluminum is sputter deposited ensuring good step coverage over the modulator sides; Excess aluminum is then etched using a photolithographic process. REFERENCES [1] S. Bothra, B. Rogers, M. Kellam, and C. Osburn, Analysis of the effects of scaling on interconnect delay in ULSI circuits, IEEE Transactions on Electron Devices, vol. 40(3), pp , March [2] K. Saraswat and F. Mohammadi, Effect of Scaling of Interconnections on the Time Delay of VLSI Circuits, IEEE Transactions on Electron Devices v 29 n 4, p , Apr [3] P. Haugen, S. Rychnovsky, and A. Hussain, Optical Interconnects for High Speed Computing, Optical Engineering, 25(10), p , Oct [4] F. Namavar, R. Pinizzotto, H. Yang, N. Kalkhoran, and P. Maruska; Silicon nanostructures in Si-based lightemitting devices ; Proc.Mat. Res. Symp : Silicon Based Optoelectronic Materials, volume 298, pp , April [5] A. Majima, S. Uekusa, K. Ootake, K. Abe, and M. Kumagai; Optical direct and indirect excitation of Er3+ ions in silicon ; Proc. Mat. Res. Symp: Silicon Based Opto- electronic Materials, volume 298, pp , April [6] D. Hall; The role of silicon in optoelectronics. In Silicon ; Proc. Mat. Res. Symp: Silicon Based Optoelectronic Materials, volume 298; pp , April1993. [7] S. McGinnis, The effect of vicinal silicon surfaces on the performance of submicron metal oxide semiconductor devices, Master's thesis, West Virginia University, May [8] M. Fukuda, Laser and LED reliability update, Journal of Lightwave Technology, LT-6, p , Oct [9] M. Fukuda. Reliability and Degradation of Semiconductor Lasers and LEDs. Artech House, [10] S. Tewksbury. Interconnections within microelectronic systems. In Microelectronic System Interconnections: Performance andmodeling, S. Tewksbury, editor, IEEE Press, [11] D. Miller, D. Chemla, T. Damen, T. Wood, C. Burrus, A. Gossard, and W. Wigemann. IEEE Journal of. Quantum Electronics, QE- 21:1462, [12] T. Takagahara; Quantum dot lattice and enhanced excitonic optical nonlinerity ; Surface Science, 267:310, pp , April1992. [13] F. Henneberger, J. Puls, H. Rossmann, U. Woggon, S. Freundt, C, Spiegelberg and A. Schulzgen M. Miller; Nonlinear optica properties of wide-gap II-VI bulk semiconductors and microcrystallites ; Journal of Crystal Growth v 101, p , Apr [14] L. Brus, Structural and Electronic Properties of Semiconductor Crystallites too Small to Exhibit the Bulk band Gap, Electrochemical Society Extended Abstracts v 85-1, p 807, Journal of Physical Chemistry, 90:2555, [15] L. Brus and N. Peyghambarian. OE Reports, [16] B. Das and S. McGinnis, Novel template based semiconductornanostructures and their applications, Applied Physics A, 71, pp. 1-8 (2000) [17] N. Susa, "Quantum -confined Stark effects in semiconductor quantum disks," IEEE Journal of Quantum Electronics, vol. 32, pp , [18] D. Routkevitch, A. A. Tager, J. Haruyama, D. Almawlawi, M. Moskovits, and J. M. Xu, "Nonlithographic nanowire arrays: fabrication, physics, and device applications," IEEE Transactions onelectron Devices, vol. 43, pp , [19] K. Brown. Characterization of polyphenylsisequioxane (ppsq) as an integrated optical wageguide material. Master's thesis, West VirginiaUniversity, December 1996.

5 CALCULATED MODULATOR PARAMETERS Parameters Value Incident photon energy 1.96 ev Modulator length 2 _m Modulation depth Transmission (ON) 49.4% Transmission (OFF) 0.20% Reflective loss 0.17% Figure 1: Schematic top and cross-sectional views of hexagonal array of pores formed in anodized alumina Figure 2: SEM top view of bulk porous alumina showing highly -ordered pores. Figure 3. Field Emission SEM image of CdS nanowires. Average diameter : 30 nm. Figure 4. Photoluminescence spectra from the CdS nanowires.