Silicon-based Quantum Computation. Thomas Schenkel

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1 Silicon-based Quantum Computation Thomas Schenkel E. O. Lawrence Berkeley National Laboratory Thomas Schenkel, Accelerator and Fusion Research

2 Superconductors Quantum Hall 122 Te, crystal lattice, Quantum Computation Semiconductor Quantum Dots Semiconductor Spins Ion and Atom Traps NMR in liquids 7 qubit demonstration of Shor s algorithm (Chuang et co. 01) 31 P in Si, single e - spin detection 31 P nano-arrays by STM 31 P nano-arrays by Single Ion Implantation (SII) STM+integration STM + SII + integration Centre for QC tech. Univ. of New South Wales SII + Integration 31 P 15+ LBNL

3 Quantum Information Science and Technology Roadmap our project is part of a focused effort to reach a quantum computation test bed area by

4 Why quantum computation with dopant spins in silicon? 0. Why Quantum Computation? Information storage capacity of N qubits ~2 N Quantum algorithms promise speedups General paradigm of quantum information theory 1. Why in solids? Promise of scalability to large N (>1000) But solids are a very noisy environment (even at low T) 2. Why in Silicon? Quantum device requirements are converting with trends in classical silicon transistor technology Strong fundamentals for electron and nuclear spins of 31 P atoms in a silicon matrix

5 Moore s Law (Gordon Moore, Intel) exponentially more, cheaper, faster and smaller transistors Thomas Schenkel, Accelerator and Fusion Research

6 Moore s Law of exponential speedup of silicon transistors

7

8 Transistors The metal-oxide-semiconductor field-effect transistor (MOSFET) is the basic switching and amplification device of digital electronics. The current between the source and drain electrodes is controlled by the gate voltage. When the gate voltage is zero, no conduction electrons are present in the channel. When the gate is at a positive voltage, electrons from the source and drain accumulate in the area of the channel close to the gate. As the gate voltage is increased further, the number of electrons in the channel increases until saturation is reached. With no gate voltage, electrons in the channel experience a potential that is higher than the bias potential. As the gate voltage increases, the potential in the channel gradually lowers and electrons accumulate there. Thomas Schenkel, Accelerator and Fusion Research

9 Si-Lattice constant: 0.5 nm Cleavelin, TI, 03 Thomas Schenkel, Accelerator and Fusion Research

10 Why silicon? vastly abundant semiconductor that is easy to work with and that forms a great interface with a dielectric SiO 2 / Si interface has very low defect density (10 10 cm -2 V -1 ) very high degree of control over electrical properties allows larger scale integration compared to other materials with specific advantages: GaAs: direct band gap for opto-electronic integration (but: much harder to work with, forms poor interface to dielectric, no nuclear spin free isotopes ) diamond: larger band gap, ideal for high temperature operation (but difficult to make larger wafers, hard to dope, )

11 The 31 P qubit in silicon P: [Ne].3s 2.3p 3 Si: [Ne].3s 2.3p 2 one electron to play with for P in Si

12 The 31 P qubit in silicon 31 P is a standard n-type dopant in silicon, one electron is ionized at room temperature and contributes to electrical conduction but at low temperature (<70 K), this electron remains bound to the P atom with a binding energy of 45 mev, and a Bohr radius of ~2.5 nm the spin of this electron in a global magnetic field is a very attractive two level system for quantum information processing, e. g., 0> = >, 1>= > the electron spin decoherence time is quite long, ~60 ms additionally, 31 P has a nuclear spin of I=1/2, while the nuclear spin of the silicon matrix can be prepared to be I=0 for isotopically pure 28 Si the nuclear spin can be addressed very precisely through hyperfine interaction, and nuclear spin decoherence times are very, very long (hours)

13 Criteria for physical implementation of a quantum computer (DiVincenzo) 1. Well defined extendible qubit array stable memory 2. Initialization in the 000 state 3. Long decoherence time (>10 4 operation time, to allow for error correction) 4. Universal set of gate operations (not, cnot) 5. Read-out: Single-quantum measurements (projective measurement) 31 P donor spins in silicon: natural quantum dots 20 to 200 nm Kane 98, 02: nuclear spin in 31 P as memory and spin coherent electron transport for two qubit operations, gate controlled hyperfine and exchange interactions Yablonovitch 00: e - spins and exchange interaction in Si x Ge y heterostructures Thomas Schenkel, Accelerator and Fusion Research

14 Solid state quantum computer scheme with 31 P in 28 Si (Kane 98) 31 P-qubit: gate controlled manipulation of single spins; nuclear spins store information, electron spins transfer information between neighboring qubits (J, exchange) and to nuclear spins (A=121.5 nev, hyperfine interaction) ( issues: J oscillations on Å length scale in Si; required control of hyperfine interaction

15

16 quantum information processing in a nutshell entangle ensembles of qubits (control) prevent interaction with environment (limit decoherence) run sequences of unitary operations on the ensemble read-out the end result in a projective measurement

17 Necessities for a spin quantum computer: 1. Long lived spin states 2. Single spin operations (Q NOT) controlled spin interactions with an external field 3. Two spin operations (Q CNOT) controlled interactions between spins 4. Single spin preparation and detection controlled interactions with external reservoirs Transistor model : Local gate control over single spins and two spin interaction

18 SINGLE SPIN OPERATIONS (QUANTUM NOT) Magnetic Resonance: In a magnetic field spin energy levels are split by an energy E=µB. An AC magnetic field will excite transitions between the two spin levels when hν= E If the AC field is turned on for the appropriate length of time, then the NOT operation is performed: ( & ) For nuclear spins at B=1 Tesla ν 10 MHz, For electron spin at B=1 Tesla ν 10 GHz, E 0.05 mev (T=0.5 K) Nuclear Resonance Frequency (MHz) Thomas Schenkel, Accelerator and Fusion Research 0 α=30 MHz/V V=0: A-Gate Barrier Si e - A-Gate Barrier Si V>0: A-Gate Barrier Si A-Gate Voltage (V) 31 P From Kane 99

19 Quantum Logic also requires CONTROLLED NOT operation on two spins. CNOT can be produced by EXCHANGE operation and NOT: EXCHANGE( )= EXCHANGE operation produced when two spins interact for a certain amount of time

20 TWO SPIN OPERATIONS (QUANTUM CNOT) Exchange Frequency (Hz) J=0: J-Gate A-Gate A-Gate - - J>0: B=2 T: J-Gate A-Gate A-Gate ++ 2µ B B/h=56 GHz Thomas Schenkel, Accelerator and Fusion Research Donor Separation (Å) From Kane 99

21 Hydrogenic spin quantum computing in silicon: a digital approach Thomas Schenkel, Accelerator and Fusion Research Skinner, Davenport, Kane 02 quant-ph/

22 Goal: Access the physics of the 31 P qubit in a scalable architecture QC-scheme & design testing fabrication

23 Solid state quantum computer development: A nano-fabrication challenge Bottom up Scanning probe hydrogen lithography epitaxial overgrowth, gate and readout structure formation Self assembly Top down Ion implantation into pre-fabricated structures aligned implantation followed by processing

24 Tools for Nanofabrication Scanning tunneling microscopy Hydrogen resist desorption with atomic resolution: ~0.2 nm Electron Beam Lithography Beam spot: ~5-10 nm, resolution limited by proximity effect: scattering of energetic (~100 kev) electrons in resist layers Ion Implantation Focused Ion Beam with Liquid Metal Ion Gun (Ga, In) Spot size: ~10 nm, 1 pa Shinada et al.: ~70 nm for 60 kev 31 P 2+ beam Low energy Single Ion Implantation Goal: 10 nm resolution at 1-10 KeV implant energy Status (11/03): 30 nm tests in progress, nano-stage with AFM (100 µm +/- 1 nm) being tested

25 Bottom up: STM hydrogen lithography J. O'Brien, et al., Univ. New South Wales, Sydney STM atom manipulation D. Eigler, et. co., IBM Desorption of H with low energy electrons (~10 ev) from the STM tip Advantage: atomic resolution Problems: encapsulation, dopant activation, device integration,.

26 Formation of integrated atom arrays by Single Ion Implantation plus some processing vision: to place individual ions (any element) into any solid with nm resolution (+/- 5 nm seems possible) tasks 1. Detect single ions Detection of secondary electron showers from deposition of potential energy of low energy (<20 kev), highly charged ions like 31 P Control spatial resolution Beam focusing and collimation Range straggling Diffusion during annealing, ensure electrical activation 3. Integrate with semiconductor processing Si nanowire Single Electron Transistor fabrication with Electron Beam Lithography and stress limited oxidation

27 Poissonian distribution of implanted ions Distribution of probabilities for implantation of ions where the implantation probability is small (<<1) for each incident ion and the number of ion impacts is large (>>1) At average, one ion is implanted. The probability for two adjacent ion hits is 13%

28 Single ion implantation aligned with Scanning Probe highly charged ions ( 31 P 13+, 126 Te 34+, ) beam is blocked following one event and sample is moved to next qubit site Scanning Probe with hollow pyramid tip (~25 µm wide) detection of multiple secondary electrons from single ion hits registers impact events e - e - e - e - e - e - e - e - SP aligns implant beam to sample features (10 20 nm Si-SET lines) (components not to scale)

29 Single Ion Implanter with integrated Scanning Probe ion guide incident P 13+ or Te 33+ extraction and detection of secondary electron bursts Scanning Probe head with nano-aperture sample

30 Non-Poissonian single ion implantation with 31 P q+ P 12+ deposits 2.5 kev of potential energy, independent of kinetic energy emission of ~15 e - /P 12+, compared to about 1 e - /P 1+ from kinetic emission at E kin =10 kev Each ion impact is registered by detection of several secondary electrons 100% detection efficiency for single ions enables implantation of exact numbers of dopant ions focusing and collimation for pattern definition electron emission contrast enables imaging and alignment to markers for integration with consecutive E-beam lithography steps counts / channel copper SiO 2 /Si q18-phd-1 1 pulse height channel Pulse height distribution of secondary electrons from 31 P 12+ impacts on metal (blue) and silicon (native oxide on Si) (red) samples from an annular MCP detector

31 Secondary electron emission enables efficient detection of single ion impacts 160 secondary electrons / ion P Te42+ Au SiO 2 33pq potential energy (kev) Secondary electron yields from gold and SiO 2 targets as a function of potential energy of highly charged ions (Xe, Au and Th) with kinetic energies of 9kV q [T. Schenkel et al., NIM B 125, 153 (1997)]

32 P q+ beam formation 400 P 15+ P P 13+ F 8+ P 12+ P 11+ O 6+ F 7+ counts 200 O 8+ N 7+ F 9+ N 6+ N O q6-b-scans-p-1 5 mass / charge

33 The Electron Beam Ion Trap / Source beams of highly charged ions like P 15+, Te 42+, Xe 52+ and Au 69+ and kinetic energies from as low as 100 ev up to 1 MeV

34 Ion solid interactions with highly charged ions: femtosecond physics on a nanometer scale for v<v 0 and q>>q eq : hollow atom formation and decay electron capture Auger and radiative transitions collisions with target electrons and nuclei: energy loss Sputtering secondary electron emission lattice modifications (APL ) 31 P 15+ at ~10 kev: interaction is dominated by deposition of potential energy, equilibrium charge state, q eq = Z 1/3 v / v Bohr 0.3+ T. Schenkel et al., Prog. Surf. Sci. 61, 23 (1999); Phys. Rev. Lett. 83, 4273 (1999) Thomas Schenkel, Accelerator and Fusion Research

35 Straggling contributes to uncertainty in positioning of P-qubits 2 kev 5 kev Trajectories of P-ions in a-si simulated with the Monte Carlo code SRIM (Stopping and Range of Ions in Matter, Ziegler et al., IBM).

36 Single ion implantation setup

37 FEI Strata 235 dual beam FIB at LBNL etching oxide deposition Pt deposition

38 Piezoresistive Scanning Probe integration Piezoresistive SPM based on a Wheatstone bridge, and bimetallic actuation SPM test setup at LBNL co. I. Rangelow, University Kassel

39 Nanometer scale alignment accuracy through integration with SPM a 100 nm hole (shrink by thin film deposition) in a hollow tip on a piezo-resistive cantilever

40 Resolution limits in single ion implantation ? Etch pits in CR-39 from single 31 P 12+ impacts, not quite aligned yet mask opening: few nm wide holes with >10: 1 aspect ratios in thin SiN membranes P 12+ interaction with mask: image charge acceleration, e - capture, electronic sputtering

41 Device proposal: 31 P atoms aligned to Single Electron Transistors in silicon G Poly-Si A-G SG A-G S D Gate oxide Si 31 P 31 P S D S D SiO 2 Si Qubit spacing: ~50 to 100 nm SET pair in SOI, co. Alex Liddle, LBNL, and Jeff Bokor, UCB Single ion implantation, electron beam lithography and semiconductor processing for integration of 31 P qubits with gates and SET readout structures Si nanowire SETs formed in high temperature process prior to donor placement

42 Si-SETs in SOI with 10 nm line widths

43 SINGLE SPIN MEASUREMENT Intuition: An effective and rapid means of measuring single electron spins will rely on effective spin interactions that are a manifestation of the Pauli Principle, rather than on detecting a magnetic field generated by the electron spin. Ergo: Spin dependent charge measurements are promising path to single spin detection Pauli Exclusion Principle Overall wave-function of multi-electron system must be anti-symmetric with respect to particle interchange. For two spins there are three symmetric (triplet ) states:, +, and one antisymmetic (singlet) state: Exclusion Principle says that two electrons in the same orbital quantum state must be in a singlet spin state.

44 Coulomb blockade and single electron control Thomas Schenkel, Accelerator and Fusion Research Konstantin K. Likharev, IEEE, 99

45 Single electron transistor as a sensitive electrometer Gate controlled current flow I-V curves sensitive to local potential around island Alignment of SET with 31 P atoms allows spin dependent charge measurements charging energy for electrons to hop onto island: E c =e 2 /2C >> kt tunneling resistance R>>1/G=h/e 2 kohm need E c ~ 10 kt for reliable operation LHe, 4 K, kt = 0.34 mev SET at room temperature: capacitance of island ~1aF, size smaller than 10 nm Thomas Schenkel, Accelerator and Fusion Research

46 14 nm quantum wire SET measurements at 4K 4.E-09 3.E-09 2.E-09 1.E E+00-1.E-09-2.E-09-3.E-09-4.E mv

47 30 nm quantum wire SET measurements at 4K 3.05E E-08 Is-d(A) 2.E-08 1.E-08 0.E+00-1.E-08-2.E Vs-d(V) 2.95E-08 Is-d(A) 2.90E E E E Vg(V) Tunnel resistance 300kohm Total capacitance 10aF Gate capacitance 0.13aF Charging energy 8meV Is-d measurement through 30nm quantum wire at 10mV of Vs-d in the large plot And the same Is-d measurement with respect to Vs-d at two different Vg on top

48 Konstantin K. Likharev, IEEE, 99

49

50 Basic building block to access the physics of the 31 P qubit: Two 31 P atoms aligned with control gates and SETs 20 to 100 nm Source Gate P P SET electrometer Drain Electron transfer into D - state for anti-parallel spins Gate control of single spins and read out through spin dependent charge transfer between 31 P atoms (based on singlet-triplet splitting and exclusion principle) (Kane 00)

51

52 Outlook: 31 P qubit physics by 2005, reach a QC test bed era by Kane, PRL, 03 Si-SETs Single ion implantation + + Process integration carrier concentration (e - /cm -3 ) 1E21 1E20 1E19 1E18 1E17 1E16 1E15 1E14 1E11 1E12 1E13 1E14 1E15 access quantum computation in silicon 1E depth (nm)

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